diff options
| author | AngeloGioacchino Del Regno | 2021-07-29 17:56:07 +0200 |
|---|---|---|
| committer | Bjorn Andersson | 2021-09-21 17:41:48 -0500 |
| commit | 13e72c3e22611915f9a71a513b640e064a403e78 (patch) | |
| tree | 6f358f4c137c86d465d0f88ca4fa7175ef7a9fea /include/soc/qcom | |
| parent | f8881c5d2fcb24b5b10b0d462e5fa0bbe9014af5 (diff) | |
soc: qcom: spm: Implement support for SAWv4.1, SDM630/660 L2 AVS
Implement the support for SAW v4.1, used in at least MSM8998,
SDM630, SDM660 and APQ variants and, while at it, also add the
configuration for the SDM630/660 Silver and Gold cluster L2
Adaptive Voltage Scaler: this is also one of the prerequisites
to allow the OSM controller to perform DCVS.
Please note that despite there are various "versions" of these
values downstream, these are the only ones that are perfectly
stable on the entire set of tested devices.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210729155609.608159-4-angelogioacchino.delregno@somainline.org
Diffstat (limited to 'include/soc/qcom')
| -rw-r--r-- | include/soc/qcom/spm.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/soc/qcom/spm.h b/include/soc/qcom/spm.h index 4c7e5ac2583d..4951f9d8b0bd 100644 --- a/include/soc/qcom/spm.h +++ b/include/soc/qcom/spm.h @@ -21,11 +21,13 @@ enum pm_sleep_mode { }; struct spm_reg_data { - const u8 *reg_offset; + const u16 *reg_offset; u32 spm_cfg; u32 spm_dly; u32 pmic_dly; u32 pmic_data[MAX_PMIC_DATA]; + u32 avs_ctl; + u32 avs_limit; u8 seq[MAX_SEQ_DATA]; u8 start_index[PM_SLEEP_MODE_NR]; }; |