diff options
| author | Vladimir Oltean | 2022-02-16 16:30:06 +0200 |
|---|---|---|
| committer | David S. Miller | 2022-02-17 14:06:51 +0000 |
| commit | 36fac35b29072e345d5fc485cf7841be265181b1 (patch) | |
| tree | 0668f736859e064271825a6937b34d4dfd5a7414 /include/soc | |
| parent | c518afec288351347dbe05ea3d49d18fb9a9fff1 (diff) | |
net: mscc: ocelot: delete OCELOT_MRP_CPUQ
MRP frames are configured to be trapped to the CPU queue 7, and this
number is reflected in the extraction header. However, the information
isn't used anywhere, so just leave MRP frames to go to CPU queue 0
unless needed otherwise.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/soc')
| -rw-r--r-- | include/soc/mscc/ocelot.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/include/soc/mscc/ocelot.h b/include/soc/mscc/ocelot.h index cacb103e4bad..2d7456c0e77d 100644 --- a/include/soc/mscc/ocelot.h +++ b/include/soc/mscc/ocelot.h @@ -105,8 +105,6 @@ #define REG_RESERVED_ADDR 0xffffffff #define REG_RESERVED(reg) REG(reg, REG_RESERVED_ADDR) -#define OCELOT_MRP_CPUQ 7 - enum ocelot_target { ANA = 1, QS, |