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author | Marc Zyngier | 2020-03-04 20:33:28 +0000 |
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committer | Marc Zyngier | 2020-03-24 12:15:51 +0000 |
commit | d9c3872cd2f86b7295446e35b4801270669d2960 (patch) | |
tree | d4d6b6c91e5c80683c188f238ac37f0c0aa61cea /include/trace | |
parent | 2291ff2f2a569b7b7a64aff3d05e1d51fe0fd66a (diff) |
KVM: arm64: GICv4.1: Reload VLPI configuration on distributor enable/disable
Each time a Group-enable bit gets flipped, the state of these bits
needs to be forwarded to the hardware. This is a pretty heavy
handed operation, requiring all vcpus to reload their GICv4
configuration. It is thus implemented as a new request type.
These enable bits are programmed into the HW by setting the VGrp{0,1}En
fields of GICR_VPENDBASER when the vPEs are made resident again.
Of course, we only support Group-1 for now...
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Link: https://lore.kernel.org/r/20200304203330.4967-22-maz@kernel.org
Diffstat (limited to 'include/trace')
0 files changed, 0 insertions, 0 deletions