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authorHansen2021-10-01 22:36:15 +0800
committerAlex Deucher2021-10-06 16:14:17 -0400
commit5a1fef027846e7635b9d320b2cc0b416fd11a3be (patch)
tree76a7b07ba34488f0b73c9a2384668010d6b18900 /include/uapi/linux/tcp.h
parenta7e397b7c45377e20542146be10231b8afa948d1 (diff)
drm/amd/display: Fix detection of 4 lane for DPALT
[Why] DPALT detection for B0 PHY has its own set of RDPCSPIPE registers [How] Use RDPCSPIPE registers to detect if DPALT lane is 4 lane Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Hansen <Hansen.Dsouza@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'include/uapi/linux/tcp.h')
0 files changed, 0 insertions, 0 deletions