diff options
author | Linus Torvalds | 2015-11-02 11:40:22 -0800 |
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committer | Linus Torvalds | 2015-11-02 11:40:22 -0800 |
commit | 17a1359034e1fb5cfe9e5196a8ab5153acfacdc6 (patch) | |
tree | e9b12d256183b9cbf4d95fbd5628cba725c7e531 /include/uapi/linux | |
parent | 66b019967845a5af58802fd9af77f2317e5298a1 (diff) | |
parent | 7cc8d580228cc712edcf7a1856a3bdb38c164e83 (diff) |
Merge tag 'mmc-v4.4' of git://git.linaro.org/people/ulf.hansson/mmc
Pull MMC updates from Ulf Hansson:
"MMC core:
- Add new API to set VCCQ voltage - mmc_regulator_set_vqmmc()
- Add new ioctl to allow userspace to send multi commands
- Wait for card busy signalling before starting SDIO requests
- Remove MMC_CLKGATE
- Enable tuning for DDR50 mode
- Some code clean-up/improvements to mmc pwrseq
- Use highest priority for eMMC restart handler
- Add DT bindings for eMMC hardware reset support
- Extend the mmc_send_tuning() API
- Improve ios show for debugfs
- A couple of code optimizations
MMC host:
- Some generic OF improvements
- Various code clean-ups
- sirf: Add support for DDR50
- sunxi: Add support for card busy detection
- mediatek: Use MMC_CAP_RUNTIME_RESUME
- mediatek: Add support for eMMC HW-reset
- mediatek: Add support for HS400
- dw_mmc: Convert to use the new mmc_regulator_set_vqmmc() API
- dw_mmc: Add external DMA interface support
- dw_mmc: Some various improvements
- dw_mmc-rockchip: MMC tuning with the clock phase framework
- sdhci: Properly clear IRQs during resume
- sdhci: Enable tuning for DDR50 mode
- sdhci-of-esdhc: Use IRQ mode for card detection
- sdhci-of-esdhc: Support both BE and LE host controller
- sdhci-pci: Build o2micro support in the same module
- sdhci-pci: Support for new Intel host controllers
- sdhci-acpi: Support for new Intel host controllers"
* tag 'mmc-v4.4' of git://git.linaro.org/people/ulf.hansson/mmc: (73 commits)
mmc: dw_mmc: fix the wrong setting for UHS-DDR50 mode
mmc: dw_mmc: fix the CardThreshold boundary at CardThrCtl register
mmc: dw_mmc: NULL dereference in error message
mmc: pwrseq: Use highest priority for eMMC restart handler
mmc: mediatek: add HS400 support
mmc: mmc: extend the mmc_send_tuning()
mmc: mediatek: add implement of ops->hw_reset()
mmc: mediatek: fix got GPD checksum error interrupt when data transfer
mmc: mediatek: change the argument "ddr" to "timing"
mmc: mediatek: make cmd_ints_mask to const
mmc: dt-bindings: update Mediatek MMC bindings
mmc: core: Add DT bindings for eMMC hardware reset support
mmc: omap_hsmmc: Enable omap_hsmmc for Keystone 2
mmc: sdhci-acpi: Add more ACPI HIDs for Intel controllers
mmc: sdhci-pci: Add more PCI IDs for Intel controllers
arm: lpc18xx_defconfig: remove CONFIG_MMC_DW_IDMAC
arm: hisi_defconfig: remove CONFIG_MMC_DW_IDMAC
arm: exynos_defconfig: remove CONFIG_MMC_DW_IDMAC
arc: axs10x_defconfig: remove CONFIG_MMC_DW_IDMAC
mips: pistachio_defconfig: remove CONFIG_MMC_DW_IDMAC
...
Diffstat (limited to 'include/uapi/linux')
-rw-r--r-- | include/uapi/linux/mmc/ioctl.h | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/include/uapi/linux/mmc/ioctl.h b/include/uapi/linux/mmc/ioctl.h index 1f5e68923929..7e385b83b9d8 100644 --- a/include/uapi/linux/mmc/ioctl.h +++ b/include/uapi/linux/mmc/ioctl.h @@ -45,8 +45,24 @@ struct mmc_ioc_cmd { }; #define mmc_ioc_cmd_set_data(ic, ptr) ic.data_ptr = (__u64)(unsigned long) ptr -#define MMC_IOC_CMD _IOWR(MMC_BLOCK_MAJOR, 0, struct mmc_ioc_cmd) +/** + * struct mmc_ioc_multi_cmd - multi command information + * @num_of_cmds: Number of commands to send. Must be equal to or less than + * MMC_IOC_MAX_CMDS. + * @cmds: Array of commands with length equal to 'num_of_cmds' + */ +struct mmc_ioc_multi_cmd { + __u64 num_of_cmds; + struct mmc_ioc_cmd cmds[0]; +}; +#define MMC_IOC_CMD _IOWR(MMC_BLOCK_MAJOR, 0, struct mmc_ioc_cmd) +/* + * MMC_IOC_MULTI_CMD: Used to send an array of MMC commands described by + * the structure mmc_ioc_multi_cmd. The MMC driver will issue all + * commands in array in sequence to card. + */ +#define MMC_IOC_MULTI_CMD _IOWR(MMC_BLOCK_MAJOR, 1, struct mmc_ioc_multi_cmd) /* * Since this ioctl is only meant to enhance (and not replace) normal access * to the mmc bus device, an upper data transfer limit of MMC_IOC_MAX_BYTES @@ -54,4 +70,5 @@ struct mmc_ioc_cmd { * block device operations. */ #define MMC_IOC_MAX_BYTES (512L * 256) +#define MMC_IOC_MAX_CMDS 255 #endif /* LINUX_MMC_IOCTL_H */ |