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authorArtem Bityutskiy2013-03-04 14:21:34 +0200
committerDavid Woodhouse2013-04-05 12:00:50 +0100
commit14c6578683367b1e7af0c3c09e872b45a45183a7 (patch)
tree8035d78cea0c4d1849134eaf113d29bef6286f28 /include
parent02f57fe448618722ed713fe1002894ead9981310 (diff)
mtd: nand: remove AG-AND support
We have only one AG-AND driver and it was not touched since 2005. It looks like AG-AND was not really make it to mass-production and can be considered a dead technology. Along with the AG-AND support, this patch removes the BBT_AUTO_REFRESH feature, because the only user of this feature is AG-AND. And even though it is implemented as a generic feature, I prefer to remove it because NAND flashes do not really need it in this form. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mtd/nand.h16
1 files changed, 0 insertions, 16 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index ef52d9c91459..7cc299436f94 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -172,22 +172,6 @@ typedef enum {
/* Chip has copy back function */
#define NAND_COPYBACK 0x00000010
/*
- * AND Chip which has 4 banks and a confusing page / block
- * assignment. See Renesas datasheet for further information.
- */
-#define NAND_IS_AND 0x00000020
-/*
- * Chip has a array of 4 pages which can be read without
- * additional ready /busy waits.
- */
-#define NAND_4PAGE_ARRAY 0x00000040
-/*
- * Chip requires that BBT is periodically rewritten to prevent
- * bits from adjacent blocks from 'leaking' in altering data.
- * This happens with the Renesas AG-AND chips, possibly others.
- */
-#define BBT_AUTO_REFRESH 0x00000080
-/*
* Chip requires ready check on read (for auto-incremented sequential read).
* True only for small page devices; large page devices do not support
* autoincrement.