diff options
| author | Linus Torvalds | 2019-05-06 19:53:11 -0700 |
|---|---|---|
| committer | Linus Torvalds | 2019-05-06 19:53:11 -0700 |
| commit | 275b103a26e218b3d739e5ab15be6b40303a1428 (patch) | |
| tree | ba27f2d4fa77115201acc492dd482009228fefd0 /include | |
| parent | 4dd2ab9a0f84a446c65ff33c95339f1cd0e21a4b (diff) | |
| parent | 8de9930a4618811edfaebc4981a9fafff2af9170 (diff) | |
Merge tag 'edac_for_5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
Pull EDAC updates from Borislav Petkov:
- amd64_edac: Family 0x17, models 0x30-.. enablement (Yazen Ghannam)
- skx_*: Librarize it so that it can be shared between drivers (Qiuxu Zhuo)
- altera: Stratix10 improvements (Thor Thayer)
- The usual round of fixes, fixlets and cleanups
* tag 'edac_for_5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
Revert "EDAC/amd64: Support more than two controllers for chip select handling"
arm64: dts: stratix10: Use new Stratix10 EDAC bindings
Documentation: dt: edac: Add Stratix10 Peripheral bindings
Documentation: dt: edac: Fix Stratix10 IRQ bindings
EDAC/altera, firmware/intel: Add Stratix10 ECC DBE SMC call
EDAC/altera: Initialize peripheral FIFOs in probe()
EDAC/altera: Do less intrusive error injection
EDAC/amd64: Adjust printed chip select sizes when interleaved
EDAC/amd64: Support more than two controllers for chip select handling
EDAC/amd64: Recognize x16 symbol size
EDAC/amd64: Set maximum channel layer size depending on family
EDAC/amd64: Support more than two Unified Memory Controllers
EDAC/amd64: Use a macro for iterating over Unified Memory Controllers
EDAC/amd64: Add Family 17h Model 30h PCI IDs
MAINTAINERS: Add entry for EDAC-I10NM
MAINTAINERS: Update entry for EDAC-SKYLAKE
EDAC, altera: Fix S10 Double Bit Error Notification
EDAC, skx, i10nm: Make skx_common.c a pure library
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/firmware/intel/stratix10-smc.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h index 5be5dab50b13..01684d935580 100644 --- a/include/linux/firmware/intel/stratix10-smc.h +++ b/include/linux/firmware/intel/stratix10-smc.h @@ -309,4 +309,23 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE) #define INTEL_SIP_SMC_FUNCID_RSU_UPDATE 12 #define INTEL_SIP_SMC_RSU_UPDATE \ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_UPDATE) + +/* + * Request INTEL_SIP_SMC_ECC_DBE + * + * Sync call used by service driver at EL1 to alert EL3 that a Double + * Bit ECC error has occurred. + * + * Call register usage: + * a0 INTEL_SIP_SMC_ECC_DBE + * a1 SysManager Double Bit Error value + * a2-7 not used + * + * Return status + * a0 INTEL_SIP_SMC_STATUS_OK + */ +#define INTEL_SIP_SMC_FUNCID_ECC_DBE 13 +#define INTEL_SIP_SMC_ECC_DBE \ + INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_ECC_DBE) + #endif |