diff options
author | Linus Torvalds | 2007-06-15 16:14:08 -0700 |
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committer | Linus Torvalds | 2007-06-15 16:14:08 -0700 |
commit | 4ff4275b24fdcca189b33f9a73fe7abef1dc84bc (patch) | |
tree | d78f65e793d80e3a4c454d37e710f182de4bf34e /include | |
parent | e00eea42f24550beb9940e641402450f695c888a (diff) | |
parent | 7b4f4ec21038ac13c63d130357d1c3015ec3f3e8 (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] Fix builds where MSC01E_xxx is undefined.
[MIPS] Separate performance counter interrupts
[MIPS] Malta: Fix for SOCitSC based Maltas
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-mips/mips-boards/generic.h | 22 | ||||
-rw-r--r-- | include/asm-mips/mips-boards/msc01_pci.h | 1 |
2 files changed, 20 insertions, 3 deletions
diff --git a/include/asm-mips/mips-boards/generic.h b/include/asm-mips/mips-boards/generic.h index b98f1658cfd0..c8ebcc3e1267 100644 --- a/include/asm-mips/mips-boards/generic.h +++ b/include/asm-mips/mips-boards/generic.h @@ -73,12 +73,28 @@ * CoreEMUL with Bonito System Controller is treated like a Core20K * CoreEMUL with SOC-it 101 System Controller is treated like a CoreMSC */ -#define MIPS_REVISION_CORID_CORE_EMUL_BON 0x63 -#define MIPS_REVISION_CORID_CORE_EMUL_MSC 0x65 +#define MIPS_REVISION_CORID_CORE_EMUL_BON -1 +#define MIPS_REVISION_CORID_CORE_EMUL_MSC -2 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f) -extern unsigned int mips_revision_corid; +extern int mips_revision_corid; + +#define MIPS_REVISION_SCON_OTHER 0 +#define MIPS_REVISION_SCON_SOCITSC 1 +#define MIPS_REVISION_SCON_SOCITSCP 2 + +/* Artificial SCON defines for MIPS_REVISION_SCON_OTHER */ +#define MIPS_REVISION_SCON_UNKNOWN -1 +#define MIPS_REVISION_SCON_GT64120 -2 +#define MIPS_REVISION_SCON_BONITO -3 +#define MIPS_REVISION_SCON_BRTL -4 +#define MIPS_REVISION_SCON_SOCIT -5 +#define MIPS_REVISION_SCON_ROCIT -6 + +#define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff) + +extern int mips_revision_sconid; #ifdef CONFIG_PCI extern void mips_pcibios_init(void); diff --git a/include/asm-mips/mips-boards/msc01_pci.h b/include/asm-mips/mips-boards/msc01_pci.h index 8eaefb837b9d..e036b7dd6deb 100644 --- a/include/asm-mips/mips-boards/msc01_pci.h +++ b/include/asm-mips/mips-boards/msc01_pci.h @@ -208,6 +208,7 @@ * latter, they should be moved elsewhere. */ #define MIPS_MSC01_PCI_REG_BASE 0x1bd00000 +#define MIPS_SOCITSC_PCI_REG_BASE 0x1ff10000 extern unsigned long _pcictrl_msc; |