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authorMark Brown2022-07-29 20:22:22 +0100
committerMark Brown2022-07-29 20:22:22 +0100
commit69243df953e70c134c6735b31ba0e658c53d3cda (patch)
tree2200185c6a1673e3a73eeb2403a514e608b7c0dc /include
parent66bbf1441d218316948877f7ec6b477c9a49d554 (diff)
parenta1848b0fa2517a8d0bbc2783c90aefd4b7e7567a (diff)
Add SPI Driver to HPE GXP Architecture
Merge series from nick.hawkins@hpe.com <nick.hawkins@hpe.com>: The GXP supports 3 separate SPI interfaces to accommodate the system flash, core flash, and other functions. The SPI engine supports variable clock frequency, selectable 3-byte or 4-byte addressing and a configurable x1, x2, and x4 command/address/data modes. The memory buffer for reading and writing ranges between 256 bytes and 8KB. This driver supports access to the core flash and bios part.
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