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| author | Borislav Petkov | 2019-04-25 16:30:34 +0200 |
|---|---|---|
| committer | Borislav Petkov | 2019-04-25 16:30:34 +0200 |
| commit | 8de9930a4618811edfaebc4981a9fafff2af9170 (patch) | |
| tree | 4a57cfdb6282e1e8f788118829a1442f293d7814 /include | |
| parent | 74676a8e247a2163a25fb0ef98f17b74fbad9d21 (diff) | |
Revert "EDAC/amd64: Support more than two controllers for chip select handling"
This reverts commit 0a227af521d6df5286550b62f4b591417170b4ea.
Unfortunately, this commit caused wrong detection of chip select sizes
on some F17h client machines:
--- 00-rc6+ 2019-02-14 14:28:03.126622904 +0100
+++ 01-rc4+ 2019-04-14 21:06:16.060614790 +0200
EDAC amd64: MC: 0: 0MB 1: 0MB
-EDAC amd64: MC: 2: 16383MB 3: 16383MB
+EDAC amd64: MC: 2: 0MB 3: 2097151MB
EDAC amd64: MC: 4: 0MB 5: 0MB
EDAC amd64: MC: 6: 0MB 7: 0MB
EDAC MC: UMC1 chip selects:
EDAC amd64: MC: 0: 0MB 1: 0MB
-EDAC amd64: MC: 2: 16383MB 3: 16383MB
+EDAC amd64: MC: 2: 0MB 3: 2097151MB
EDAC amd64: MC: 4: 0MB 5: 0MB
EDAC amd64: MC: 6: 0MB 7: 0M
Revert it for now until it has been solved properly.
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Yazen Ghannam <yazen.ghannam@amd.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions