Merge tag 'pinctrl-v4.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the big bulk of pin control changes for the v4.14 kernel.
  There are just a few bigger changes (new drivers mostly) and then a
  lot of small patches all over the place.

  Core changes:
   - Decision to wrap the sleep mode of the Spreadtrum and in the future
     others into a specially tagged state. The generic DT bindings and
     the new Spreadtrum driver conforms to this. Others should be moved
     over if possible.

  New drivers:
   - Spreadtrum SoCs especially the SC9860 SoC.
   - Storlink/Cortina Gemini 3512 and 3516 SoCs.

  New subdrivers:
   - Intel Denverton subdriver.
   - Intel Cannon Lake subdriver.
   - Intel Lewisburg subdriver.
   - Allwinner sunxi: R40 subdriver for A10.
   - Socionext uniphier PXs3 subdriver.
   - Rockchip RK3128 subdriver.
   - Renesas SH-PFC R8A77995 subdriver.

  Miscellaneous:
   - Qualcomm APQ8064 can handle general purpose clock muxing.
   - Mediatek MT7623 PCIe mux data fixed up.
   - Intel GPIO IRQs are disabled during suspend.
   - Several fixes and addtions to Renesas r8a7796.
   - Qualcomm SPMI GPIO supports dtest route and LV/MV subtype.
   - Input schmitt trigger support in Rockchip RV1108.
   - Aspeed G4 and G5 USB host/device pin control control added.
   - Qualcomm IPQ4019 has matured with a few missing pin groups and
     control bits put in place.
   - Lots of constification, this is the latest in cocinelle fixes"

* tag 'pinctrl-v4.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (147 commits)
  Revert "pinctrl: sunxi: Don't enforce bias disable (for now)"
  pinctrl: uniphier: fix members of rmii group for Pro4
  pinctrl: Delete an error message
  pinctrl: core: Delete an error message
  pinctrl: intel: Read back TX buffer state
  pinctrl: rockchip: Add rv1108 recalculated iomux support
  pinctrl: intel: Decrease indentation in intel_gpio_set()
  pinctrl: rza1: Remove suffix from gpiochip label
  pinctrl: qcom: spmi-gpio: Correct power_source range check
  pinctrl: freescale: make mxs_regs const
  pinctrl: aspeed: Rework strap register write logic for the AST2500
  pinctrl: rza1: off by one in rza1_parse_gpiochip()
  pinctrl: qcom: General Purpose clocks for apq8064
  pinctrl: sprd: Add Spreadtrum pin control driver
  dt-bindings: pinctrl: Add DT bindings for Spreadtrum SC9860
  pinctrl: Add sleep related state to indicate sleep related configs
  pinctrl: mediatek: update PCIe mux data for MT7623
  pinctrl: intel: Add Intel Lewisburg GPIO support
  pinctrl: intel: Add Intel Cannon Lake PCH-H pin controller support
  pinctrl: aspeed: Fix ast2500 strap register write logic
  ...

4 files changed, 8 insertions, 3 deletions

diff --git a/include/dt-bindings/pinctrl/qcom,pmic-gpio.h b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
index d33f17c8a515..b8ff8824e21b 100644
--- a/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
+++ b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
@@ -98,6 +98,8 @@
 #define PMIC_GPIO_FUNC_PAIRED		"paired"
 #define PMIC_GPIO_FUNC_FUNC1		"func1"
 #define PMIC_GPIO_FUNC_FUNC2		"func2"
+#define PMIC_GPIO_FUNC_FUNC3		"func3"
+#define PMIC_GPIO_FUNC_FUNC4		"func4"
 #define PMIC_GPIO_FUNC_DTEST1		"dtest1"
 #define PMIC_GPIO_FUNC_DTEST2		"dtest2"
 #define PMIC_GPIO_FUNC_DTEST3		"dtest3"
diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h
index b7aa3646208b..ceb672305f59 100644
--- a/include/dt-bindings/pinctrl/samsung.h
+++ b/include/dt-bindings/pinctrl/samsung.h
@@ -66,7 +66,8 @@
 #define EXYNOS_PIN_FUNC_4		4
 #define EXYNOS_PIN_FUNC_5		5
 #define EXYNOS_PIN_FUNC_6		6
-#define EXYNOS_PIN_FUNC_F		0xf
+#define EXYNOS_PIN_FUNC_EINT		0xf
+#define EXYNOS_PIN_FUNC_F		EXYNOS_PIN_FUNC_EINT
 
 /* Drive strengths for Exynos7 FSYS1 block */
 #define EXYNOS7_FSYS1_PIN_DRV_LV1	0
diff --git a/include/linux/pinctrl/machine.h b/include/linux/pinctrl/machine.h
index e5b1716f98cc..7fa5d87190c2 100644
--- a/include/linux/pinctrl/machine.h
+++ b/include/linux/pinctrl/machine.h
@@ -152,12 +152,12 @@ struct pinctrl_map {
 
 #ifdef CONFIG_PINCTRL
 
-extern int pinctrl_register_mappings(struct pinctrl_map const *map,
+extern int pinctrl_register_mappings(const struct pinctrl_map *map,
 				unsigned num_maps);
 extern void pinctrl_provide_dummies(void);
 #else
 
-static inline int pinctrl_register_mappings(struct pinctrl_map const *map,
+static inline int pinctrl_register_mappings(const struct pinctrl_map *map,
 					   unsigned num_maps)
 {
 	return 0;
diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h
index e91d1b6a260d..5d8bc7f21c2a 100644
--- a/include/linux/pinctrl/pinconf-generic.h
+++ b/include/linux/pinctrl/pinconf-generic.h
@@ -86,6 +86,7 @@
  * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power
  *	supplies, the argument to this parameter (on a custom format) tells
  *	the driver which alternative power source to use.
+ * @PIN_CONFIG_SLEEP_HARDWARE_STATE: indicate this is sleep related state.
  * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to
  *	this parameter (on a custom format) tells the driver which alternative
  *	slew rate to use.
@@ -114,6 +115,7 @@ enum pin_config_param {
 	PIN_CONFIG_OUTPUT_ENABLE,
 	PIN_CONFIG_OUTPUT,
 	PIN_CONFIG_POWER_SOURCE,
+	PIN_CONFIG_SLEEP_HARDWARE_STATE,
 	PIN_CONFIG_SLEW_RATE,
 	PIN_CONFIG_END = 0x7F,
 	PIN_CONFIG_MAX = 0xFF,