diff options
| author | Pierre-Louis Bossart | 2020-11-12 10:30:57 -0600 |
|---|---|---|
| committer | Mark Brown | 2020-11-13 14:22:05 +0000 |
| commit | f026c123001bcc15b78311495cec79a8b73c3cf2 (patch) | |
| tree | 9b59792c2f72f347f6fd0aabf3e916f15f456f3a /include | |
| parent | a5a8ac3ca0000edee1270d1a9c8af7b415b4e618 (diff) | |
ASoC: topology: use inclusive language for bclk and fsync
Mirror suggested changes in alsa-lib.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20201112163100.5081-2-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/sound/soc-dai.h | 32 | ||||
| -rw-r--r-- | include/uapi/sound/asoc.h | 22 |
2 files changed, 34 insertions, 20 deletions
diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h index 7a85a6f83ca8..4bf759f025d2 100644 --- a/include/sound/soc-dai.h +++ b/include/sound/soc-dai.h @@ -72,21 +72,29 @@ struct snd_compr_stream; #define SND_SOC_DAIFMT_IB_IF (4 << 8) /* invert BCLK + FRM */ /* - * DAI hardware clock masters. + * DAI hardware clock providers/consumers * * This is wrt the codec, the inverse is true for the interface - * i.e. if the codec is clk and FRM master then the interface is - * clk and frame secondary. + * i.e. if the codec is clk and FRM provider then the interface is + * clk and frame consumer. */ -#define SND_SOC_DAIFMT_CBM_CFM (1 << 12) /* codec clk & FRM master */ -#define SND_SOC_DAIFMT_CBS_CFM (2 << 12) /* codec clk secondary & FRM master */ -#define SND_SOC_DAIFMT_CBM_CFS (3 << 12) /* codec clk master & frame secondary */ -#define SND_SOC_DAIFMT_CBS_CFS (4 << 12) /* codec clk & FRM secondary */ - -#define SND_SOC_DAIFMT_FORMAT_MASK 0x000f -#define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0 -#define SND_SOC_DAIFMT_INV_MASK 0x0f00 -#define SND_SOC_DAIFMT_MASTER_MASK 0xf000 +#define SND_SOC_DAIFMT_CBP_CFP (1 << 12) /* codec clk provider & frame provider */ +#define SND_SOC_DAIFMT_CBC_CFP (2 << 12) /* codec clk consumer & frame provider */ +#define SND_SOC_DAIFMT_CBP_CFC (3 << 12) /* codec clk provider & frame consumer */ +#define SND_SOC_DAIFMT_CBC_CFC (4 << 12) /* codec clk consumer & frame follower */ + +/* previous definitions kept for backwards-compatibility, do not use in new contributions */ +#define SND_SOC_DAIFMT_CBM_CFM SND_SOC_DAIFMT_CBP_CFP +#define SND_SOC_DAIFMT_CBS_CFM SND_SOC_DAIFMT_CBC_CFP +#define SND_SOC_DAIFMT_CBM_CFS SND_SOC_DAIFMT_CBP_CFC +#define SND_SOC_DAIFMT_CBS_CFS SND_SOC_DAIFMT_CBC_CFC + +#define SND_SOC_DAIFMT_FORMAT_MASK 0x000f +#define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0 +#define SND_SOC_DAIFMT_INV_MASK 0x0f00 +#define SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK 0xf000 + +#define SND_SOC_DAIFMT_MASTER_MASK SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK /* * Master Clock Directions diff --git a/include/uapi/sound/asoc.h b/include/uapi/sound/asoc.h index a74ca232f1fc..da61398b1f8f 100644 --- a/include/uapi/sound/asoc.h +++ b/include/uapi/sound/asoc.h @@ -170,16 +170,22 @@ #define SND_SOC_TPLG_LNK_FLGBIT_VOICE_WAKEUP (1 << 3) /* DAI topology BCLK parameter - * For the backwards capability, by default codec is bclk master + * For the backwards capability, by default codec is bclk provider */ -#define SND_SOC_TPLG_BCLK_CM 0 /* codec is bclk master */ -#define SND_SOC_TPLG_BCLK_CS 1 /* codec is bclk slave */ +#define SND_SOC_TPLG_BCLK_CP 0 /* codec is bclk provider */ +#define SND_SOC_TPLG_BCLK_CC 1 /* codec is bclk consumer */ +/* keep previous definitions for compatibility */ +#define SND_SOC_TPLG_BCLK_CM SND_SOC_TPLG_BCLK_CP +#define SND_SOC_TPLG_BCLK_CS SND_SOC_TPLG_BCLK_CC /* DAI topology FSYNC parameter - * For the backwards capability, by default codec is fsync master + * For the backwards capability, by default codec is fsync provider */ -#define SND_SOC_TPLG_FSYNC_CM 0 /* codec is fsync master */ -#define SND_SOC_TPLG_FSYNC_CS 1 /* codec is fsync slave */ +#define SND_SOC_TPLG_FSYNC_CP 0 /* codec is fsync provider */ +#define SND_SOC_TPLG_FSYNC_CC 1 /* codec is fsync consumer */ +/* keep previous definitions for compatibility */ +#define SND_SOC_TPLG_FSYNC_CM SND_SOC_TPLG_FSYNC_CP +#define SND_SOC_TPLG_FSYNC_CS SND_SOC_TPLG_FSYNC_CC /* * Block Header. @@ -336,8 +342,8 @@ struct snd_soc_tplg_hw_config { __u8 clock_gated; /* SND_SOC_TPLG_DAI_CLK_GATE_ value */ __u8 invert_bclk; /* 1 for inverted BCLK, 0 for normal */ __u8 invert_fsync; /* 1 for inverted frame clock, 0 for normal */ - __u8 bclk_master; /* SND_SOC_TPLG_BCLK_ value */ - __u8 fsync_master; /* SND_SOC_TPLG_FSYNC_ value */ + __u8 bclk_provider; /* SND_SOC_TPLG_BCLK_ value */ + __u8 fsync_provider; /* SND_SOC_TPLG_FSYNC_ value */ __u8 mclk_direction; /* SND_SOC_TPLG_MCLK_ value */ __le16 reserved; /* for 32bit alignment */ __le32 mclk_rate; /* MCLK or SYSCLK freqency in Hz */ |