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author | Andrew Y. Kuksov | 2015-07-14 16:23:25 +0300 |
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committer | Mark Brown | 2015-10-23 02:07:52 +0900 |
commit | 1476253cef9dbfc1f7f6a1bd19252ca528cd63bd (patch) | |
tree | 147550249f6d026795d7a6f3c838bcfa7d31c291 /kernel | |
parent | 6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f (diff) |
spi: imx: fix ecspi mode setup
Fixed problem with setting spi mode 0 or 1 after setting mode 2 or 3
SPI_MODE_0 and SPI_MODE_1 requires clock low when inactive. SPI_MODE_2
and SPI_MODE_3 requires clk high when inactive.
Currently driver can just set bits in fields SCLK_PHA (SPI Clock/Data
Phase Control), SCLK_POL (SPI Clock Polarity Control),
SCLK_CTL (controls the inactive state of SCLK) ans SS_POL (SPI SS
Polarity Select) of ECSPIx_CONFIGREG register.
This patch allows driver to clear corresponding bits in these fields.
Signed-off-by: Andrew Y. Kuksov <qxovxp@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'kernel')
0 files changed, 0 insertions, 0 deletions