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author | Tim Huang | 2022-08-15 13:03:49 +0800 |
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committer | Alex Deucher | 2022-08-25 13:52:48 -0400 |
commit | ad3b0b99113783f697579c7b09285916019865ea (patch) | |
tree | f15785748212ade8f9801033fb758e30085a18cc /lib/usercopy.c | |
parent | f461950fdc374a3ada5a63c669d997de4600dffe (diff) |
drm/amdgpu: add TX_POWER_CTRL_1 macro definitions for NBIO IP v7.7.0
Add the BIF0_PCIE_TX_POWER_CTRL_1 register offset and mask macro
definitions for AMD_CG_SUPPORT_BIF_LS.
Signed-off-by: Tim Huang <tim.huang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'lib/usercopy.c')
0 files changed, 0 insertions, 0 deletions