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author | Wyes Karny | 2023-05-30 13:13:48 +0000 |
---|---|---|
committer | Rafael J. Wysocki | 2023-06-16 19:30:47 +0200 |
commit | 217e67784eab30cd0704fab4109647ea68a4d850 (patch) | |
tree | 2c673698f6a75c745340cf6178c9ddbdd4909e1d /mm/damon | |
parent | b4a11fa3331e163e177e76098fe1d8b12b87cf6b (diff) |
cpufreq: amd-pstate: Write CPPC enable bit per-socket
Currently amd_pstate sets CPPC enable bit in MSR_AMD_CPPC_ENABLE only
for the CPU where the module_init happened. But MSR_AMD_CPPC_ENABLE is
per-socket. This causes CPPC enable bit to set for only one socket for
servers with more than one physical packages. To fix this write
MSR_AMD_CPPC_ENABLE per-socket.
Also, handle duplicate calls for cppc_enable, because it's called from
per-policy/per-core callbacks and can result in duplicate MSR writes.
Before the fix:
amd@amd:~$ sudo rdmsr -a 0xc00102b1 | uniq --count
192 0
192 1
After the fix:
amd@amd:~$ sudo rdmsr -a 0xc00102b1 | uniq --count
384 1
Suggested-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
Signed-off-by: Wyes Karny <wyes.karny@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'mm/damon')
0 files changed, 0 insertions, 0 deletions