diff options
| author | Brian Norris | 2013-11-14 14:41:32 -0800 |
|---|---|---|
| committer | Brian Norris | 2014-01-03 11:22:18 -0800 |
| commit | 6033a949b2c466a13e84daebd99fdca5960b4db5 (patch) | |
| tree | add88ef2dc320e2354ad390e0cb7018a95290e5d /mm/interval_tree.c | |
| parent | 87f5336eef63f0a1d1755cfe9392e2c414605780 (diff) | |
mtd: nand: pxa3xx: make ECC configuration checks more explicit
The Armada BCH configuration in this driver uses one of the two
following ECC schemes:
16-bit correction per 2048 bytes
16-bit correction per 1024 bytes
These are sufficient for mapping to the 4-bit per 512-bytes and 8-bit
per 512-bytes (respectively) minimum correctability requirements of many
common NAND.
The current code only checks for the required strength (4-bit or 8-bit)
without checking the ECC step size that is associated with that strength
(and simply assumes it is 512). While that is often a safe assumption to
make, let's make it explicit, since we have that information.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Diffstat (limited to 'mm/interval_tree.c')
0 files changed, 0 insertions, 0 deletions