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authorGrzegorz Jaszczyk2020-09-11 21:47:10 -0700
committerSantosh Shilimkar2020-09-11 21:47:10 -0700
commitba59c9b43c86b2c2396acac94e41d946cbaec9fe (patch)
treed0558763565d70c7a3966271566cac5f08939be0 /mm
parent25bafac9408f67873f03909401deecfb16974d84 (diff)
soc: ti: pruss: support CORECLK_MUX and IEPCLK_MUX
The IEPCLK_MUX is present on all SoCs whereas the CORECLK_MUX is present only on AM65x SoCs and J721E. Add support for both these CLK muxes. This allows the clock rates and clock parents for these to be controlled through DT leveraging the clk infrastructure for configuring the default parents and rates. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Diffstat (limited to 'mm')
0 files changed, 0 insertions, 0 deletions