diff options
| author | Oak Zeng | 2021-02-26 19:09:42 -0600 |
|---|---|---|
| committer | Christian König | 2021-04-08 12:21:22 +0200 |
| commit | b849bec29a991d25689507315db5641f7512def3 (patch) | |
| tree | d9a680a17eb0b19044deffad4bf33f9d53be78e1 /net/bridge | |
| parent | e92b0ff603435c200256524dd234618d91bbd8e1 (diff) | |
drm/ttm: ioremap buffer according to TTM mem caching setting
If tbo.mem.bus.caching is cached, buffer is intended to be mapped
as cached from CPU. Map it with ioremap_cache.
This wasn't necessary before as device memory was never mapped
as cached from CPU side. It becomes necessary for aldebaran as
device memory is mapped cached from CPU.
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Christian Konig <Christian.Koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1614638628-10508-1-git-send-email-Oak.Zeng@amd.com
Signed-off-by: Christian König <christian.koenig@amd.com>
Diffstat (limited to 'net/bridge')
0 files changed, 0 insertions, 0 deletions