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authorAmeya Palande2012-04-04 10:19:31 -0600
committerPaul Walmsley2012-04-04 14:52:49 -0600
commit91a290c4573679a70e242495ac3dbf12b39fb108 (patch)
tree7d1320c69fde7682e7a58a5c6d7465dff10048d6 /net/lapb
parent59269b94483eabeacbc9a535944b3dafac92a303 (diff)
ARM: OMAP4: clock data: fix mult and div mask for USB_DPLL
According to OMAP4 TRM Table 3-1183, CM_CLKSEL_DPLL_USB register defines following fields for multiplication and division factors: DPLL_MULT (bits 19:8) DPLL multiplier factor (2 to 4095) DPLL_DIV (bits 7:0) DPLL divider factor (0 to 255) Acked-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Ameya Palande <ameya.palande@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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