diff options
| author | Thomas Gleixner | 2014-06-19 21:52:23 +0000 |
|---|---|---|
| committer | Mike Turquette | 2014-07-13 07:11:40 -0700 |
| commit | 15ebb05248d025534773c9ef64915bd888f04e4b (patch) | |
| tree | 787b460d82493dbd8129865c317b620066395d06 /net/mpls | |
| parent | c556bcddc78096caeb46dbe3ad0314dd951f1665 (diff) | |
clk: spear3xx: Use proper control register offset
The control register is at offset 0x10, not 0x0. This is wreckaged
since commit 5df33a62c (SPEAr: Switch to common clock framework).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'net/mpls')
0 files changed, 0 insertions, 0 deletions