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authorFlorian Fainelli2020-04-30 11:49:09 -0700
committerDavid S. Miller2020-04-30 17:43:29 -0700
commite3da4038f4ca1094596a7604c6edac4a6a4f6ee9 (patch)
tree8b54bd53a2866b5acc6126d83bcaa1ee8bb58b51 /samples
parent673e69a67dd63fc3b40f109d1677a5dc72185fbb (diff)
net: dsa: b53: Provide number of ARL buckets
In preparation for doing proper upper bound checking of FDB/MDB entries being added to the ARL, provide the number of ARL buckets for each switch chip we support. All chips have 1024 buckets, except 7278 which has only 256. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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