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authorJiri Kosina2011-11-13 20:55:35 +0100
committerJiri Kosina2011-11-13 20:55:53 +0100
commit2290c0d06d82faee87b1ab2d9d4f7bf81ef64379 (patch)
treee075e4d5534193f28e6059904f61e5ca03958d3c /sound/soc/codecs/tlv320aic32x4.c
parent4da669a2e3e5bc70b30a0465f3641528681b5f77 (diff)
parent52e4c2a05256cb83cda12f3c2137ab1533344edb (diff)
Merge branch 'master' into for-next
Sync with Linus tree to have 157550ff ("mtd: add GPMI-NAND driver in the config and Makefile") as I have patch depending on that one.
Diffstat (limited to 'sound/soc/codecs/tlv320aic32x4.c')
-rw-r--r--sound/soc/codecs/tlv320aic32x4.c65
1 files changed, 26 insertions, 39 deletions
diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c
index e93b9d1ae1dd..b21c610051c0 100644
--- a/sound/soc/codecs/tlv320aic32x4.c
+++ b/sound/soc/codecs/tlv320aic32x4.c
@@ -528,40 +528,33 @@ static int aic32x4_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level)
{
struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec);
- u8 value;
switch (level) {
case SND_SOC_BIAS_ON:
if (aic32x4->master) {
/* Switch on PLL */
- value = snd_soc_read(codec, AIC32X4_PLLPR);
- snd_soc_write(codec, AIC32X4_PLLPR,
- (value | AIC32X4_PLLEN));
+ snd_soc_update_bits(codec, AIC32X4_PLLPR,
+ AIC32X4_PLLEN, AIC32X4_PLLEN);
/* Switch on NDAC Divider */
- value = snd_soc_read(codec, AIC32X4_NDAC);
- snd_soc_write(codec, AIC32X4_NDAC,
- value | AIC32X4_NDACEN);
+ snd_soc_update_bits(codec, AIC32X4_NDAC,
+ AIC32X4_NDACEN, AIC32X4_NDACEN);
/* Switch on MDAC Divider */
- value = snd_soc_read(codec, AIC32X4_MDAC);
- snd_soc_write(codec, AIC32X4_MDAC,
- value | AIC32X4_MDACEN);
+ snd_soc_update_bits(codec, AIC32X4_MDAC,
+ AIC32X4_MDACEN, AIC32X4_MDACEN);
/* Switch on NADC Divider */
- value = snd_soc_read(codec, AIC32X4_NADC);
- snd_soc_write(codec, AIC32X4_NADC,
- value | AIC32X4_MDACEN);
+ snd_soc_update_bits(codec, AIC32X4_NADC,
+ AIC32X4_NADCEN, AIC32X4_NADCEN);
/* Switch on MADC Divider */
- value = snd_soc_read(codec, AIC32X4_MADC);
- snd_soc_write(codec, AIC32X4_MADC,
- value | AIC32X4_MDACEN);
+ snd_soc_update_bits(codec, AIC32X4_MADC,
+ AIC32X4_MADCEN, AIC32X4_MADCEN);
/* Switch on BCLK_N Divider */
- value = snd_soc_read(codec, AIC32X4_BCLKN);
- snd_soc_write(codec, AIC32X4_BCLKN,
- value | AIC32X4_BCLKEN);
+ snd_soc_update_bits(codec, AIC32X4_BCLKN,
+ AIC32X4_BCLKEN, AIC32X4_BCLKEN);
}
break;
case SND_SOC_BIAS_PREPARE:
@@ -569,34 +562,28 @@ static int aic32x4_set_bias_level(struct snd_soc_codec *codec,
case SND_SOC_BIAS_STANDBY:
if (aic32x4->master) {
/* Switch off PLL */
- value = snd_soc_read(codec, AIC32X4_PLLPR);
- snd_soc_write(codec, AIC32X4_PLLPR,
- (value & ~AIC32X4_PLLEN));
+ snd_soc_update_bits(codec, AIC32X4_PLLPR,
+ AIC32X4_PLLEN, 0);
/* Switch off NDAC Divider */
- value = snd_soc_read(codec, AIC32X4_NDAC);
- snd_soc_write(codec, AIC32X4_NDAC,
- value & ~AIC32X4_NDACEN);
+ snd_soc_update_bits(codec, AIC32X4_NDAC,
+ AIC32X4_NDACEN, 0);
/* Switch off MDAC Divider */
- value = snd_soc_read(codec, AIC32X4_MDAC);
- snd_soc_write(codec, AIC32X4_MDAC,
- value & ~AIC32X4_MDACEN);
+ snd_soc_update_bits(codec, AIC32X4_MDAC,
+ AIC32X4_MDACEN, 0);
/* Switch off NADC Divider */
- value = snd_soc_read(codec, AIC32X4_NADC);
- snd_soc_write(codec, AIC32X4_NADC,
- value & ~AIC32X4_NDACEN);
+ snd_soc_update_bits(codec, AIC32X4_NADC,
+ AIC32X4_NADCEN, 0);
/* Switch off MADC Divider */
- value = snd_soc_read(codec, AIC32X4_MADC);
- snd_soc_write(codec, AIC32X4_MADC,
- value & ~AIC32X4_MDACEN);
- value = snd_soc_read(codec, AIC32X4_BCLKN);
+ snd_soc_update_bits(codec, AIC32X4_MADC,
+ AIC32X4_MADCEN, 0);
/* Switch off BCLK_N Divider */
- snd_soc_write(codec, AIC32X4_BCLKN,
- value & ~AIC32X4_BCLKEN);
+ snd_soc_update_bits(codec, AIC32X4_BCLKN,
+ AIC32X4_BCLKEN, 0);
}
break;
case SND_SOC_BIAS_OFF:
@@ -685,10 +672,10 @@ static int aic32x4_probe(struct snd_soc_codec *codec)
}
/* Mic PGA routing */
- if (aic32x4->micpga_routing | AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K) {
+ if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K) {
snd_soc_write(codec, AIC32X4_LMICPGANIN, AIC32X4_LMICPGANIN_IN2R_10K);
}
- if (aic32x4->micpga_routing | AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K) {
+ if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K) {
snd_soc_write(codec, AIC32X4_RMICPGANIN, AIC32X4_RMICPGANIN_IN1L_10K);
}