diff options
author | Linus Torvalds | 2010-05-19 11:37:22 -0700 |
---|---|---|
committer | Linus Torvalds | 2010-05-19 11:37:22 -0700 |
commit | 1d3c6ff44ad4b5f113602e153026a338f0f9b3ff (patch) | |
tree | 1e1f2932634fc6d0e4acfe68496c1c727b83a13e /sound | |
parent | 7c7cbaf5b82c418cd3b1dcf718f71d0e6057e639 (diff) | |
parent | 717e7c2672e37253a4d3aa70e4716b5b0a658761 (diff) |
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (224 commits)
ARM: remove 'select GENERIC_TIME'
ARM: 6136/1: ARCH_REQUIRE_GPIOLIB selects GENERIC_GPIO
ARM: 6074/1: oprofile: convert from sysdev to platform device
ARM: 6073/1: oprofile: remove old files and update KConfig
ARM: 6072/1: oprofile: use perf-events framework as backend
ARM: 6071/1: perf-events: allow modules to query the number of hardware counters
ARM: 6070/1: perf-events: add support for xscale PMUs
ARM: 6069/1: perf-events: use numeric ID to identify PMU
ARM: 6064/1: pmu: register IRQs at runtime
ARM: Optionally allow ARMv6 to use 'normal, bufferable' memory for DMA
ARM: 6134/1: Handle instruction cache maintenance fault properly
ARM: nwfpe: allow debugging output to be configured at runtime
ARM: rename mach_cpu_disable() to platform_cpu_disable()
ARM: 6132/1: PL330: Add common core driver
ARM: 6094/1: Extend cache-l2x0 to support the 16-way PL310
ARM: Move memory mapping into mmu.c
ARM: Ensure meminfo is sorted prior to sanity_check_meminfo
ARM: Remove useless linux/bootmem.h includes
ARM: convert /proc/cpu/aligment to seq_file
arm: use asm-generic/scatterlist.h
...
Diffstat (limited to 'sound')
-rw-r--r-- | sound/soc/pxa/Kconfig | 1 | ||||
-rw-r--r-- | sound/soc/pxa/pxa-ssp.c | 135 |
2 files changed, 68 insertions, 68 deletions
diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig index 376e14a9c273..78e612100782 100644 --- a/sound/soc/pxa/Kconfig +++ b/sound/soc/pxa/Kconfig @@ -23,6 +23,7 @@ config SND_PXA2XX_SOC_I2S config SND_PXA_SOC_SSP tristate + select PXA_SSP config SND_PXA2XX_SOC_CORGI tristate "SoC Audio support for Sharp Zaurus SL-C7x0" diff --git a/sound/soc/pxa/pxa-ssp.c b/sound/soc/pxa/pxa-ssp.c index 544fd9566f4d..a1fd23e0e3d0 100644 --- a/sound/soc/pxa/pxa-ssp.c +++ b/sound/soc/pxa/pxa-ssp.c @@ -32,9 +32,8 @@ #include <mach/hardware.h> #include <mach/dma.h> -#include <mach/regs-ssp.h> #include <mach/audio.h> -#include <mach/ssp.h> +#include <plat/ssp.h> #include "pxa2xx-pcm.h" #include "pxa-ssp.h" @@ -57,15 +56,15 @@ struct ssp_priv { static void dump_registers(struct ssp_device *ssp) { dev_dbg(&ssp->pdev->dev, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n", - ssp_read_reg(ssp, SSCR0), ssp_read_reg(ssp, SSCR1), - ssp_read_reg(ssp, SSTO)); + pxa_ssp_read_reg(ssp, SSCR0), pxa_ssp_read_reg(ssp, SSCR1), + pxa_ssp_read_reg(ssp, SSTO)); dev_dbg(&ssp->pdev->dev, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n", - ssp_read_reg(ssp, SSPSP), ssp_read_reg(ssp, SSSR), - ssp_read_reg(ssp, SSACD)); + pxa_ssp_read_reg(ssp, SSPSP), pxa_ssp_read_reg(ssp, SSSR), + pxa_ssp_read_reg(ssp, SSACD)); } -static void ssp_enable(struct ssp_device *ssp) +static void pxa_ssp_enable(struct ssp_device *ssp) { uint32_t sscr0; @@ -73,7 +72,7 @@ static void ssp_enable(struct ssp_device *ssp) __raw_writel(sscr0, ssp->mmio_base + SSCR0); } -static void ssp_disable(struct ssp_device *ssp) +static void pxa_ssp_disable(struct ssp_device *ssp) { uint32_t sscr0; @@ -87,7 +86,7 @@ struct pxa2xx_pcm_dma_data { }; static struct pxa2xx_pcm_dma_params * -ssp_get_dma_params(struct ssp_device *ssp, int width4, int out) +pxa_ssp_get_dma_params(struct ssp_device *ssp, int width4, int out) { struct pxa2xx_pcm_dma_data *dma; @@ -119,7 +118,7 @@ static int pxa_ssp_startup(struct snd_pcm_substream *substream, if (!cpu_dai->active) { clk_enable(ssp->clk); - ssp_disable(ssp); + pxa_ssp_disable(ssp); } kfree(snd_soc_dai_get_dma_data(cpu_dai, substream)); @@ -137,7 +136,7 @@ static void pxa_ssp_shutdown(struct snd_pcm_substream *substream, struct ssp_device *ssp = priv->ssp; if (!cpu_dai->active) { - ssp_disable(ssp); + pxa_ssp_disable(ssp); clk_disable(ssp->clk); } @@ -160,7 +159,7 @@ static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai) priv->to = __raw_readl(ssp->mmio_base + SSTO); priv->psp = __raw_readl(ssp->mmio_base + SSPSP); - ssp_disable(ssp); + pxa_ssp_disable(ssp); clk_disable(ssp->clk); return 0; } @@ -180,7 +179,7 @@ static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai) __raw_writel(priv->psp, ssp->mmio_base + SSPSP); if (cpu_dai->active) - ssp_enable(ssp); + pxa_ssp_enable(ssp); else clk_disable(ssp->clk); @@ -196,9 +195,9 @@ static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai) * ssp_set_clkdiv - set SSP clock divider * @div: serial clock rate divider */ -static void ssp_set_scr(struct ssp_device *ssp, u32 div) +static void pxa_ssp_set_scr(struct ssp_device *ssp, u32 div) { - u32 sscr0 = ssp_read_reg(ssp, SSCR0); + u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0); if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) { sscr0 &= ~0x0000ff00; @@ -207,15 +206,15 @@ static void ssp_set_scr(struct ssp_device *ssp, u32 div) sscr0 &= ~0x000fff00; sscr0 |= (div - 1) << 8; /* 1..4096 */ } - ssp_write_reg(ssp, SSCR0, sscr0); + pxa_ssp_write_reg(ssp, SSCR0, sscr0); } /** - * ssp_get_clkdiv - get SSP clock divider + * pxa_ssp_get_clkdiv - get SSP clock divider */ -static u32 ssp_get_scr(struct ssp_device *ssp) +static u32 pxa_ssp_get_scr(struct ssp_device *ssp) { - u32 sscr0 = ssp_read_reg(ssp, SSCR0); + u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0); u32 div; if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) @@ -235,7 +234,7 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai, struct ssp_device *ssp = priv->ssp; int val; - u32 sscr0 = ssp_read_reg(ssp, SSCR0) & + u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS); dev_dbg(&ssp->pdev->dev, @@ -263,7 +262,7 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai, break; case PXA_SSP_CLK_AUDIO: priv->sysclk = 0; - ssp_set_scr(ssp, 1); + pxa_ssp_set_scr(ssp, 1); sscr0 |= SSCR0_ACS; break; default: @@ -274,8 +273,8 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai, * on PXA2xx. On PXA3xx it must be enabled when doing so. */ if (!cpu_is_pxa3xx()) clk_disable(ssp->clk); - val = ssp_read_reg(ssp, SSCR0) | sscr0; - ssp_write_reg(ssp, SSCR0, val); + val = pxa_ssp_read_reg(ssp, SSCR0) | sscr0; + pxa_ssp_write_reg(ssp, SSCR0, val); if (!cpu_is_pxa3xx()) clk_enable(ssp->clk); @@ -294,11 +293,11 @@ static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai, switch (div_id) { case PXA_SSP_AUDIO_DIV_ACDS: - val = (ssp_read_reg(ssp, SSACD) & ~0x7) | SSACD_ACDS(div); - ssp_write_reg(ssp, SSACD, val); + val = (pxa_ssp_read_reg(ssp, SSACD) & ~0x7) | SSACD_ACDS(div); + pxa_ssp_write_reg(ssp, SSACD, val); break; case PXA_SSP_AUDIO_DIV_SCDB: - val = ssp_read_reg(ssp, SSACD); + val = pxa_ssp_read_reg(ssp, SSACD); val &= ~SSACD_SCDB; #if defined(CONFIG_PXA3xx) if (cpu_is_pxa3xx()) @@ -321,10 +320,10 @@ static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai, default: return -EINVAL; } - ssp_write_reg(ssp, SSACD, val); + pxa_ssp_write_reg(ssp, SSACD, val); break; case PXA_SSP_DIV_SCR: - ssp_set_scr(ssp, div); + pxa_ssp_set_scr(ssp, div); break; default: return -ENODEV; @@ -341,11 +340,11 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id, { struct ssp_priv *priv = cpu_dai->private_data; struct ssp_device *ssp = priv->ssp; - u32 ssacd = ssp_read_reg(ssp, SSACD) & ~0x70; + u32 ssacd = pxa_ssp_read_reg(ssp, SSACD) & ~0x70; #if defined(CONFIG_PXA3xx) if (cpu_is_pxa3xx()) - ssp_write_reg(ssp, SSACDD, 0); + pxa_ssp_write_reg(ssp, SSACDD, 0); #endif switch (freq_out) { @@ -383,7 +382,7 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id, val = tmp; val = (val << 16) | 64; - ssp_write_reg(ssp, SSACDD, val); + pxa_ssp_write_reg(ssp, SSACDD, val); ssacd |= (0x6 << 4); @@ -397,7 +396,7 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id, return -EINVAL; } - ssp_write_reg(ssp, SSACD, ssacd); + pxa_ssp_write_reg(ssp, SSACD, ssacd); return 0; } @@ -412,7 +411,7 @@ static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai, struct ssp_device *ssp = priv->ssp; u32 sscr0; - sscr0 = ssp_read_reg(ssp, SSCR0); + sscr0 = pxa_ssp_read_reg(ssp, SSCR0); sscr0 &= ~(SSCR0_MOD | SSCR0_SlotsPerFrm(8) | SSCR0_EDSS | SSCR0_DSS); /* set slot width */ @@ -429,10 +428,10 @@ static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai, sscr0 |= SSCR0_SlotsPerFrm(slots); /* set active slot mask */ - ssp_write_reg(ssp, SSTSA, tx_mask); - ssp_write_reg(ssp, SSRSA, rx_mask); + pxa_ssp_write_reg(ssp, SSTSA, tx_mask); + pxa_ssp_write_reg(ssp, SSRSA, rx_mask); } - ssp_write_reg(ssp, SSCR0, sscr0); + pxa_ssp_write_reg(ssp, SSCR0, sscr0); return 0; } @@ -447,12 +446,12 @@ static int pxa_ssp_set_dai_tristate(struct snd_soc_dai *cpu_dai, struct ssp_device *ssp = priv->ssp; u32 sscr1; - sscr1 = ssp_read_reg(ssp, SSCR1); + sscr1 = pxa_ssp_read_reg(ssp, SSCR1); if (tristate) sscr1 &= ~SSCR1_TTE; else sscr1 |= SSCR1_TTE; - ssp_write_reg(ssp, SSCR1, sscr1); + pxa_ssp_write_reg(ssp, SSCR1, sscr1); return 0; } @@ -476,14 +475,14 @@ static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai, return 0; /* we can only change the settings if the port is not in use */ - if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) { + if (pxa_ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) { dev_err(&ssp->pdev->dev, "can't change hardware dai format: stream is in use"); return -EINVAL; } /* reset port settings */ - sscr0 = ssp_read_reg(ssp, SSCR0) & + sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & (SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS); sscr1 = SSCR1_RxTresh(8) | SSCR1_TxTresh(7); sspsp = 0; @@ -535,9 +534,9 @@ static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai, return -EINVAL; } - ssp_write_reg(ssp, SSCR0, sscr0); - ssp_write_reg(ssp, SSCR1, sscr1); - ssp_write_reg(ssp, SSPSP, sspsp); + pxa_ssp_write_reg(ssp, SSCR0, sscr0); + pxa_ssp_write_reg(ssp, SSCR1, sscr1); + pxa_ssp_write_reg(ssp, SSPSP, sspsp); dump_registers(ssp); @@ -566,7 +565,7 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream, u32 sscr0; u32 sspsp; int width = snd_pcm_format_physical_width(params_format(params)); - int ttsa = ssp_read_reg(ssp, SSTSA) & 0xf; + int ttsa = pxa_ssp_read_reg(ssp, SSTSA) & 0xf; struct pxa2xx_pcm_dma_params *dma_data; dma_data = snd_soc_dai_get_dma_data(dai, substream); @@ -578,22 +577,22 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream, * to force 16-bit frame width on the wire (for S16_LE), even * with two channels. Use 16-bit DMA transfers for this case. */ - dma_data = ssp_get_dma_params(ssp, + dma_data = pxa_ssp_get_dma_params(ssp, ((chn == 2) && (ttsa != 1)) || (width == 32), substream->stream == SNDRV_PCM_STREAM_PLAYBACK); snd_soc_dai_set_dma_data(dai, substream, dma_data); /* we can only change the settings if the port is not in use */ - if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) + if (pxa_ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) return 0; /* clear selected SSP bits */ - sscr0 = ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS); - ssp_write_reg(ssp, SSCR0, sscr0); + sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS); + pxa_ssp_write_reg(ssp, SSCR0, sscr0); /* bit size */ - sscr0 = ssp_read_reg(ssp, SSCR0); + sscr0 = pxa_ssp_read_reg(ssp, SSCR0); switch (params_format(params)) { case SNDRV_PCM_FORMAT_S16_LE: #ifdef CONFIG_PXA3xx @@ -609,13 +608,13 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream, sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(16)); break; } - ssp_write_reg(ssp, SSCR0, sscr0); + pxa_ssp_write_reg(ssp, SSCR0, sscr0); switch (priv->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) { case SND_SOC_DAIFMT_I2S: - sspsp = ssp_read_reg(ssp, SSPSP); + sspsp = pxa_ssp_read_reg(ssp, SSPSP); - if ((ssp_get_scr(ssp) == 4) && (width == 16)) { + if ((pxa_ssp_get_scr(ssp) == 4) && (width == 16)) { /* This is a special case where the bitclk is 64fs * and we're not dealing with 2*32 bits of audio * samples. @@ -649,7 +648,7 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream, sspsp |= SSPSP_DMYSTRT(1); } - ssp_write_reg(ssp, SSPSP, sspsp); + pxa_ssp_write_reg(ssp, SSPSP, sspsp); break; default: break; @@ -680,45 +679,45 @@ static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd, switch (cmd) { case SNDRV_PCM_TRIGGER_RESUME: - ssp_enable(ssp); + pxa_ssp_enable(ssp); break; case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - val = ssp_read_reg(ssp, SSCR1); + val = pxa_ssp_read_reg(ssp, SSCR1); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) val |= SSCR1_TSRE; else val |= SSCR1_RSRE; - ssp_write_reg(ssp, SSCR1, val); - val = ssp_read_reg(ssp, SSSR); - ssp_write_reg(ssp, SSSR, val); + pxa_ssp_write_reg(ssp, SSCR1, val); + val = pxa_ssp_read_reg(ssp, SSSR); + pxa_ssp_write_reg(ssp, SSSR, val); break; case SNDRV_PCM_TRIGGER_START: - val = ssp_read_reg(ssp, SSCR1); + val = pxa_ssp_read_reg(ssp, SSCR1); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) val |= SSCR1_TSRE; else val |= SSCR1_RSRE; - ssp_write_reg(ssp, SSCR1, val); - ssp_enable(ssp); + pxa_ssp_write_reg(ssp, SSCR1, val); + pxa_ssp_enable(ssp); break; case SNDRV_PCM_TRIGGER_STOP: - val = ssp_read_reg(ssp, SSCR1); + val = pxa_ssp_read_reg(ssp, SSCR1); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) val &= ~SSCR1_TSRE; else val &= ~SSCR1_RSRE; - ssp_write_reg(ssp, SSCR1, val); + pxa_ssp_write_reg(ssp, SSCR1, val); break; case SNDRV_PCM_TRIGGER_SUSPEND: - ssp_disable(ssp); + pxa_ssp_disable(ssp); break; case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - val = ssp_read_reg(ssp, SSCR1); + val = pxa_ssp_read_reg(ssp, SSCR1); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) val &= ~SSCR1_TSRE; else val &= ~SSCR1_RSRE; - ssp_write_reg(ssp, SSCR1, val); + pxa_ssp_write_reg(ssp, SSCR1, val); break; default: @@ -740,7 +739,7 @@ static int pxa_ssp_probe(struct platform_device *pdev, if (!priv) return -ENOMEM; - priv->ssp = ssp_request(dai->id + 1, "SoC audio"); + priv->ssp = pxa_ssp_request(dai->id + 1, "SoC audio"); if (priv->ssp == NULL) { ret = -ENODEV; goto err_priv; @@ -760,7 +759,7 @@ static void pxa_ssp_remove(struct platform_device *pdev, struct snd_soc_dai *dai) { struct ssp_priv *priv = dai->private_data; - ssp_free(priv->ssp); + pxa_ssp_free(priv->ssp); } #define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ |