aboutsummaryrefslogtreecommitdiff
path: root/sound
diff options
context:
space:
mode:
authorJeeja KP2015-08-21 21:36:17 +0530
committerTakashi Iwai2015-08-21 19:28:16 +0200
commita7e3dd85cab1c6990cafd0bedb0b8809f15149b0 (patch)
tree5c31faddd30724d7baea324c2644a0626d784cbe /sound
parent9bc07dfbcde5b6f3aefa06b902b47eef9769d260 (diff)
ALSA: hdac: Fix to read the correct offset of spcap/link register
SPCAP and Mutilink register offset were incorrect as offset needs to be based on capability offset. So correct the offset for read/write of spcap/link register. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound')
-rw-r--r--sound/hda/ext/hdac_ext_controller.c10
-rw-r--r--sound/hda/ext/hdac_ext_stream.c2
2 files changed, 6 insertions, 6 deletions
diff --git a/sound/hda/ext/hdac_ext_controller.c b/sound/hda/ext/hdac_ext_controller.c
index 358f16195483..d3bb112754f2 100644
--- a/sound/hda/ext/hdac_ext_controller.c
+++ b/sound/hda/ext/hdac_ext_controller.c
@@ -177,8 +177,8 @@ int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_ext_bus *ebus)
hlink->bus = bus;
hlink->ml_addr = ebus->mlcap + AZX_ML_BASE +
(AZX_ML_INTERVAL * idx);
- hlink->lcaps = snd_hdac_chip_readl(bus, ML_LCAP);
- hlink->lsdiid = snd_hdac_chip_readw(bus, ML_LSDIID);
+ hlink->lcaps = readl(hlink->ml_addr + AZX_REG_ML_LCAP);
+ hlink->lsdiid = readw(hlink->ml_addr + AZX_REG_ML_LSDIID);
list_add_tail(&hlink->list, &ebus->hlink_list);
}
@@ -243,7 +243,7 @@ static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable)
timeout = 50;
do {
- val = snd_hdac_chip_readl(link->bus, ML_LCTL);
+ val = readl(link->ml_addr + AZX_REG_ML_LCTL);
if (enable) {
if (((val & mask) >> AZX_MLCTL_CPA))
return 0;
@@ -263,7 +263,7 @@ static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable)
*/
int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link)
{
- snd_hdac_chip_updatel(link->bus, ML_LCTL, 0, AZX_MLCTL_SPA);
+ snd_hdac_updatel(link->ml_addr, AZX_REG_ML_LCTL, 0, AZX_MLCTL_SPA);
return check_hdac_link_power_active(link, true);
}
@@ -275,7 +275,7 @@ EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up);
*/
int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link)
{
- snd_hdac_chip_updatel(link->bus, ML_LCTL, AZX_MLCTL_SPA, 0);
+ snd_hdac_updatel(link->ml_addr, AZX_REG_ML_LCTL, AZX_MLCTL_SPA, 0);
return check_hdac_link_power_active(link, false);
}
diff --git a/sound/hda/ext/hdac_ext_stream.c b/sound/hda/ext/hdac_ext_stream.c
index 3de47dd1a76d..b649625f43a4 100644
--- a/sound/hda/ext/hdac_ext_stream.c
+++ b/sound/hda/ext/hdac_ext_stream.c
@@ -423,7 +423,7 @@ void snd_hdac_ext_stream_spbcap_enable(struct hdac_ext_bus *ebus,
mask |= (1 << index);
- register_mask = snd_hdac_chip_readl(bus, SPB_SPBFCCTL);
+ register_mask = readl(ebus->spbcap + AZX_REG_SPB_SPBFCCTL);
mask |= register_mask;