diff options
| author | Ravi Bangoria | 2019-10-17 15:02:04 +0530 |
|---|---|---|
| committer | Michael Ellerman | 2019-11-13 16:58:04 +1100 |
| commit | 5dc7b419a5a746db6941154b06b932eaf2e692df (patch) | |
| tree | 68f80187b4bc7da91c1ada39906e7b3aa3bed26e /tools/testing/selftests/powerpc | |
| parent | 949758a2f4e606a2575b3cfd0ea22c1d4784c673 (diff) | |
powerpc/watchpoint: Support for 8xx in ptrace-hwbreak.c selftest
On the 8xx, signals are generated after executing the instruction. So
no need to manually single-step on 8xx. Also, 8xx __set_dabr()
currently ignores length and hardcodes the length to 8 bytes. So all
unaligned and 512 byte testcase will fail on 8xx. Ignore those
testcases on 8xx.
Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20191017093204.7511-8-ravi.bangoria@linux.ibm.com
Diffstat (limited to 'tools/testing/selftests/powerpc')
| -rw-r--r-- | tools/testing/selftests/powerpc/ptrace/ptrace-hwbreak.c | 32 |
1 files changed, 23 insertions, 9 deletions
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-hwbreak.c b/tools/testing/selftests/powerpc/ptrace/ptrace-hwbreak.c index 916e97f5f8b1..7deedbc16b0b 100644 --- a/tools/testing/selftests/powerpc/ptrace/ptrace-hwbreak.c +++ b/tools/testing/selftests/powerpc/ptrace/ptrace-hwbreak.c @@ -22,6 +22,11 @@ #include <sys/wait.h> #include "ptrace.h" +#define SPRN_PVR 0x11F +#define PVR_8xx 0x00500000 + +bool is_8xx; + /* * Use volatile on all global var so that compiler doesn't * optimise their load/stores. Otherwise selftest can fail. @@ -205,13 +210,15 @@ static void check_success(pid_t child_pid, const char *name, const char *type, printf("%s, %s, len: %d: Ok\n", name, type, len); - /* - * For ptrace registered watchpoint, signal is generated - * before executing load/store. Singlestep the instruction - * and then continue the test. - */ - ptrace(PTRACE_SINGLESTEP, child_pid, NULL, 0); - wait(NULL); + if (!is_8xx) { + /* + * For ptrace registered watchpoint, signal is generated + * before executing load/store. Singlestep the instruction + * and then continue the test. + */ + ptrace(PTRACE_SINGLESTEP, child_pid, NULL, 0); + wait(NULL); + } } static void ptrace_set_debugreg(pid_t child_pid, unsigned long wp_addr) @@ -447,8 +454,10 @@ run_tests(pid_t child_pid, struct ppc_debug_info *dbginfo, bool dawr) test_set_debugreg(child_pid); if (dbginfo->features & PPC_DEBUG_FEATURE_DATA_BP_RANGE) { test_sethwdebug_exact(child_pid); - test_sethwdebug_range_aligned(child_pid); - if (dawr) { + + if (!is_8xx) + test_sethwdebug_range_aligned(child_pid); + if (dawr && !is_8xx) { test_sethwdebug_range_unaligned(child_pid); test_sethwdebug_range_unaligned_dar(child_pid); test_sethwdebug_dawr_max_range(child_pid); @@ -489,5 +498,10 @@ static int ptrace_hwbreak(void) int main(int argc, char **argv, char **envp) { + int pvr = 0; + asm __volatile__ ("mfspr %0,%1" : "=r"(pvr) : "i"(SPRN_PVR)); + if (pvr == PVR_8xx) + is_8xx = true; + return test_harness(ptrace_hwbreak, "ptrace-hwbreak"); } |