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authorLen Brown2014-08-15 02:39:52 -0400
committerLen Brown2015-02-09 16:44:24 -0500
commit3a9a941d0b9361eac81fb763a89fb465f70b1c28 (patch)
treef596891938916502c5ec83c5bfc2b8a228d06f60 /tools/testing
parent98481e79b60a50d699b79292ff1b7e56e7fa8425 (diff)
tools/power turbostat: decode MSR_*_PERF_LIMIT_REASONS
The Processor generation code-named Haswell added MSR_{CORE | GFX | RING}_PERF_LIMIT_REASONS to explain when and how the processor limits frequency. turbostat -v will now decode these bits. Each MSR has an "Active" set of bits which describe current conditions, and a "Logged" set of bits, which describe what has happened since last cleared. Turbostat currently doesn't clear the log bits. Signed-off-by: Len Brown <len.brown@intel.com>
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