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authorChanho Park2022-07-29 09:30:24 +0900
committerKrzysztof Kozlowski2022-08-23 09:21:57 +0300
commit65522e7d86c986df77bd3106de1ef7712070ee7e (patch)
tree95ed8cfd13924d176cea0102deff4d8ad716635a /virt
parent3477b3c3a9fbb6422874c7f24a35249e1773c687 (diff)
clk: samsung: exynosautov9: add fsys1 clock support
CMU_FSYS1 provides clocks for USB(2 x USB3.1 Gen-1, 2 x USB 2.0) and mmc. For MMC clocks, PLL_MMC(PLL0831X type) is also supported as a PLL source clock provider. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/d4aa967538fed9667e9550a256e545026fc2fa8d.1659054220.git.chanho61.park@samsung.com
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