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-rw-r--r--Documentation/devicetree/bindings/display/msm/dp-controller.yaml25
-rw-r--r--Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml9
-rw-r--r--Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml10
-rw-r--r--drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c5
-rw-r--r--drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c2
-rw-r--r--drivers/gpu/drm/msm/dp/dp_aux.c90
-rw-r--r--drivers/gpu/drm/msm/dp/dp_aux.h2
-rw-r--r--drivers/gpu/drm/msm/dp/dp_catalog.c2
-rw-r--r--drivers/gpu/drm/msm/dp/dp_catalog.h2
-rw-r--r--drivers/gpu/drm/msm/dp/dp_ctrl.c10
-rw-r--r--drivers/gpu/drm/msm/dp/dp_ctrl.h2
-rw-r--r--drivers/gpu/drm/msm/dp/dp_display.c8
-rw-r--r--drivers/gpu/drm/msm/dp/dp_link.c2
-rw-r--r--drivers/gpu/drm/msm/dsi/dsi.c7
-rw-r--r--drivers/gpu/drm/msm/dsi/dsi_cfg.c161
-rw-r--r--drivers/gpu/drm/msm/dsi/dsi_cfg.h9
-rw-r--r--drivers/gpu/drm/msm/dsi/dsi_host.c14
17 files changed, 157 insertions, 203 deletions
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index 0e8d8df686dc..f0c2237d5f82 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -15,16 +15,21 @@ description: |
properties:
compatible:
- enum:
- - qcom,sc7180-dp
- - qcom,sc7280-dp
- - qcom,sc7280-edp
- - qcom,sc8180x-dp
- - qcom,sc8180x-edp
- - qcom,sc8280xp-dp
- - qcom,sc8280xp-edp
- - qcom,sdm845-dp
- - qcom,sm8350-dp
+ oneOf:
+ - enum:
+ - qcom,sc7180-dp
+ - qcom,sc7280-dp
+ - qcom,sc7280-edp
+ - qcom,sc8180x-dp
+ - qcom,sc8180x-edp
+ - qcom,sc8280xp-dp
+ - qcom,sc8280xp-edp
+ - qcom,sdm845-dp
+ - qcom,sm8350-dp
+ - items:
+ - enum:
+ - qcom,sm8450-dp
+ - const: qcom,sm8350-dp
reg:
minItems: 4
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
index e75a3efe4dac..c8884a84e73d 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
@@ -25,16 +25,16 @@ properties:
- qcom,sc7280-dsi-ctrl
- qcom,sdm660-dsi-ctrl
- qcom,sdm845-dsi-ctrl
+ - qcom,sm6115-dsi-ctrl
- qcom,sm8150-dsi-ctrl
- qcom,sm8250-dsi-ctrl
- qcom,sm8350-dsi-ctrl
- qcom,sm8450-dsi-ctrl
- qcom,sm8550-dsi-ctrl
- const: qcom,mdss-dsi-ctrl
- - items:
- - enum:
- - dsi-ctrl-6g-qcm2290
- - const: qcom,mdss-dsi-ctrl
+ - enum:
+ - qcom,dsi-ctrl-6g-qcm2290
+ - qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible
deprecated: true
reg:
@@ -351,6 +351,7 @@ allOf:
contains:
enum:
- qcom,sdm845-dsi-ctrl
+ - qcom,sm6115-dsi-ctrl
then:
properties:
clocks:
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml
index 2491cb100b33..b9f83088f370 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml
@@ -40,7 +40,13 @@ patternProperties:
type: object
properties:
compatible:
- const: qcom,dsi-ctrl-6g-qcm2290
+ oneOf:
+ - items:
+ - const: qcom,sm6115-dsi-ctrl
+ - const: qcom,mdss-dsi-ctrl
+ - description: Old binding, please don't use
+ deprecated: true
+ const: qcom,dsi-ctrl-6g-qcm2290
"^phy@[0-9a-f]+$":
type: object
@@ -114,7 +120,7 @@ examples:
};
dsi@5e94000 {
- compatible = "qcom,dsi-ctrl-6g-qcm2290";
+ compatible = "qcom,sm6115-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0x05e94000 0x400>;
reg-names = "dsi_ctrl";
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
index 9a1a0769575d..6e37072ed302 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
@@ -84,10 +84,6 @@ static void mdp4_disable_commit(struct msm_kms *kms)
mdp4_disable(mdp4_kms);
}
-static void mdp4_prepare_commit(struct msm_kms *kms, struct drm_atomic_state *state)
-{
-}
-
static void mdp4_flush_commit(struct msm_kms *kms, unsigned crtc_mask)
{
/* TODO */
@@ -154,7 +150,6 @@ static const struct mdp_kms_funcs kms_funcs = {
.disable_vblank = mdp4_disable_vblank,
.enable_commit = mdp4_enable_commit,
.disable_commit = mdp4_disable_commit,
- .prepare_commit = mdp4_prepare_commit,
.flush_commit = mdp4_flush_commit,
.wait_flush = mdp4_wait_flush,
.complete_commit = mdp4_complete_commit,
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
index 1f1555aa02d2..2eec2d78f32a 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
@@ -655,7 +655,7 @@ static const struct mdp5_cfg_hw msm8x96_config = {
.max_clk = 412500000,
};
-const struct mdp5_cfg_hw msm8x76_config = {
+static const struct mdp5_cfg_hw msm8x76_config = {
.name = "msm8x76",
.mdp = {
.count = 1,
diff --git a/drivers/gpu/drm/msm/dp/dp_aux.c b/drivers/gpu/drm/msm/dp/dp_aux.c
index cc3efed593aa..8e3b677f35e6 100644
--- a/drivers/gpu/drm/msm/dp/dp_aux.c
+++ b/drivers/gpu/drm/msm/dp/dp_aux.c
@@ -162,47 +162,6 @@ static ssize_t dp_aux_cmd_fifo_rx(struct dp_aux_private *aux,
return i;
}
-static void dp_aux_native_handler(struct dp_aux_private *aux, u32 isr)
-{
- if (isr & DP_INTR_AUX_I2C_DONE)
- aux->aux_error_num = DP_AUX_ERR_NONE;
- else if (isr & DP_INTR_WRONG_ADDR)
- aux->aux_error_num = DP_AUX_ERR_ADDR;
- else if (isr & DP_INTR_TIMEOUT)
- aux->aux_error_num = DP_AUX_ERR_TOUT;
- if (isr & DP_INTR_NACK_DEFER)
- aux->aux_error_num = DP_AUX_ERR_NACK;
- if (isr & DP_INTR_AUX_ERROR) {
- aux->aux_error_num = DP_AUX_ERR_PHY;
- dp_catalog_aux_clear_hw_interrupts(aux->catalog);
- }
-}
-
-static void dp_aux_i2c_handler(struct dp_aux_private *aux, u32 isr)
-{
- if (isr & DP_INTR_AUX_I2C_DONE) {
- if (isr & (DP_INTR_I2C_NACK | DP_INTR_I2C_DEFER))
- aux->aux_error_num = DP_AUX_ERR_NACK;
- else
- aux->aux_error_num = DP_AUX_ERR_NONE;
- } else {
- if (isr & DP_INTR_WRONG_ADDR)
- aux->aux_error_num = DP_AUX_ERR_ADDR;
- else if (isr & DP_INTR_TIMEOUT)
- aux->aux_error_num = DP_AUX_ERR_TOUT;
- if (isr & DP_INTR_NACK_DEFER)
- aux->aux_error_num = DP_AUX_ERR_NACK_DEFER;
- if (isr & DP_INTR_I2C_NACK)
- aux->aux_error_num = DP_AUX_ERR_NACK;
- if (isr & DP_INTR_I2C_DEFER)
- aux->aux_error_num = DP_AUX_ERR_DEFER;
- if (isr & DP_INTR_AUX_ERROR) {
- aux->aux_error_num = DP_AUX_ERR_PHY;
- dp_catalog_aux_clear_hw_interrupts(aux->catalog);
- }
- }
-}
-
static void dp_aux_update_offset_and_segment(struct dp_aux_private *aux,
struct drm_dp_aux_msg *input_msg)
{
@@ -409,14 +368,14 @@ exit:
return ret;
}
-void dp_aux_isr(struct drm_dp_aux *dp_aux)
+irqreturn_t dp_aux_isr(struct drm_dp_aux *dp_aux)
{
u32 isr;
struct dp_aux_private *aux;
if (!dp_aux) {
DRM_ERROR("invalid input\n");
- return;
+ return IRQ_NONE;
}
aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
@@ -425,17 +384,48 @@ void dp_aux_isr(struct drm_dp_aux *dp_aux)
/* no interrupts pending, return immediately */
if (!isr)
- return;
+ return IRQ_NONE;
- if (!aux->cmd_busy)
- return;
+ if (!aux->cmd_busy) {
+ DRM_ERROR("Unexpected DP AUX IRQ %#010x when not busy\n", isr);
+ return IRQ_NONE;
+ }
- if (aux->native)
- dp_aux_native_handler(aux, isr);
- else
- dp_aux_i2c_handler(aux, isr);
+ /*
+ * The logic below assumes only one error bit is set (other than "done"
+ * which can apparently be set at the same time as some of the other
+ * bits). Warn if more than one get set so we know we need to improve
+ * the logic.
+ */
+ if (hweight32(isr & ~DP_INTR_AUX_XFER_DONE) > 1)
+ DRM_WARN("Some DP AUX interrupts unhandled: %#010x\n", isr);
+
+ if (isr & DP_INTR_AUX_ERROR) {
+ aux->aux_error_num = DP_AUX_ERR_PHY;
+ dp_catalog_aux_clear_hw_interrupts(aux->catalog);
+ } else if (isr & DP_INTR_NACK_DEFER) {
+ aux->aux_error_num = DP_AUX_ERR_NACK_DEFER;
+ } else if (isr & DP_INTR_WRONG_ADDR) {
+ aux->aux_error_num = DP_AUX_ERR_ADDR;
+ } else if (isr & DP_INTR_TIMEOUT) {
+ aux->aux_error_num = DP_AUX_ERR_TOUT;
+ } else if (!aux->native && (isr & DP_INTR_I2C_NACK)) {
+ aux->aux_error_num = DP_AUX_ERR_NACK;
+ } else if (!aux->native && (isr & DP_INTR_I2C_DEFER)) {
+ if (isr & DP_INTR_AUX_XFER_DONE)
+ aux->aux_error_num = DP_AUX_ERR_NACK;
+ else
+ aux->aux_error_num = DP_AUX_ERR_DEFER;
+ } else if (isr & DP_INTR_AUX_XFER_DONE) {
+ aux->aux_error_num = DP_AUX_ERR_NONE;
+ } else {
+ DRM_WARN("Unexpected interrupt: %#010x\n", isr);
+ return IRQ_NONE;
+ }
complete(&aux->comp);
+
+ return IRQ_HANDLED;
}
void dp_aux_reconfig(struct drm_dp_aux *dp_aux)
diff --git a/drivers/gpu/drm/msm/dp/dp_aux.h b/drivers/gpu/drm/msm/dp/dp_aux.h
index e930974bcb5b..511305da4f66 100644
--- a/drivers/gpu/drm/msm/dp/dp_aux.h
+++ b/drivers/gpu/drm/msm/dp/dp_aux.h
@@ -11,7 +11,7 @@
int dp_aux_register(struct drm_dp_aux *dp_aux);
void dp_aux_unregister(struct drm_dp_aux *dp_aux);
-void dp_aux_isr(struct drm_dp_aux *dp_aux);
+irqreturn_t dp_aux_isr(struct drm_dp_aux *dp_aux);
void dp_aux_init(struct drm_dp_aux *dp_aux);
void dp_aux_deinit(struct drm_dp_aux *dp_aux);
void dp_aux_reconfig(struct drm_dp_aux *dp_aux);
diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c
index c12a5d9647bb..7a8cf1c8233d 100644
--- a/drivers/gpu/drm/msm/dp/dp_catalog.c
+++ b/drivers/gpu/drm/msm/dp/dp_catalog.c
@@ -27,7 +27,7 @@
#define DP_INTF_CONFIG_DATABUS_WIDEN BIT(4)
#define DP_INTERRUPT_STATUS1 \
- (DP_INTR_AUX_I2C_DONE| \
+ (DP_INTR_AUX_XFER_DONE| \
DP_INTR_WRONG_ADDR | DP_INTR_TIMEOUT | \
DP_INTR_NACK_DEFER | DP_INTR_WRONG_DATA_CNT | \
DP_INTR_I2C_NACK | DP_INTR_I2C_DEFER | \
diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h b/drivers/gpu/drm/msm/dp/dp_catalog.h
index 2174bb5f4e98..82376a2697ef 100644
--- a/drivers/gpu/drm/msm/dp/dp_catalog.h
+++ b/drivers/gpu/drm/msm/dp/dp_catalog.h
@@ -13,7 +13,7 @@
/* interrupts */
#define DP_INTR_HPD BIT(0)
-#define DP_INTR_AUX_I2C_DONE BIT(3)
+#define DP_INTR_AUX_XFER_DONE BIT(3)
#define DP_INTR_WRONG_ADDR BIT(6)
#define DP_INTR_TIMEOUT BIT(9)
#define DP_INTR_NACK_DEFER BIT(12)
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index ea1c1f01a099..a7a5c7e0ab92 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -2042,13 +2042,14 @@ int dp_ctrl_off(struct dp_ctrl *dp_ctrl)
return ret;
}
-void dp_ctrl_isr(struct dp_ctrl *dp_ctrl)
+irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl)
{
struct dp_ctrl_private *ctrl;
u32 isr;
+ irqreturn_t ret = IRQ_NONE;
if (!dp_ctrl)
- return;
+ return IRQ_NONE;
ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl);
@@ -2070,15 +2071,20 @@ void dp_ctrl_isr(struct dp_ctrl *dp_ctrl)
isr = dp_catalog_ctrl_get_interrupt(ctrl->catalog);
+
if (isr & DP_CTRL_INTR_READY_FOR_VIDEO) {
drm_dbg_dp(ctrl->drm_dev, "dp_video_ready\n");
complete(&ctrl->video_comp);
+ ret = IRQ_HANDLED;
}
if (isr & DP_CTRL_INTR_IDLE_PATTERN_SENT) {
drm_dbg_dp(ctrl->drm_dev, "idle_patterns_sent\n");
complete(&ctrl->idle_comp);
+ ret = IRQ_HANDLED;
}
+
+ return ret;
}
struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link,
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.h b/drivers/gpu/drm/msm/dp/dp_ctrl.h
index b226683de949..f712780149fd 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.h
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.h
@@ -25,7 +25,7 @@ int dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl);
int dp_ctrl_off_link(struct dp_ctrl *dp_ctrl);
int dp_ctrl_off(struct dp_ctrl *dp_ctrl);
void dp_ctrl_push_idle(struct dp_ctrl *dp_ctrl);
-void dp_ctrl_isr(struct dp_ctrl *dp_ctrl);
+irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl);
void dp_ctrl_handle_sink_request(struct dp_ctrl *dp_ctrl);
struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link,
struct dp_panel *panel, struct drm_dp_aux *aux,
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index ffb21a633b6a..3e13acdfa7e5 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -1215,7 +1215,7 @@ static int dp_hpd_event_thread_start(struct dp_display_private *dp_priv)
static irqreturn_t dp_display_irq_handler(int irq, void *dev_id)
{
struct dp_display_private *dp = dev_id;
- irqreturn_t ret = IRQ_HANDLED;
+ irqreturn_t ret = IRQ_NONE;
u32 hpd_isr_status;
if (!dp) {
@@ -1243,13 +1243,15 @@ static irqreturn_t dp_display_irq_handler(int irq, void *dev_id)
if (hpd_isr_status & DP_DP_HPD_UNPLUG_INT_MASK)
dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0);
+
+ ret = IRQ_HANDLED;
}
/* DP controller isr */
- dp_ctrl_isr(dp->ctrl);
+ ret |= dp_ctrl_isr(dp->ctrl);
/* DP aux isr */
- dp_aux_isr(dp->aux);
+ ret |= dp_aux_isr(dp->aux);
return ret;
}
diff --git a/drivers/gpu/drm/msm/dp/dp_link.c b/drivers/gpu/drm/msm/dp/dp_link.c
index 5a4817ac086f..42427129acea 100644
--- a/drivers/gpu/drm/msm/dp/dp_link.c
+++ b/drivers/gpu/drm/msm/dp/dp_link.c
@@ -1090,7 +1090,7 @@ int dp_link_process_request(struct dp_link *dp_link)
} else if (dp_link_read_psr_error_status(link)) {
DRM_ERROR("PSR IRQ_HPD received\n");
} else if (dp_link_psr_capability_changed(link)) {
- drm_dbg_dp(link->drm_dev, "PSR Capabiity changed");
+ drm_dbg_dp(link->drm_dev, "PSR Capability changed");
} else {
ret = dp_link_process_link_status_update(link);
if (!ret) {
diff --git a/drivers/gpu/drm/msm/dsi/dsi.c b/drivers/gpu/drm/msm/dsi/dsi.c
index 31fdee2052be..baab79ab6e74 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.c
+++ b/drivers/gpu/drm/msm/dsi/dsi.c
@@ -4,7 +4,6 @@
*/
#include "dsi.h"
-#include "dsi_cfg.h"
bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi)
{
@@ -173,8 +172,10 @@ static int dsi_dev_remove(struct platform_device *pdev)
}
static const struct of_device_id dt_match[] = {
- { .compatible = "qcom,mdss-dsi-ctrl", .data = NULL /* autodetect cfg */ },
- { .compatible = "qcom,dsi-ctrl-6g-qcm2290", .data = &qcm2290_dsi_cfg_handler },
+ { .compatible = "qcom,mdss-dsi-ctrl" },
+
+ /* Deprecated, don't use */
+ { .compatible = "qcom,dsi-ctrl-6g-qcm2290" },
{}
};
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index 6d21f0b33411..29ccd755cc2e 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -21,8 +21,9 @@ static const struct msm_dsi_config apq8064_dsi_cfg = {
.num_regulators = ARRAY_SIZE(apq8064_dsi_regulators),
.bus_clk_names = dsi_v2_bus_clk_names,
.num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names),
- .io_start = { 0x4700000, 0x5800000 },
- .num_dsi = 2,
+ .io_start = {
+ { 0x4700000, 0x5800000 },
+ },
};
static const char * const dsi_6g_bus_clk_names[] = {
@@ -41,46 +42,40 @@ static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
.num_regulators = ARRAY_SIZE(msm8974_apq8084_regulators),
.bus_clk_names = dsi_6g_bus_clk_names,
.num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
- .io_start = { 0xfd922800, 0xfd922b00 },
- .num_dsi = 2,
+ .io_start = {
+ { 0xfd922800, 0xfd922b00 },
+ },
};
-static const char * const dsi_8916_bus_clk_names[] = {
+static const char * const dsi_v1_3_1_clk_names[] = {
"mdp_core", "iface", "bus",
};
-static const struct regulator_bulk_data msm8916_dsi_regulators[] = {
+static const struct regulator_bulk_data dsi_v1_3_1_regulators[] = {
{ .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */
{ .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */
};
static const struct msm_dsi_config msm8916_dsi_cfg = {
.io_offset = DSI_6G_REG_SHIFT,
- .regulator_data = msm8916_dsi_regulators,
- .num_regulators = ARRAY_SIZE(msm8916_dsi_regulators),
- .bus_clk_names = dsi_8916_bus_clk_names,
- .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names),
- .io_start = { 0x1a98000 },
- .num_dsi = 1,
-};
-
-static const char * const dsi_8976_bus_clk_names[] = {
- "mdp_core", "iface", "bus",
-};
-
-static const struct regulator_bulk_data msm8976_dsi_regulators[] = {
- { .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */
- { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */
+ .regulator_data = dsi_v1_3_1_regulators,
+ .num_regulators = ARRAY_SIZE(dsi_v1_3_1_regulators),
+ .bus_clk_names = dsi_v1_3_1_clk_names,
+ .num_bus_clks = ARRAY_SIZE(dsi_v1_3_1_clk_names),
+ .io_start = {
+ { 0x1a98000 },
+ },
};
static const struct msm_dsi_config msm8976_dsi_cfg = {
.io_offset = DSI_6G_REG_SHIFT,
- .regulator_data = msm8976_dsi_regulators,
- .num_regulators = ARRAY_SIZE(msm8976_dsi_regulators),
- .bus_clk_names = dsi_8976_bus_clk_names,
- .num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names),
- .io_start = { 0x1a94000, 0x1a96000 },
- .num_dsi = 2,
+ .regulator_data = dsi_v1_3_1_regulators,
+ .num_regulators = ARRAY_SIZE(dsi_v1_3_1_regulators),
+ .bus_clk_names = dsi_v1_3_1_clk_names,
+ .num_bus_clks = ARRAY_SIZE(dsi_v1_3_1_clk_names),
+ .io_start = {
+ { 0x1a94000, 0x1a96000 },
+ },
};
static const struct regulator_bulk_data msm8994_dsi_regulators[] = {
@@ -98,12 +93,9 @@ static const struct msm_dsi_config msm8994_dsi_cfg = {
.num_regulators = ARRAY_SIZE(msm8994_dsi_regulators),
.bus_clk_names = dsi_6g_bus_clk_names,
.num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
- .io_start = { 0xfd998000, 0xfd9a0000 },
- .num_dsi = 2,
-};
-
-static const char * const dsi_8996_bus_clk_names[] = {
- "mdp_core", "iface", "bus", "core_mmss",
+ .io_start = {
+ { 0xfd998000, 0xfd9a0000 },
+ },
};
static const struct regulator_bulk_data msm8996_dsi_regulators[] = {
@@ -116,10 +108,11 @@ static const struct msm_dsi_config msm8996_dsi_cfg = {
.io_offset = DSI_6G_REG_SHIFT,
.regulator_data = msm8996_dsi_regulators,
.num_regulators = ARRAY_SIZE(msm8996_dsi_regulators),
- .bus_clk_names = dsi_8996_bus_clk_names,
- .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names),
- .io_start = { 0x994000, 0x996000 },
- .num_dsi = 2,
+ .bus_clk_names = dsi_6g_bus_clk_names,
+ .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
+ .io_start = {
+ { 0x994000, 0x996000 },
+ },
};
static const char * const dsi_msm8998_bus_clk_names[] = {
@@ -137,8 +130,9 @@ static const struct msm_dsi_config msm8998_dsi_cfg = {
.num_regulators = ARRAY_SIZE(msm8998_dsi_regulators),
.bus_clk_names = dsi_msm8998_bus_clk_names,
.num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names),
- .io_start = { 0xc994000, 0xc996000 },
- .num_dsi = 2,
+ .io_start = {
+ { 0xc994000, 0xc996000 },
+ },
};
static const char * const dsi_sdm660_bus_clk_names[] = {
@@ -155,30 +149,29 @@ static const struct msm_dsi_config sdm660_dsi_cfg = {
.num_regulators = ARRAY_SIZE(sdm660_dsi_regulators),
.bus_clk_names = dsi_sdm660_bus_clk_names,
.num_bus_clks = ARRAY_SIZE(dsi_sdm660_bus_clk_names),
- .io_start = { 0xc994000, 0xc996000 },
- .num_dsi = 2,
+ .io_start = {
+ { 0xc994000, 0xc996000 },
+ },
};
-static const char * const dsi_sdm845_bus_clk_names[] = {
+static const char * const dsi_v2_4_clk_names[] = {
"iface", "bus",
};
-static const char * const dsi_sc7180_bus_clk_names[] = {
- "iface", "bus",
-};
-
-static const struct regulator_bulk_data sdm845_dsi_regulators[] = {
+static const struct regulator_bulk_data dsi_v2_4_regulators[] = {
{ .supply = "vdda", .init_load_uA = 21800 }, /* 1.2 V */
};
static const struct msm_dsi_config sdm845_dsi_cfg = {
.io_offset = DSI_6G_REG_SHIFT,
- .regulator_data = sdm845_dsi_regulators,
- .num_regulators = ARRAY_SIZE(sdm845_dsi_regulators),
- .bus_clk_names = dsi_sdm845_bus_clk_names,
- .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names),
- .io_start = { 0xae94000, 0xae96000 },
- .num_dsi = 2,
+ .regulator_data = dsi_v2_4_regulators,
+ .num_regulators = ARRAY_SIZE(dsi_v2_4_regulators),
+ .bus_clk_names = dsi_v2_4_clk_names,
+ .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names),
+ .io_start = {
+ { 0xae94000, 0xae96000 }, /* SDM845 / SDM670 */
+ { 0x5e94000 }, /* QCM2290 / SM6115 / SM6125 / SM6375 */
+ },
};
static const struct regulator_bulk_data sm8550_dsi_regulators[] = {
@@ -189,28 +182,11 @@ static const struct msm_dsi_config sm8550_dsi_cfg = {
.io_offset = DSI_6G_REG_SHIFT,
.regulator_data = sm8550_dsi_regulators,
.num_regulators = ARRAY_SIZE(sm8550_dsi_regulators),
- .bus_clk_names = dsi_sdm845_bus_clk_names,
- .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names),
- .io_start = { 0xae94000, 0xae96000 },
- .num_dsi = 2,
-};
-
-static const struct regulator_bulk_data sc7180_dsi_regulators[] = {
- { .supply = "vdda", .init_load_uA = 21800 }, /* 1.2 V */
-};
-
-static const struct msm_dsi_config sc7180_dsi_cfg = {
- .io_offset = DSI_6G_REG_SHIFT,
- .regulator_data = sc7180_dsi_regulators,
- .num_regulators = ARRAY_SIZE(sc7180_dsi_regulators),
- .bus_clk_names = dsi_sc7180_bus_clk_names,
- .num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names),
- .io_start = { 0xae94000 },
- .num_dsi = 1,
-};
-
-static const char * const dsi_sc7280_bus_clk_names[] = {
- "iface", "bus",
+ .bus_clk_names = dsi_v2_4_clk_names,
+ .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names),
+ .io_start = {
+ { 0xae94000, 0xae96000 },
+ },
};
static const struct regulator_bulk_data sc7280_dsi_regulators[] = {
@@ -221,28 +197,11 @@ static const struct msm_dsi_config sc7280_dsi_cfg = {
.io_offset = DSI_6G_REG_SHIFT,
.regulator_data = sc7280_dsi_regulators,
.num_regulators = ARRAY_SIZE(sc7280_dsi_regulators),
- .bus_clk_names = dsi_sc7280_bus_clk_names,
- .num_bus_clks = ARRAY_SIZE(dsi_sc7280_bus_clk_names),
- .io_start = { 0xae94000, 0xae96000 },
- .num_dsi = 2,
-};
-
-static const char * const dsi_qcm2290_bus_clk_names[] = {
- "iface", "bus",
-};
-
-static const struct regulator_bulk_data qcm2290_dsi_cfg_regulators[] = {
- { .supply = "vdda", .init_load_uA = 21800 }, /* 1.2 V */
-};
-
-static const struct msm_dsi_config qcm2290_dsi_cfg = {
- .io_offset = DSI_6G_REG_SHIFT,
- .regulator_data = qcm2290_dsi_cfg_regulators,
- .num_regulators = ARRAY_SIZE(qcm2290_dsi_cfg_regulators),
- .bus_clk_names = dsi_qcm2290_bus_clk_names,
- .num_bus_clks = ARRAY_SIZE(dsi_qcm2290_bus_clk_names),
- .io_start = { 0x5e94000 },
- .num_dsi = 1,
+ .bus_clk_names = dsi_v2_4_clk_names,
+ .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names),
+ .io_start = {
+ { 0xae94000, 0xae96000 },
+ },
};
static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {
@@ -311,7 +270,7 @@ static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_0,
&sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1,
- &sc7180_dsi_cfg, &msm_dsi_6g_v2_host_ops},
+ &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_5_0,
&sc7280_dsi_cfg, &msm_dsi_6g_v2_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_6_0,
@@ -335,9 +294,3 @@ const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
return cfg_hnd;
}
-
-/* Non autodetect configs */
-const struct msm_dsi_cfg_handler qcm2290_dsi_cfg_handler = {
- .cfg = &qcm2290_dsi_cfg,
- .ops = &msm_dsi_6g_v2_host_ops,
-};
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
index 44be4a88aa83..91bdaf50bb1a 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
@@ -32,14 +32,16 @@
#define DSI_6G_REG_SHIFT 4
+/* Maximum number of configurations matched against the same hw revision */
+#define VARIANTS_MAX 2
+
struct msm_dsi_config {
u32 io_offset;
const struct regulator_bulk_data *regulator_data;
int num_regulators;
const char * const *bus_clk_names;
const int num_bus_clks;
- const resource_size_t io_start[DSI_MAX];
- const int num_dsi;
+ const resource_size_t io_start[VARIANTS_MAX][DSI_MAX];
};
struct msm_dsi_host_cfg_ops {
@@ -63,8 +65,5 @@ struct msm_dsi_cfg_handler {
const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor);
-/* Non autodetect configs */
-extern const struct msm_dsi_cfg_handler qcm2290_dsi_cfg_handler;
-
#endif /* __MSM_DSI_CFG_H__ */
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 18fa30e1e858..961689a255c4 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -214,10 +214,6 @@ static const struct msm_dsi_cfg_handler *dsi_get_config(
int ret;
u32 major = 0, minor = 0;
- cfg_hnd = device_get_match_data(dev);
- if (cfg_hnd)
- return cfg_hnd;
-
ahb_clk = msm_clk_get(msm_host->pdev, "iface");
if (IS_ERR(ahb_clk)) {
pr_err("%s: cannot get interface clock\n", __func__);
@@ -1862,16 +1858,16 @@ static int dsi_host_get_id(struct msm_dsi_host *msm_host)
struct platform_device *pdev = msm_host->pdev;
const struct msm_dsi_config *cfg = msm_host->cfg_hnd->cfg;
struct resource *res;
- int i;
+ int i, j;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dsi_ctrl");
if (!res)
return -EINVAL;
- for (i = 0; i < cfg->num_dsi; i++) {
- if (cfg->io_start[i] == res->start)
- return i;
- }
+ for (i = 0; i < VARIANTS_MAX; i++)
+ for (j = 0; j < DSI_MAX; j++)
+ if (cfg->io_start[i][j] == res->start)
+ return j;
return -EINVAL;
}
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-01 17:52:42 +0000