diff options
| -rw-r--r-- | drivers/pci/pci.c | 15 | ||||
| -rw-r--r-- | include/uapi/linux/pci_regs.h | 6 |
2 files changed, 11 insertions, 10 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 364f98b30130..e8330b68cecd 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -2195,7 +2195,7 @@ static int pci_ea_read(struct pci_dev *dev, int offset) int ent_size, ent_offset = offset; resource_size_t start, end; unsigned long flags; - u32 dw0, base, max_offset; + u32 dw0, bei, base, max_offset; u8 prop; bool support_64 = (sizeof(resource_size_t) >= 8); @@ -2208,20 +2208,21 @@ static int pci_ea_read(struct pci_dev *dev, int offset) if (!(dw0 & PCI_EA_ENABLE)) /* Entry not enabled */ goto out; - prop = PCI_EA_PP(dw0); + bei = (dw0 & PCI_EA_BEI) >> 4; + prop = (dw0 & PCI_EA_PP) >> 8; + /* * If the Property is in the reserved range, try the Secondary * Property instead. */ if (prop > PCI_EA_P_BRIDGE_IO && prop < PCI_EA_P_MEM_RESERVED) - prop = PCI_EA_SP(dw0); + prop = (dw0 & PCI_EA_SP) >> 16; if (prop > PCI_EA_P_BRIDGE_IO) goto out; - res = pci_ea_get_resource(dev, PCI_EA_BEI(dw0), prop); + res = pci_ea_get_resource(dev, bei, prop); if (!res) { - dev_err(&dev->dev, "Unsupported EA entry BEI: %u\n", - PCI_EA_BEI(dw0)); + dev_err(&dev->dev, "Unsupported EA entry BEI: %u\n", bei); goto out; } @@ -2293,7 +2294,7 @@ static int pci_ea_read(struct pci_dev *dev, int offset) res->end = end; res->flags = flags; dev_printk(KERN_DEBUG, &dev->dev, "EA - BEI %2u, Prop 0x%02x: %pR\n", - PCI_EA_BEI(dw0), prop, res); + bei, prop, res); out: return offset + ent_size; } diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index f890876aa070..1becea86c73c 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -361,7 +361,7 @@ #define PCI_EA_FIRST_ENT 4 /* First EA Entry in List */ #define PCI_EA_FIRST_ENT_BRIDGE 8 /* First EA Entry for Bridges */ #define PCI_EA_ES 0x00000007 /* Entry Size */ -#define PCI_EA_BEI(x) (((x) >> 4) & 0xf) /* BAR Equivalent Indicator */ +#define PCI_EA_BEI 0x000000f0 /* BAR Equivalent Indicator */ /* 0-5 map to BARs 0-5 respectively */ #define PCI_EA_BEI_BAR0 0 #define PCI_EA_BEI_BAR5 5 @@ -372,8 +372,8 @@ #define PCI_EA_BEI_VF_BAR0 9 #define PCI_EA_BEI_VF_BAR5 14 #define PCI_EA_BEI_RESERVED 15 /* Reserved - Treat like ENI */ -#define PCI_EA_PP(x) (((x) >> 8) & 0xff) /* Primary Properties */ -#define PCI_EA_SP(x) (((x) >> 16) & 0xff) /* Secondary Properties */ +#define PCI_EA_PP 0x0000ff00 /* Primary Properties */ +#define PCI_EA_SP 0x00ff0000 /* Secondary Properties */ #define PCI_EA_P_MEM 0x00 /* Non-Prefetch Memory */ #define PCI_EA_P_MEM_PREFETCH 0x01 /* Prefetchable Memory */ #define PCI_EA_P_IO 0x02 /* I/O Space */ |