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-rw-r--r--arch/x86/include/asm/sigframe.h1
-rw-r--r--arch/x86/include/uapi/asm/sigcontext.h26
-rw-r--r--arch/x86/include/uapi/asm/sigcontext32.h29
3 files changed, 17 insertions, 39 deletions
diff --git a/arch/x86/include/asm/sigframe.h b/arch/x86/include/asm/sigframe.h
index 1f3175bb994e..a27c73d6863a 100644
--- a/arch/x86/include/asm/sigframe.h
+++ b/arch/x86/include/asm/sigframe.h
@@ -10,7 +10,6 @@
#define sigframe_ia32 sigframe
#define rt_sigframe_ia32 rt_sigframe
#define sigcontext_ia32 sigcontext
-#define _fpstate_ia32 _fpstate
#define ucontext_ia32 ucontext
#else /* !CONFIG_X86_32 */
diff --git a/arch/x86/include/uapi/asm/sigcontext.h b/arch/x86/include/uapi/asm/sigcontext.h
index 9df4df3e40ef..85811167821f 100644
--- a/arch/x86/include/uapi/asm/sigcontext.h
+++ b/arch/x86/include/uapi/asm/sigcontext.h
@@ -95,9 +95,10 @@ struct _xmmreg {
#define X86_FXSR_MAGIC 0x0000
-#ifdef __i386__
-
-struct _fpstate {
+/*
+ * The 32-bit FPU frame:
+ */
+struct _fpstate_32 {
/* Legacy FPU environment: */
__u32 cw;
__u32 sw;
@@ -117,7 +118,10 @@ struct _fpstate {
__u32 reserved;
struct _fpxreg _fxsr_st[8]; /* FXSR FPU reg data is ignored */
struct _xmmreg _xmm[8]; /* First 8 XMM registers */
- __u32 padding1[44]; /* Second 8 XMM registers plus padding */
+ union {
+ __u32 padding1[44]; /* Second 8 XMM registers plus padding */
+ __u32 padding[44]; /* Alias name for old user-space */
+ };
union {
__u32 padding2[12];
@@ -125,10 +129,8 @@ struct _fpstate {
};
};
-#else /* __x86_64__: */
-
/*
- * The FXSAVE frame.
+ * The 64-bit FPU frame. (FXSAVE format and later)
*
* Note1: If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then the structure is
* larger: 'struct _xstate'. Note that 'struct _xstate' embedds
@@ -138,7 +140,7 @@ struct _fpstate {
* Note2: Reserved fields may someday contain valuable data. Always save/restore
* them when you change signal frames.
*/
-struct _fpstate {
+struct _fpstate_64 {
__u16 cwd;
__u16 swd;
/* Note this is not the same as the 32-bit/x87/FSAVE twd: */
@@ -157,7 +159,13 @@ struct _fpstate {
};
};
-#endif /* __x86_64__ */
+#ifdef __i386__
+# define _fpstate _fpstate_32
+#else
+# define _fpstate _fpstate_64
+#endif
+
+#define _fpstate_ia32 _fpstate_32
struct _header {
__u64 xfeatures;
diff --git a/arch/x86/include/uapi/asm/sigcontext32.h b/arch/x86/include/uapi/asm/sigcontext32.h
index 356caab997e7..19a89165ea1d 100644
--- a/arch/x86/include/uapi/asm/sigcontext32.h
+++ b/arch/x86/include/uapi/asm/sigcontext32.h
@@ -5,35 +5,6 @@
#include <asm/sigcontext.h>
-/* FXSAVE frame: FSAVE frame with extensions */
-struct _fpstate_ia32 {
- /* Regular FPU environment: */
- __u32 cw;
- __u32 sw;
- __u32 tag; /* Not compatible with the 64-bit frame */
- __u32 ipoff;
- __u32 cssel;
- __u32 dataoff;
- __u32 datasel;
- struct _fpreg _st[8];
- __u16 status;
- __u16 magic; /* 0xffff: regular FPU data only */
- /* 0x0000: FXSR data */
-
- /* Extended FXSR FPU environment: */
- __u32 _fxsr_env[6];
- __u32 mxcsr;
- __u32 reserved;
- struct _fpxreg _fxsr_st[8];
- struct _xmmreg _xmm[8]; /* The first 8 XMM registers */
- __u32 padding[44]; /* The second 8 XMM registers plus padding */
- union {
- __u32 padding2[12];
- /* Might encode xstate extensions, see asm/sigcontext.h: */
- struct _fpx_sw_bytes sw_reserved;
- };
-};
-
/* 32-bit compat sigcontext: */
struct sigcontext_ia32 {
__u16 gs, __gsh;