diff options
38 files changed, 1757 insertions, 144 deletions
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 8fe7e473bfdf..174134f920e1 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -40,6 +40,7 @@ description: | sdm630 sdm660 sdm845 + sdx55 sm8250 sm8350 @@ -170,6 +171,11 @@ properties: - items: - enum: + - qcom,sdx55-mtp + - const: qcom,sdx55 + + - items: + - enum: - qcom,ipq6018-cp01-c1 - const: qcom,ipq6018 diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 2cf525d21e05..fd93b941f07a 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -17,6 +17,7 @@ properties: - qcom,msm8998-dwc3 - qcom,sc7180-dwc3 - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 - const: qcom,dwc3 reg: diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml index 8e3760a3822b..b8e4118945a0 100644 --- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml @@ -18,6 +18,7 @@ properties: - qcom,apss-wdt-qcs404 - qcom,apss-wdt-sc7180 - qcom,apss-wdt-sdm845 + - qcom,apss-wdt-sdx55 - qcom,apss-wdt-sm8150 - qcom,kpss-timer - qcom,kpss-wdt diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index fef3d5fd9621..6dffb772a62c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -913,6 +913,9 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-apq8074-dragonboard.dtb \ qcom-apq8084-ifc6540.dtb \ qcom-apq8084-mtp.dtb \ + qcom-ipq4018-ap120c-ac.dtb \ + qcom-ipq4018-ap120c-ac-bit.dtb \ + qcom-ipq4018-jalapeno.dtb \ qcom-ipq4019-ap.dk01.1-c1.dtb \ qcom-ipq4019-ap.dk04.1-c1.dtb \ qcom-ipq4019-ap.dk04.1-c3.dtb \ @@ -928,7 +931,8 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-msm8974-sony-xperia-amami.dtb \ qcom-msm8974-sony-xperia-castor.dtb \ qcom-msm8974-sony-xperia-honami.dtb \ - qcom-mdm9615-wp8548-mangoh-green.dtb + qcom-mdm9615-wp8548-mangoh-green.dtb \ + qcom-sdx55-mtp.dtb dtb-$(CONFIG_ARCH_RDA) += \ rda8810pl-orangepi-2g-iot.dtb \ rda8810pl-orangepi-i96.dtb diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts index 4e6c50d45cb2..dace8ffeb991 100644 --- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts @@ -461,11 +461,11 @@ }; gsbi@19800000 { - status = "ok"; + status = "okay"; qcom,mode = <GSBI_PROT_I2C>; i2c@19880000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&dragon_gsbi8_i2c_pins>; @@ -497,17 +497,17 @@ }; gsbi@19c00000 { - status = "ok"; + status = "okay"; qcom,mode = <GSBI_PROT_I2C_UART>; serial@19c40000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&dragon_gsbi12_serial_pins>; }; i2c@19c80000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&dragon_gsbi12_i2c_pins>; @@ -571,7 +571,7 @@ external-bus@1a100000 { /* The EBI2 will instantiate first, then populate its children */ - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&dragon_ebi2_pins>; diff --git a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts index a701d4bac320..3bce47d16ab3 100644 --- a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +++ b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts @@ -302,11 +302,11 @@ }; gsbi@16500000 { - status = "ok"; + status = "okay"; qcom,mode = <GSBI_PROT_I2C_UART>; serial@16540000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&gsbi6_uart_4pins>; @@ -314,10 +314,10 @@ }; gsbi@16600000 { - status = "ok"; + status = "okay"; qcom,mode = <GSBI_PROT_I2C_UART>; serial@16640000 { - status = "ok"; + status = "okay"; }; }; diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts index 209eb21cea00..0148148a8e0a 100644 --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts @@ -141,10 +141,10 @@ }; gsbi@16600000 { - status = "ok"; + status = "okay"; qcom,mode = <GSBI_PROT_I2C_UART>; serial@16640000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&gsbi7_uart_2pins>; }; @@ -152,7 +152,7 @@ /* OTG */ usb@12500000 { - status = "ok"; + status = "okay"; dr_mode = "otg"; ulpi { phy { @@ -209,7 +209,7 @@ }; pci@1b500000 { - status = "ok"; + status = "okay"; vdda-supply = <&pm8921_s3>; vdda_phy-supply = <&pm8921_lvs6>; vdda_refclk-supply = <&v3p3_fixed>; diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index 83aaf4a74398..d0a17b5a5fa3 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -215,21 +215,21 @@ }; gsbi@16500000 { - status = "ok"; + status = "okay"; qcom,mode = <GSBI_PROT_UART_W_FC>; serial@16540000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&gsbi6_uart_4pins>; }; }; gsbi@16600000 { - status = "ok"; + status = "okay"; qcom,mode = <GSBI_PROT_I2C_UART>; serial@16640000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&gsbi7_uart_2pins>; }; @@ -279,7 +279,7 @@ }; pci@1b500000 { - status = "ok"; + status = "okay"; vdda-supply = <&pm8921_s3>; vdda_phy-supply = <&pm8921_lvs6>; vdda_refclk-supply = <&ext_3p3v>; diff --git a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts index 8bf488fb86ad..72e47bdc5c12 100644 --- a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts +++ b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts @@ -362,11 +362,11 @@ }; gsbi@1a200000 { - status = "ok"; + status = "okay"; qcom,mode = <GSBI_PROT_I2C_UART>; serial@1a240000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&gsbi5_uart_pin_a>; diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts index 244f04e19c9d..83793b835d40 100644 --- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -19,13 +19,13 @@ soc { serial@f991e000 { - status = "ok"; + status = "okay"; }; sdhci@f9824900 { bus-width = <8>; non-removable; - status = "ok"; + status = "okay"; vmmc-supply = <&pm8941_l20>; vqmmc-supply = <&pm8941_s3>; @@ -39,14 +39,14 @@ pinctrl-names = "default"; pinctrl-0 = <&sdhc2_pin_a>, <&sdhc2_cd_pin_a>; bus-width = <4>; - status = "ok"; + status = "okay"; vmmc-supply = <&pm8941_l21>; vqmmc-supply = <&pm8941_l13>; }; usb@f9a55000 { - status = "ok"; + status = "okay"; phys = <&usb_hs2_phy>; phy-select = <&tcsr 0xb000 1>; extcon = <&smbb>, <&usb_id>; @@ -56,7 +56,7 @@ adp-disable; ulpi { phy@b { - status = "ok"; + status = "okay"; v3p3-supply = <&pm8941_l24>; v1p8-supply = <&pm8941_l6>; extcon = <&smbb>; diff --git a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dts b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dts new file mode 100644 index 000000000000..028ac8e24797 --- /dev/null +++ b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dts @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4018-ap120c-ac.dtsi" + +/ { + model = "ALFA Network AP120C-AC Bit"; + + leds { + compatible = "gpio-leds"; + + power { + label = "ap120c-ac:green:power"; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + + wlan { + label = "ap120c-ac:green:wlan"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + }; + + support { + label = "ap120c-ac:green:support"; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + panic-indicator; + }; + }; +}; diff --git a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts new file mode 100644 index 000000000000..b7916fc26d68 --- /dev/null +++ b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4018-ap120c-ac.dtsi" + +/ { + leds { + compatible = "gpio-leds"; + + status: status { + label = "ap120c-ac:blue:status"; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + + wlan2g { + label = "ap120c-ac:green:wlan2g"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g { + label = "ap120c-ac:red:wlan5g"; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + }; + }; +}; diff --git a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi new file mode 100644 index 000000000000..1f3b1ce82108 --- /dev/null +++ b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi @@ -0,0 +1,254 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + model = "ALFA Network AP120C-AC"; + compatible = "alfa-network,ap120c-ac"; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + }; +}; + +&tlmm { + i2c0_pins: i2c0_pinmux { + mux_i2c { + function = "blsp_i2c0"; + pins = "gpio58", "gpio59"; + drive-strength = <16>; + bias-disable; + }; + }; + + mdio_pins: mdio_pinmux { + mux_mdio { + pins = "gpio53"; + function = "mdio"; + bias-pull-up; + }; + + mux_mdc { + pins = "gpio52"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial0_pins: serial0_pinmux { + mux_uart { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi0_pins: spi0_pinmux { + mux_spi { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + mux_cs { + function = "gpio"; + pins = "gpio54", "gpio4"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + usb-power { + line-name = "USB-power"; + gpios = <1 GPIO_ACTIVE_HIGH>; + gpio-hog; + output-high; + }; +}; + +&watchdog { + status = "okay"; +}; + +&prng { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_i2c3 { + status = "okay"; + + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + + tpm@29 { + compatible = "atmel,at97sc3204t"; + reg = <0x29>; + }; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + + partition@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + + partition@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + + partition@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + + partition@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + + partition@e0000 { + label = "u-boot-env"; + reg = <0x000e0000 0x00010000>; + }; + + partition@f0000 { + label = "u-boot"; + reg = <0x000f0000 0x00080000>; + read-only; + }; + + partition@170000 { + label = "ART"; + reg = <0x00170000 0x00010000>; + read-only; + }; + + partition@180000 { + label = "priv_data1"; + reg = <0x00180000 0x00010000>; + read-only; + }; + + partition@190000 { + label = "priv_data2"; + reg = <0x00190000 0x00010000>; + read-only; + }; + }; + }; + + nand@1 { + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <40000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi1"; + reg = <0x00000000 0x04000000>; + }; + + partition@4000000 { + label = "ubi2"; + reg = <0x04000000 0x04000000>; + }; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial0_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&mdio { + status = "okay"; + + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; +}; + +&wifi0 { + status = "okay"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3 { + status = "okay"; + + dwc3@8a00000 { + phys = <&usb3_hs_phy>; + phy-names = "usb2-phy"; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts b/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts new file mode 100644 index 000000000000..394412619894 --- /dev/null +++ b/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts @@ -0,0 +1,214 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +// Copyright (c) 2018, Robert Marko <robimarko@gmail.com> + +#include "qcom-ipq4019.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + model = "8devices Jalapeno"; + compatible = "8dev,jalapeno"; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + pinmux_1 { + pins = "gpio53"; + function = "mdio"; + }; + + pinmux_2 { + pins = "gpio52"; + function = "mdc"; + }; + + pinconf { + pins = "gpio52", "gpio53"; + bias-pull-up; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <2>; + bias-disable; + }; + + pin_cs { + function = "gpio"; + pins = "gpio54", "gpio59"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&watchdog { + status = "okay"; +}; + +&prng { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>; + + flash@0 { + status = "okay"; + + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + + partition@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + + partition@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + + partition@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + + partition@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + + partition@e0000 { + label = "u-boot-env"; + reg = <0x000e0000 0x00010000>; + }; + + partition@f0000 { + label = "u-boot"; + reg = <0x000f0000 0x00080000>; + read-only; + }; + + partition@170000 { + label = "ART"; + reg = <0x00170000 0x00010000>; + read-only; + }; + }; + }; + + spi-nand@1 { + status = "okay"; + + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi1"; + reg = <0x00000000 0x04000000>; + }; + + partition@4000000 { + label = "ubi2"; + reg = <0x04000000 0x04000000>; + }; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&mdio { + status = "okay"; + + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; +}; + +&wifi0 { + status = "okay"; + + qcom,ath10k-calibration-variant = "8devices-Jalapeno"; +}; + +&wifi1 { + status = "okay"; + + qcom,ath10k-calibration-variant = "8devices-Jalapeno"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi index 418f9a022336..c93b2164db44 100644 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi @@ -30,7 +30,7 @@ soc { rng@22000 { - status = "ok"; + status = "okay"; }; pinctrl@1000000 { @@ -66,13 +66,13 @@ }; blsp_dma: dma@7884000 { - status = "ok"; + status = "okay"; }; spi@78b5000 { pinctrl-0 = <&spi_0_pins>; pinctrl-names = "default"; - status = "ok"; + status = "okay"; cs-gpios = <&tlmm 54 0>; mx25l25635e@0 { @@ -87,27 +87,27 @@ serial@78af000 { pinctrl-0 = <&serial_pins>; pinctrl-names = "default"; - status = "ok"; + status = "okay"; }; cryptobam: dma@8e04000 { - status = "ok"; + status = "okay"; }; crypto@8e3a000 { - status = "ok"; + status = "okay"; }; watchdog@b017000 { - status = "ok"; + status = "okay"; }; wifi@a000000 { - status = "ok"; + status = "okay"; }; wifi@a800000 { - status = "ok"; + status = "okay"; }; }; }; diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts index 7a96f300bc8d..b0f476ff017f 100644 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts @@ -9,11 +9,11 @@ soc { dma@7984000 { - status = "ok"; + status = "okay"; }; qpic-nand@79b0000 { - status = "ok"; + status = "okay"; }; }; }; diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi index 7c1eb1963c67..7a337dc08741 100644 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi @@ -70,23 +70,23 @@ serial@78af000 { pinctrl-0 = <&serial_0_pins>; pinctrl-names = "default"; - status = "ok"; + status = "okay"; }; serial@78b0000 { pinctrl-0 = <&serial_1_pins>; pinctrl-names = "default"; - status = "ok"; + status = "okay"; }; dma@7884000 { - status = "ok"; + status = "okay"; }; spi@78b5000 { /* BLSP1 QUP1 */ pinctrl-0 = <&spi_0_pins>; pinctrl-names = "default"; - status = "ok"; + status = "okay"; cs-gpios = <&tlmm 12 0>; m25p80@0 { @@ -99,7 +99,7 @@ }; pci@40000000 { - status = "ok"; + status = "okay"; perst-gpio = <&tlmm 38 0x1>; }; diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts index 8c7ef6537ae6..f343a2244386 100644 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts @@ -9,12 +9,12 @@ soc { pci@40000000 { - status = "ok"; + status = "okay"; perst-gpio = <&tlmm 38 0x1>; }; spi@78b6000 { - status = "ok"; + status = "okay"; }; pinctrl@1000000 { @@ -43,13 +43,13 @@ serial@78b0000 { pinctrl-0 = <&serial_1_pins>; pinctrl-names = "default"; - status = "ok"; + status = "okay"; }; spi@78b5000 { pinctrl-0 = <&spi_0_pins>; pinctrl-names = "default"; - status = "ok"; + status = "okay"; cs-gpios = <&tlmm 12 0>; m25p80@0 { diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts index af7a9028d492..582acb681a98 100644 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts @@ -19,7 +19,7 @@ serial@78b0000 { pinctrl-0 = <&serial_1_pins>; pinctrl-names = "default"; - status = "ok"; + status = "okay"; }; }; }; diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi index 9f1a5a668772..94872518b5a2 100644 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi @@ -49,27 +49,27 @@ serial@78af000 { pinctrl-0 = <&serial_0_pins>; pinctrl-names = "default"; - status = "ok"; + status = "okay"; }; dma@7884000 { - status = "ok"; + status = "okay"; }; i2c@78b7000 { /* BLSP1 QUP2 */ pinctrl-0 = <&i2c_0_pins>; pinctrl-names = "default"; - status = "ok"; + status = "okay"; }; dma@7984000 { - status = "ok"; + status = "okay"; }; qpic-nand@79b0000 { pinctrl-0 = <&nand_pins>; pinctrl-names = "default"; - status = "ok"; + status = "okay"; }; }; }; diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index 74d8e2c8e4b3..7bf1da916f25 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -190,7 +190,7 @@ reg = <0x1800000 0x60000>; }; - rng@22000 { + prng: rng@22000 { compatible = "qcom,prng"; reg = <0x22000 0x140>; clocks = <&gcc GCC_PRNG_AHB_CLK>; @@ -209,6 +209,16 @@ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; }; + vqmmc: regulator@1948000 { + compatible = "qcom,vqmmc-ipq4019-regulator"; + reg = <0x01948000 0x4>; + regulator-name = "vqmmc"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + status = "disabled"; + }; + sdhci: sdhci@7824900 { compatible = "qcom,sdhci-msm-v4"; reg = <0x7824900 0x11c>, <0x7824000 0x800>; @@ -300,7 +310,7 @@ status = "disabled"; }; - crypto@8e3a000 { + crypto: crypto@8e3a000 { compatible = "qcom,crypto-v5.1"; reg = <0x08e3a000 0x6000>; clocks = <&gcc GCC_CRYPTO_AHB_CLK>, @@ -386,7 +396,7 @@ dma-names = "rx", "tx"; }; - watchdog@b017000 { + watchdog: watchdog@b017000 { compatible = "qcom,kpss-wdt", "qcom,kpss-wdt-ipq4019"; reg = <0xb017000 0x40>; clocks = <&sleep_clk>; @@ -605,5 +615,79 @@ reg = <4>; }; }; + + usb3_ss_phy: ssphy@9a000 { + compatible = "qcom,usb-ss-ipq4019-phy"; + #phy-cells = <0>; + reg = <0x9a000 0x800>; + reg-names = "phy_base"; + resets = <&gcc USB3_UNIPHY_PHY_ARES>; + reset-names = "por_rst"; + status = "disabled"; + }; + + usb3_hs_phy: hsphy@a6000 { + compatible = "qcom,usb-hs-ipq4019-phy"; + #phy-cells = <0>; + reg = <0xa6000 0x40>; + reg-names = "phy_base"; + resets = <&gcc USB3_HSPHY_POR_ARES>, <&gcc USB3_HSPHY_S_ARES>; + reset-names = "por_rst", "srif_rst"; + status = "disabled"; + }; + + usb3: usb3@8af8800 { + compatible = "qcom,dwc3"; + reg = <0x8af8800 0x100>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&gcc GCC_USB3_MASTER_CLK>, + <&gcc GCC_USB3_SLEEP_CLK>, + <&gcc GCC_USB3_MOCK_UTMI_CLK>; + clock-names = "master", "sleep", "mock_utmi"; + ranges; + status = "disabled"; + + dwc3@8a00000 { + compatible = "snps,dwc3"; + reg = <0x8a00000 0xf8000>; + interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usb3_hs_phy>, <&usb3_ss_phy>; + phy-names = "usb2-phy", "usb3-phy"; + dr_mode = "host"; + }; + }; + + usb2_hs_phy: hsphy@a8000 { + compatible = "qcom,usb-hs-ipq4019-phy"; + #phy-cells = <0>; + reg = <0xa8000 0x40>; + reg-names = "phy_base"; + resets = <&gcc USB2_HSPHY_POR_ARES>, <&gcc USB2_HSPHY_S_ARES>; + reset-names = "por_rst", "srif_rst"; + status = "disabled"; + }; + + usb2: usb2@60f8800 { + compatible = "qcom,dwc3"; + reg = <0x60f8800 0x100>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&gcc GCC_USB2_MASTER_CLK>, + <&gcc GCC_USB2_SLEEP_CLK>, + <&gcc GCC_USB2_MOCK_UTMI_CLK>; + clock-names = "master", "sleep", "mock_utmi"; + ranges; + status = "disabled"; + + dwc3@6000000 { + compatible = "snps,dwc3"; + reg = <0x6000000 0xf8000>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usb2_hs_phy>; + phy-names = "usb2-phy"; + dr_mode = "host"; + }; + }; }; }; diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts index 554c65e7aa0e..e5b9b9cf6097 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts @@ -24,7 +24,7 @@ gsbi@16300000 { i2c@16380000 { - status = "ok"; + status = "okay"; clock-frequency = <200000>; pinctrl-0 = <&i2c4_pins>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi index e239a0486936..65330065390a 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi @@ -16,19 +16,19 @@ soc { gsbi@16300000 { qcom,mode = <GSBI_PROT_I2C_UART>; - status = "ok"; + status = "okay"; serial@16340000 { - status = "ok"; + status = "okay"; }; }; gsbi5: gsbi@1a200000 { qcom,mode = <GSBI_PROT_SPI>; - status = "ok"; + status = "okay"; spi4: spi@1a280000 { - status = "ok"; + status = "okay"; spi-max-frequency = <50000000>; pinctrl-0 = <&spi_pins>; @@ -57,12 +57,12 @@ }; sata-phy@1b400000 { - status = "ok"; + status = "okay"; }; sata@29000000 { ports-implemented = <0x1>; - status = "ok"; + status = "okay"; }; gpio_keys { diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index c51481405e7f..98995ead4413 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -20,7 +20,7 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { compatible = "qcom,krait"; enable-method = "qcom,kpss-acc-v1"; device_type = "cpu"; @@ -30,7 +30,7 @@ qcom,saw = <&saw0>; }; - cpu@1 { + cpu1: cpu@1 { compatible = "qcom,krait"; enable-method = "qcom,kpss-acc-v1"; device_type = "cpu"; @@ -67,7 +67,7 @@ no-map; }; - smem@41000000 { + smem: smem@41000000 { reg = <0x41000000 0x200000>; no-map; }; @@ -251,7 +251,7 @@ syscon-tcsr = <&tcsr>; - serial@12490000 { + gsbi2_serial: serial@12490000 { compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; reg = <0x12490000 0x1000>, <0x12480000 0x1000>; @@ -273,7 +273,6 @@ #address-cells = <1>; #size-cells = <0>; }; - }; gsbi4: gsbi@16300000 { @@ -326,7 +325,7 @@ syscon-tcsr = <&tcsr>; - serial@1a240000 { + gsbi5_serial: serial@1a240000 { compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; reg = <0x1a240000 0x1000>, <0x1a200000 0x1000>; @@ -386,6 +385,13 @@ }; }; + rng@1a500000 { + compatible = "qcom,prng"; + reg = <0x1a500000 0x200>; + clocks = <&gcc PRNG_CLK>; + clock-names = "core"; + }; + sata_phy: sata-phy@1b400000 { compatible = "qcom,ipq806x-sata-phy"; reg = <0x1b400000 0x200>; @@ -397,7 +403,7 @@ status = "disabled"; }; - sata@29000000 { + sata: sata@29000000 { compatible = "qcom,ipq806x-ahci", "generic-ahci"; reg = <0x29000000 0x180>; @@ -720,7 +726,7 @@ regulator-always-on; }; - sdcc1bam:dma@12402000 { + sdcc1bam: dma@12402000 { compatible = "qcom,bam-v1.3.0"; reg = <0x12402000 0x8000>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; @@ -730,7 +736,7 @@ qcom,ee = <0>; }; - sdcc3bam:dma@12182000 { + sdcc3bam: dma@12182000 { compatible = "qcom,bam-v1.3.0"; reg = <0x12182000 0x8000>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; @@ -740,13 +746,13 @@ qcom,ee = <0>; }; - amba { + amba: amba { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; - sdcc@12400000 { + sdcc1: sdcc@12400000 { status = "disabled"; compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; @@ -766,7 +772,7 @@ dma-names = "tx", "rx"; }; - sdcc@12180000 { + sdcc3: sdcc@12180000 { compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; status = "disabled"; @@ -779,7 +785,6 @@ cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <192000000>; - #mmc-ddr-1_8v; sd-uhs-sdr104; sd-uhs-ddr50; vqmmc-supply = <&vsdcc_fixed>; diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi index 26b034bd19d2..a725b73b5a2e 100644 --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi @@ -125,12 +125,12 @@ }; &gsbi3 { - status = "ok"; + status = "okay"; qcom,mode = <GSBI_PROT_SPI>; }; &gsbi3_spi { - status = "ok"; + status = "okay"; pinctrl-0 = <&gsbi3_pins>; pinctrl-names = "default"; assigned-clocks = <&gcc GSBI3_QUP_CLK>; @@ -138,34 +138,34 @@ }; &gsbi4 { - status = "ok"; + status = "okay"; qcom,mode = <GSBI_PROT_UART_W_FC>; }; &gsbi4_serial { - status = "ok"; + status = "okay"; pinctrl-0 = <&gsbi4_pins>; pinctrl-names = "default"; }; &gsbi5 { - status = "ok"; + status = "okay"; qcom,mode = <GSBI_PROT_I2C_UART>; }; &gsbi5_i2c { - status = "ok"; + status = "okay"; clock-frequency = <200000>; pinctrl-0 = <&gsbi5_i2c_pins>; pinctrl-names = "default"; }; &gsbi5_serial { - status = "ok"; + status = "okay"; pinctrl-0 = <&gsbi5_uart_pins>; pinctrl-names = "default"; }; &sdcc1 { - status = "ok"; + status = "okay"; }; diff --git a/arch/arm/boot/dts/qcom-msm8660-surf.dts b/arch/arm/boot/dts/qcom-msm8660-surf.dts index f01a11b18d6a..6a321ccb0bd0 100644 --- a/arch/arm/boot/dts/qcom-msm8660-surf.dts +++ b/arch/arm/boot/dts/qcom-msm8660-surf.dts @@ -17,10 +17,10 @@ soc { gsbi@19c00000 { - status = "ok"; + status = "okay"; qcom,mode = <GSBI_PROT_I2C_UART>; serial@19c40000 { - status = "ok"; + status = "okay"; }; }; diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts index 82d5d8267adf..e7d2e937ea4c 100644 --- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts +++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts @@ -17,10 +17,10 @@ soc { gsbi@16400000 { - status = "ok"; + status = "okay"; qcom,mode = <GSBI_PROT_I2C_UART>; serial@16440000 { - status = "ok"; + status = "okay"; }; }; @@ -273,12 +273,12 @@ }; gsbi@16000000 { - status = "ok"; + status = "okay"; qcom,mode = <GSBI_PROT_SPI>; pinctrl-names = "default"; pinctrl-0 = <&spi1_default>; spi@16080000 { - status = "ok"; + status = "okay"; eth@0 { compatible = "micrel,ks8851"; reg = <0>; diff --git a/arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dts b/arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dts index d2d48770ec0f..ea15b645b229 100644 --- a/arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dts +++ b/arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dts @@ -256,11 +256,11 @@ &soc { serial@f991e000 { - status = "ok"; + status = "okay"; }; remoteproc@fb21b000 { - status = "ok"; + status = "okay"; vddmx-supply = <&pm8841_s1>; vddcx-supply = <&pm8841_s2>; @@ -273,7 +273,7 @@ label = "pronto"; wcnss { - status = "ok"; + status = "okay"; }; }; }; @@ -335,7 +335,7 @@ }; sdhci@f9824900 { - status = "ok"; + status = "okay"; vmmc-supply = <&pm8941_l20>; vqmmc-supply = <&pm8941_s3>; @@ -348,7 +348,7 @@ }; sdhci@f98a4900 { - status = "ok"; + status = "okay"; vmmc-supply = <&pm8941_l21>; vqmmc-supply = <&pm8941_l13>; @@ -360,7 +360,7 @@ }; usb@f9a55000 { - status = "ok"; + status = "okay"; phys = <&usb_hs1_phy>; phy-select = <&tcsr 0xb000 0>; @@ -373,7 +373,7 @@ ulpi { phy@a { - status = "ok"; + status = "okay"; v1p8-supply = <&pm8941_l6>; v3p3-supply = <&pm8941_l24>; diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts index e769f638f205..0cda654371ae 100644 --- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts +++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts @@ -239,7 +239,7 @@ &soc { serial@f991d000 { - status = "ok"; + status = "okay"; }; pinctrl@fd510000 { @@ -410,7 +410,7 @@ }; sdhci@f9824900 { - status = "ok"; + status = "okay"; vmmc-supply = <&pm8941_l20>; vqmmc-supply = <&pm8941_s3>; @@ -423,7 +423,7 @@ }; sdhci@f98a4900 { - status = "ok"; + status = "okay"; max-frequency = <100000000>; bus-width = <4>; @@ -471,7 +471,7 @@ }; serial@f9960000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&blsp2_uart10_pin_a>; @@ -490,7 +490,7 @@ }; i2c@f9967000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c11_pins>; clock-frequency = <355000>; @@ -498,7 +498,7 @@ led-controller@38 { compatible = "ti,lm3630a"; - status = "ok"; + status = "okay"; reg = <0x38>; #address-cells = <1>; @@ -514,7 +514,7 @@ }; i2c@f9968000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c12_pins>; clock-frequency = <100000>; @@ -551,7 +551,7 @@ }; i2c@f9923000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; clock-frequency = <100000>; @@ -585,7 +585,7 @@ }; i2c@f9924000 { - status = "ok"; + status = "okay"; clock-frequency = <355000>; qcom,src-freq = <50000000>; @@ -620,7 +620,7 @@ }; i2c@f9925000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c3_pins>; clock-frequency = <100000>; @@ -638,7 +638,7 @@ }; usb@f9a55000 { - status = "ok"; + status = "okay"; phys = <&usb_hs1_phy>; phy-select = <&tcsr 0xb000 0>; @@ -652,7 +652,7 @@ ulpi { phy@a { - status = "ok"; + status = "okay"; v1p8-supply = <&pm8941_l6>; v3p3-supply = <&pm8941_l24>; @@ -663,14 +663,14 @@ }; mdss@fd900000 { - status = "ok"; + status = "okay"; mdp@fd900000 { - status = "ok"; + status = "okay"; }; dsi@fd922800 { - status = "ok"; + status = "okay"; vdda-supply = <&pm8941_l2>; vdd-supply = <&pm8941_lvs3>; @@ -704,7 +704,7 @@ }; dsi-phy@fd922a00 { - status = "ok"; + status = "okay"; vddio-supply = <&pm8941_l12>; }; diff --git a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts index 97352de91314..a0f7f461f48c 100644 --- a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts +++ b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts @@ -12,8 +12,8 @@ aliases { serial0 = &blsp1_uart1; - sdhc1 = &sdhc_1; /* SDC1 eMMC slot */ - sdhc2 = &sdhc_2; /* SDC2 SD card slot */ + mmc0 = &sdhc_1; /* SDC1 eMMC slot */ + mmc1 = &sdhc_2; /* SDC2 SD card slot */ }; chosen { @@ -30,6 +30,7 @@ pma8084_s1: s1 { regulator-min-microvolt = <675000>; regulator-max-microvolt = <1050000>; + regulator-always-on; }; pma8084_s2: s2 { @@ -115,6 +116,7 @@ pma8084_l12: l12 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; + regulator-always-on; }; pma8084_l13: l13 { @@ -298,12 +300,26 @@ enable-active-high; }; + vreg_panel: panel-regulator { + compatible = "regulator-fixed"; + + pinctrl-names = "default"; + pinctrl-0 = <&panel_en_pin>; + + regulator-name = "panel-vddr-reg"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + + gpio = <&pma8084_gpios 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + /delete-node/ vreg-boost; }; &soc { serial@f991e000 { - status = "ok"; + status = "okay"; }; gpio-keys { @@ -453,10 +469,20 @@ bias-pull-down; }; }; + + panel_te_pin: panel { + te { + pins = "gpio12"; + function = "mdp_vsync"; + + drive-strength = <2>; + bias-disable; + }; + }; }; sdhc_1: sdhci@f9824900 { - status = "ok"; + status = "okay"; vmmc-supply = <&pma8084_l20>; vqmmc-supply = <&pma8084_s4>; @@ -469,7 +495,7 @@ }; sdhc_2: sdhci@f9864900 { - status = "ok"; + status = "okay"; max-frequency = <100000000>; @@ -518,7 +544,7 @@ }; usb@f9a55000 { - status = "ok"; + status = "okay"; phys = <&usb_hs1_phy>; phy-select = <&tcsr 0xb000 0>; @@ -531,7 +557,7 @@ ulpi { phy@a { - status = "ok"; + status = "okay"; v1p8-supply = <&pma8084_l6>; v3p3-supply = <&pma8084_l24>; @@ -697,6 +723,64 @@ pinctrl-0 = <&fuelgauge_pin>; }; }; + + adreno@fdb00000 { + status = "ok"; + }; + + mdss@fd900000 { + status = "ok"; + + mdp@fd900000 { + status = "ok"; + }; + + dsi@fd922800 { + status = "ok"; + + vdda-supply = <&pma8084_l2>; + vdd-supply = <&pma8084_l22>; + vddio-supply = <&pma8084_l12>; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + port@1 { + endpoint { + remote-endpoint = <&panel_in>; + data-lanes = <0 1 2 3>; + }; + }; + }; + + panel: panel@0 { + reg = <0>; + compatible = "samsung,s6e3fa2"; + + pinctrl-names = "default"; + pinctrl-0 = <&panel_te_pin &panel_rst_pin>; + + iovdd-supply = <&pma8084_lvs4>; + vddr-supply = <&vreg_panel>; + + reset-gpios = <&pma8084_gpios 17 GPIO_ACTIVE_LOW>; + te-gpios = <&msmgpio 12 GPIO_ACTIVE_HIGH>; + + port { + panel_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; + }; + + dsi-phy@fd922a00 { + status = "ok"; + + vddio-supply = <&pma8084_l12>; + }; + }; }; &spmi_bus { @@ -726,6 +810,14 @@ power-source = <PMA8084_GPIO_S4>; }; + panel_en_pin: panel-en-pin { + pins = "gpio14"; + function = "normal"; + bias-pull-up; + power-source = <PMA8084_GPIO_S4>; + qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; + }; + wlan_sleep_clk_pin: wlan-sleep-clk-pin { pins = "gpio16"; function = "func2"; @@ -735,6 +827,15 @@ qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; }; + panel_rst_pin: panel-rst-pin { + pins = "gpio17"; + function = "normal"; + bias-disable; + power-source = <PMA8084_GPIO_S4>; + qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; + }; + + fuelgauge_pin: fuelgauge-int-pin { pins = "gpio21"; function = "normal"; diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dts index 5669f5f58a86..398a3eaf306b 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dts +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-amami.dts @@ -261,7 +261,7 @@ &soc { sdhci@f9824900 { - status = "ok"; + status = "okay"; vmmc-supply = <&pm8941_l20>; vqmmc-supply = <&pm8941_s3>; @@ -274,7 +274,7 @@ }; sdhci@f98a4900 { - status = "ok"; + status = "okay"; bus-width = <4>; @@ -288,7 +288,7 @@ }; serial@f991e000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&blsp1_uart2_pin_a>; @@ -366,7 +366,7 @@ }; usb@f9a55000 { - status = "ok"; + status = "okay"; phys = <&usb_hs1_phy>; phy-select = <&tcsr 0xb000 0>; @@ -379,7 +379,7 @@ ulpi { phy@a { - status = "ok"; + status = "okay"; v1p8-supply = <&pm8941_l6>; v3p3-supply = <&pm8941_l24>; @@ -415,7 +415,7 @@ }; coincell@2800 { - status = "ok"; + status = "okay"; qcom,rset-ohms = <2100>; qcom,vset-millivolts = <3000>; }; @@ -423,7 +423,7 @@ pm8941@1 { wled@d800 { - status = "ok"; + status = "okay"; qcom,cs-out; qcom,current-limit = <20>; diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dts index 701b396719c7..f4ec08f13003 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dts +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-castor.dts @@ -279,7 +279,7 @@ &soc { sdhci@f9824900 { - status = "ok"; + status = "okay"; vmmc-supply = <&pm8941_l20>; vqmmc-supply = <&pm8941_s3>; @@ -292,7 +292,7 @@ }; sdhci@f9864900 { - status = "ok"; + status = "okay"; max-frequency = <100000000>; non-removable; @@ -316,7 +316,7 @@ }; sdhci@f98a4900 { - status = "ok"; + status = "okay"; bus-width = <4>; @@ -330,14 +330,14 @@ }; serial@f991e000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&blsp1_uart2_pin_a>; }; usb@f9a55000 { - status = "ok"; + status = "okay"; phys = <&usb_hs1_phy>; phy-select = <&tcsr 0xb000 0>; @@ -350,7 +350,7 @@ ulpi { phy@a { - status = "ok"; + status = "okay"; v1p8-supply = <&pm8941_l6>; v3p3-supply = <&pm8941_l24>; @@ -482,7 +482,7 @@ }; i2c@f9964000 { - status = "ok"; + status = "okay"; clock-frequency = <355000>; qcom,src-freq = <50000000>; @@ -522,7 +522,7 @@ }; i2c@f9967000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c11_pins>; clock-frequency = <355000>; @@ -635,7 +635,7 @@ }; coincell@2800 { - status = "ok"; + status = "okay"; qcom,rset-ohms = <2100>; qcom,vset-millivolts = <3000>; }; diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts index 611bae9fe66b..9743beebd84d 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts @@ -261,7 +261,7 @@ &soc { usb@f9a55000 { - status = "ok"; + status = "okay"; phys = <&usb_hs1_phy>; phy-select = <&tcsr 0xb000 0>; @@ -274,7 +274,7 @@ ulpi { phy@a { - status = "ok"; + status = "okay"; v1p8-supply = <&pm8941_l6>; v3p3-supply = <&pm8941_l24>; @@ -286,7 +286,7 @@ }; sdhci@f9824900 { - status = "ok"; + status = "okay"; vmmc-supply = <&pm8941_l20>; vqmmc-supply = <&pm8941_s3>; @@ -299,7 +299,7 @@ }; sdhci@f98a4900 { - status = "ok"; + status = "okay"; bus-width = <4>; @@ -313,14 +313,14 @@ }; serial@f991e000 { - status = "ok"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&blsp1_uart2_pin_a>; }; i2c@f9924000 { - status = "ok"; + status = "okay"; clock-frequency = <355000>; qcom,src-freq = <50000000>; @@ -464,7 +464,7 @@ }; coincell@2800 { - status = "ok"; + status = "okay"; qcom,rset-ohms = <2100>; qcom,vset-millivolts = <3000>; }; @@ -472,7 +472,7 @@ pm8941@1 { wled@d800 { - status = "ok"; + status = "okay"; qcom,cs-out; qcom,current-limit = <20>; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 51f5f904f9eb..c65d33591efa 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1399,6 +1399,49 @@ <&rpmcc RPM_SMD_CNOC_A_CLK>; }; + gpu: adreno@fdb00000 { + status = "disabled"; + + compatible = "qcom,adreno-330.1", + "qcom,adreno"; + reg = <0xfdb00000 0x10000>; + reg-names = "kgsl_3d0_reg_memory"; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "kgsl_3d0_irq"; + clock-names = "core", + "iface", + "mem_iface"; + clocks = <&mmcc OXILI_GFX3D_CLK>, + <&mmcc OXILICX_AHB_CLK>, + <&mmcc OXILICX_AXI_CLK>; + sram = <&gmu_sram>; + power-domains = <&mmcc OXILICX_GDSC>; + operating-points-v2 = <&gpu_opp_table>; + + interconnects = <&mmssnoc MNOC_MAS_GRAPHICS_3D &bimc BIMC_SLV_EBI_CH0>, + <&ocmemnoc OCMEM_VNOC_MAS_GFX3D &ocmemnoc OCMEM_SLV_OCMEM>; + interconnect-names = "gfx-mem", + "ocmem"; + + // iommus = <&gpu_iommu 0>; + + gpu_opp_table: opp_table { + compatible = "operating-points-v2"; + + opp-320000000 { + opp-hz = /bits/ 64 <320000000>; + }; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + }; + + opp-27000000 { + opp-hz = /bits/ 64 <27000000>; + }; + }; + }; + mdss: mdss@fd900000 { status = "disabled"; diff --git a/arch/arm/boot/dts/qcom-msm8974pro.dtsi b/arch/arm/boot/dts/qcom-msm8974pro.dtsi index 6740a4cb7da8..b64c28036dd0 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974pro.dtsi @@ -14,5 +14,10 @@ clock-controller@fc400000 { compatible = "qcom,gcc-msm8974pro"; }; + + adreno@fdb00000 { + compatible = "qcom,adreno-330.2", + "qcom,adreno"; + }; }; }; diff --git a/arch/arm/boot/dts/qcom-pmx55.dtsi b/arch/arm/boot/dts/qcom-pmx55.dtsi new file mode 100644 index 000000000000..6571b88d018a --- /dev/null +++ b/arch/arm/boot/dts/qcom-pmx55.dtsi @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/* + * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020, Linaro Limited + */ + +#include <dt-bindings/iio/qcom,spmi-vadc.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> + +&spmi_bus { + pmic@8 { + compatible = "qcom,pmx55", "qcom,spmi-pmic"; + reg = <0x8 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + power-on@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x0800>; + + status = "disabled"; + }; + + pmx55_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x8 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&pmx55_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmx55_adc: adc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + + ref-gnd@0 { + reg = <ADC5_REF_GND>; + qcom,pre-scaling = <1 1>; + label = "ref_gnd"; + }; + + vref-1p25@1 { + reg = <ADC5_1P25VREF>; + qcom,pre-scaling = <1 1>; + label = "vref_1p25"; + }; + + die-temp@6 { + reg = <ADC5_DIE_TEMP>; + qcom,pre-scaling = <1 1>; + label = "die_temp"; + }; + + chg-temp@9 { + reg = <ADC5_CHG_TEMP>; + qcom,pre-scaling = <1 1>; + label = "chg_temp"; + }; + }; + + pmx55_gpios: gpio@c000 { + compatible = "qcom,pmx55-gpio", "qcom,spmi-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmic@9 { + compatible = "qcom,pmx55", "qcom,spmi-pmic"; + reg = <0x9 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; diff --git a/arch/arm/boot/dts/qcom-sdx55-mtp.dts b/arch/arm/boot/dts/qcom-sdx55-mtp.dts new file mode 100644 index 000000000000..9649c1e11311 --- /dev/null +++ b/arch/arm/boot/dts/qcom-sdx55-mtp.dts @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020, Linaro Ltd. + */ + +/dts-v1/; + +#include "qcom-sdx55.dtsi" +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> +#include <arm64/qcom/pm8150b.dtsi> +#include "qcom-pmx55.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SDX55 MTP"; + compatible = "qcom,sdx55-mtp", "qcom,sdx55"; + qcom,board-id = <0x5010008 0x0>; + + aliases { + serial0 = &blsp1_uart3; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mpss_debug_mem: memory@8ef00000 { + no-map; + reg = <0x8ef00000 0x800000>; + }; + + ipa_fw_mem: memory@8fced000 { + no-map; + reg = <0x8fced000 0x10000>; + }; + + mpss_adsp_mem: memory@90c00000 { + no-map; + reg = <0x90c00000 0xd400000>; + }; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + }; + + vreg_bob_3p3: pmx55-bob { + compatible = "regulator-fixed"; + regulator-name = "vreg_bob_3p3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-always-on; + regulator-boot-on; + + vin-supply = <&vph_pwr>; + }; + + vreg_s7e_mx_0p752: pmx55-s7e { + compatible = "regulator-fixed"; + regulator-name = "vreg_s7e_mx_0p752"; + regulator-min-microvolt = <752000>; + regulator-max-microvolt = <752000>; + + vin-supply = <&vph_pwr>; + }; +}; + +&apps_rsc { + pmx55-rpmh-regulators { + compatible = "qcom,pmx55-rpmh-regulators"; + qcom,pmic-id = "e"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s6-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-l1-l2-supply = <&vreg_s2e_1p224>; + vdd-l3-l9-supply = <&vreg_s3e_0p824>; + vdd-l4-l12-supply = <&vreg_s4e_1p904>; + vdd-l5-l6-supply = <&vreg_s4e_1p904>; + vdd-l7-l8-supply = <&vreg_s3e_0p824>; + vdd-l10-l11-l13-supply = <&vreg_bob_3p3>; + vdd-l14-supply = <&vreg_s7e_mx_0p752>; + vdd-l15-supply = <&vreg_s2e_1p224>; + vdd-l16-supply = <&vreg_s4e_1p904>; + + vreg_s2e_1p224: smps2 { + regulator-min-microvolt = <1280000>; + regulator-max-microvolt = <1400000>; + }; + + vreg_s3e_0p824: smps3 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1000000>; + }; + + vreg_s4e_1p904: smps4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1960000>; + }; + + vreg_l1e_bb_1p2: ldo1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + ldo2 { + regulator-min-microvolt = <1128000>; + regulator-max-microvolt = <1128000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + ldo3 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + vreg_l4e_bb_0p875: ldo4 { + regulator-min-microvolt = <872000>; + regulator-max-microvolt = <872000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + vreg_l5e_bb_1p7: ldo5 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <1900000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + ldo6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + ldo7 { + regulator-min-microvolt = <480000>; + regulator-max-microvolt = <900000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + ldo8 { + regulator-min-microvolt = <480000>; + regulator-max-microvolt = <900000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + ldo9 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + vreg_l10e_3p1: ldo10 { + regulator-min-microvolt = <3088000>; + regulator-max-microvolt = <3088000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + ldo11 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + ldo12 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + ldo13 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + ldo14 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + ldo15 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + ldo16 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <1904000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + }; +}; + +&blsp1_uart3 { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&qpic_nand { + status = "okay"; + + nand@0 { + reg = <0>; + + nand-ecc-strength = <8>; + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + }; +}; + +&usb { + status = "okay"; +}; + +&usb_dwc3 { + dr_mode = "peripheral"; +}; + +&usb_hsphy { + status = "okay"; + vdda-pll-supply = <&vreg_l4e_bb_0p875>; + vdda33-supply = <&vreg_l10e_3p1>; + vdda18-supply = <&vreg_l5e_bb_1p7>; +}; + +&usb_qmpphy { + status = "okay"; + vdda-phy-supply = <&vreg_l4e_bb_0p875>; + vdda-pll-supply = <&vreg_l1e_bb_1p2>; +}; diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi new file mode 100644 index 000000000000..e4180bbc4655 --- /dev/null +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -0,0 +1,505 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * SDX55 SoC device tree source + * + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (c) 2020, Linaro Ltd. + */ + +#include <dt-bindings/clock/qcom,gcc-sdx55.h> +#include <dt-bindings/clock/qcom,rpmh.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/power/qcom-rpmpd.h> +#include <dt-bindings/soc/qcom,rpmh-rsc.h> + +/ { + #address-cells = <1>; + #size-cells = <1>; + qcom,msm-id = <357 0x10000>, <368 0x10000>, <418 0x10000>; + interrupt-parent = <&intc>; + + memory { + device_type = "memory"; + reg = <0 0>; + }; + + clocks { + xo_board: xo-board { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <38400000>; + clock-output-names = "xo_board"; + }; + + sleep_clk: sleep-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32000>; + }; + + nand_clk_dummy: nand-clk-dummy { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32000>; + }; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + hyp_mem: memory@8fc00000 { + no-map; + reg = <0x8fc00000 0x80000>; + }; + + ac_db_mem: memory@8fc80000 { + no-map; + reg = <0x8fc80000 0x40000>; + }; + + secdata_mem: memory@8fcfd000 { + no-map; + reg = <0x8fcfd000 0x1000>; + }; + + sbl_mem: memory@8fd00000 { + no-map; + reg = <0x8fd00000 0x100000>; + }; + + aop_image: memory@8fe00000 { + no-map; + reg = <0x8fe00000 0x20000>; + }; + + aop_cmd_db: memory@8fe20000 { + compatible = "qcom,cmd-db"; + reg = <0x8fe20000 0x20000>; + no-map; + }; + + smem_mem: memory@8fe40000 { + no-map; + reg = <0x8fe40000 0xc0000>; + }; + + tz_mem: memory@8ff00000 { + no-map; + reg = <0x8ff00000 0x100000>; + }; + + tz_apps_mem: memory@0x90000000 { + no-map; + reg = <0x90000000 0x500000>; + }; + }; + + smem { + compatible = "qcom,smem"; + memory-region = <&smem_mem>; + hwlocks = <&tcsr_mutex 3>; + }; + + soc: soc { + #address-cells = <1>; + #size-cells = <1>; + ranges; + compatible = "simple-bus"; + + gcc: clock-controller@100000 { + compatible = "qcom,gcc-sdx55"; + reg = <0x100000 0x1f0000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clock-names = "bi_tcxo", "sleep_clk"; + clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>; + }; + + blsp1_uart3: serial@831000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x00831000 0x200>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_LOW>; + clocks = <&gcc 30>, + <&gcc 9>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + usb_hsphy: phy@ff4000 { + compatible = "qcom,usb-snps-hs-7nm-phy"; + reg = <0x00ff4000 0x114>; + status = "disabled"; + #phy-cells = <0>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "ref"; + + resets = <&gcc GCC_QUSB2PHY_BCR>; + }; + + usb_qmpphy: phy@ff6000 { + compatible = "qcom,sdx55-qmp-usb3-uni-phy"; + reg = <0x00ff6000 0x1c0>; + status = "disabled"; + #clock-cells = <1>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_USB3_PHY_AUX_CLK>, + <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&gcc GCC_USB3_PRIM_CLKREF_CLK>; + clock-names = "aux", "cfg_ahb", "ref"; + + resets = <&gcc GCC_USB3PHY_PHY_BCR>, + <&gcc GCC_USB3_PHY_BCR>; + reset-names = "phy", "common"; + + usb_ssphy: phy@ff6200 { + reg = <0x00ff6200 0x170>, + <0x00ff6400 0x200>, + <0x00ff6800 0x800>; + #phy-cells = <0>; + #clock-cells = <0>; + clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "usb3_uni_phy_pipe_clk_src"; + }; + }; + + qpic_bam: dma-controller@1b04000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x01b04000 0x1c000>; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rpmhcc RPMH_QPIC_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely; + status = "disabled"; + }; + + qpic_nand: nand@1b30000 { + compatible = "qcom,sdx55-nand"; + reg = <0x01b30000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rpmhcc RPMH_QPIC_CLK>, + <&nand_clk_dummy>; + clock-names = "core", "aon"; + + dmas = <&qpic_bam 0>, + <&qpic_bam 1>, + <&qpic_bam 2>; + dma-names = "tx", "rx", "cmd"; + status = "disabled"; + }; + + tcsr_mutex: hwlock@1f40000 { + compatible = "qcom,tcsr-mutex"; + reg = <0x01f40000 0x40000>; + #hwlock-cells = <1>; + }; + + sdhc_1: sdhci@8804000 { + compatible = "qcom,sdx55-sdhci", "qcom,sdhci-msm-v5"; + reg = <0x08804000 0x1000>; + interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hc_irq", "pwr_irq"; + clocks = <&gcc GCC_SDCC1_AHB_CLK>, + <&gcc GCC_SDCC1_APPS_CLK>; + clock-names = "iface", "core"; + status = "disabled"; + }; + + usb: usb@a6f8800 { + compatible = "qcom,sdx55-dwc3", "qcom,dwc3"; + reg = <0x0a6f8800 0x400>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_USB30_SLV_AHB_CLK>, + <&gcc GCC_USB30_MASTER_CLK>, + <&gcc GCC_USB30_MSTR_AXI_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_SLEEP_CLK>; + clock-names = "cfg_noc", "core", "iface", "mock_utmi", + "sleep"; + + assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_MASTER_CLK>; + assigned-clock-rates = <19200000>, <200000000>; + + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hs_phy_irq", "ss_phy_irq", + "dm_hs_phy_irq", "dp_hs_phy_irq"; + + power-domains = <&gcc USB30_GDSC>; + + resets = <&gcc GCC_USB30_BCR>; + + usb_dwc3: dwc3@a600000 { + compatible = "snps,dwc3"; + reg = <0x0a600000 0xcd00>; + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + iommus = <&apps_smmu 0x1a0 0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_hsphy>, <&usb_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + + pdc: interrupt-controller@b210000 { + compatible = "qcom,sdx55-pdc", "qcom,pdc"; + reg = <0x0b210000 0x30000>; + qcom,pdc-ranges = <0 179 52>; + #interrupt-cells = <3>; + interrupt-parent = <&intc>; + interrupt-controller; + }; + + restart@c264000 { + compatible = "qcom,pshold"; + reg = <0x0c264000 0x1000>; + }; + + spmi_bus: qcom,spmi@c440000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x0c440000 0x0000d00>, + <0x0c600000 0x2000000>, + <0x0e600000 0x0100000>, + <0x0e700000 0x00a0000>, + <0x0c40a000 0x0000700>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + interrupt-names = "periph_irq"; + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; + qcom,ee = <0>; + qcom,channel = <0>; + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + cell-index = <0>; + }; + + tlmm: pinctrl@f100000 { + compatible = "qcom,sdx55-pinctrl"; + reg = <0xf100000 0x300000>; + interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + apps_smmu: iommu@15000000 { + compatible = "qcom,sdx55-smmu-500", "arm,mmu-500"; + reg = <0x15000000 0x20000>; + #iommu-cells = <2>; + #global-interrupts = <1>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + }; + + intc: interrupt-controller@17800000 { + compatible = "qcom,msm-qgic2"; + interrupt-controller; + interrupt-parent = <&intc>; + #interrupt-cells = <3>; + reg = <0x17800000 0x1000>, + <0x17802000 0x1000>; + }; + + watchdog@17817000 { + compatible = "qcom,apss-wdt-sdx55", "qcom,kpss-wdt"; + reg = <0x17817000 0x1000>; + clocks = <&sleep_clk>; + }; + + timer@17820000 { + #address-cells = <1>; + #size-cells = <1>; + ranges; + compatible = "arm,armv7-timer-mem"; + reg = <0x17820000 0x1000>; + clock-frequency = <19200000>; + + frame@17821000 { + frame-number = <0>; + interrupts = <GIC_SPI 7 0x4>, + <GIC_SPI 6 0x4>; + reg = <0x17821000 0x1000>, + <0x17822000 0x1000>; + }; + + frame@17823000 { + frame-number = <1>; + interrupts = <GIC_SPI 8 0x4>; + reg = <0x17823000 0x1000>; + status = "disabled"; + }; + + frame@17824000 { + frame-number = <2>; + interrupts = <GIC_SPI 9 0x4>; + reg = <0x17824000 0x1000>; + status = "disabled"; + }; + + frame@17825000 { + frame-number = <3>; + interrupts = <GIC_SPI 10 0x4>; + reg = <0x17825000 0x1000>; + status = "disabled"; + }; + + frame@17826000 { + frame-number = <4>; + interrupts = <GIC_SPI 11 0x4>; + reg = <0x17826000 0x1000>; + status = "disabled"; + }; + + frame@17827000 { + frame-number = <5>; + interrupts = <GIC_SPI 12 0x4>; + reg = <0x17827000 0x1000>; + status = "disabled"; + }; + + frame@17828000 { + frame-number = <6>; + interrupts = <GIC_SPI 13 0x4>; + reg = <0x17828000 0x1000>; + status = "disabled"; + }; + + frame@17829000 { + frame-number = <7>; + interrupts = <GIC_SPI 14 0x4>; + reg = <0x17829000 0x1000>; + status = "disabled"; + }; + }; + + apps_rsc: rsc@17840000 { + compatible = "qcom,rpmh-rsc"; + reg = <0x17830000 0x10000>, <0x17840000 0x10000>; + reg-names = "drv-0", "drv-1"; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; + qcom,tcs-offset = <0xd00>; + qcom,drv-id = <1>; + qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 2>, + <WAKE_TCS 2>, <CONTROL_TCS 1>; + + rpmhcc: clock-controller { + compatible = "qcom,sdx55-rpmh-clk"; + #clock-cells = <1>; + clock-names = "xo"; + clocks = <&xo_board>; + }; + + rpmhpd: power-controller { + compatible = "qcom,sdx55-rpmhpd"; + #power-domain-cells = <1>; + operating-points-v2 = <&rpmhpd_opp_table>; + + rpmhpd_opp_table: opp-table { + compatible = "operating-points-v2"; + + rpmhpd_opp_ret: opp1 { + opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; + }; + + rpmhpd_opp_min_svs: opp2 { + opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; + }; + + rpmhpd_opp_low_svs: opp3 { + opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; + }; + + rpmhpd_opp_svs: opp4 { + opp-level = <RPMH_REGULATOR_LEVEL_SVS>; + }; + + rpmhpd_opp_svs_l1: opp5 { + opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; + }; + + rpmhpd_opp_nom: opp6 { + opp-level = <RPMH_REGULATOR_LEVEL_NOM>; + }; + + rpmhpd_opp_nom_l1: opp7 { + opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; + }; + + rpmhpd_opp_nom_l2: opp8 { + opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; + }; + + rpmhpd_opp_turbo: opp9 { + opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; + }; + + rpmhpd_opp_turbo_l1: opp10 { + opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; + }; + }; + }; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + clock-frequency = <19200000>; + }; +}; |