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Diffstat (limited to 'arch/arm/mach-ep93xx')
-rw-r--r--arch/arm/mach-ep93xx/core.c29
1 files changed, 18 insertions, 11 deletions
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index e85bf17f2d2a..6f48b87a1ace 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -140,11 +140,29 @@ static struct irqaction ep93xx_timer_irq = {
.handler = ep93xx_timer_interrupt,
};
+static u32 ep93xx_gettimeoffset(void)
+{
+ int offset;
+
+ offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
+
+ /*
+ * Timer 4 is based on a 983.04 kHz reference clock,
+ * so dividing by 983040 gives the fraction of a second,
+ * so dividing by 0.983040 converts to uS.
+ * Refactor the calculation to avoid overflow.
+ * Finally, multiply by 1000 to give nS.
+ */
+ return (offset + (53 * offset / 3072)) * 1000;
+}
+
static void __init ep93xx_timer_init(void)
{
u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
EP93XX_TIMER123_CONTROL_CLKSEL;
+ arch_gettimeoffset = ep93xx_gettimeoffset;
+
/* Enable periodic HZ timer. */
__raw_writel(tmode, EP93XX_TIMER1_CONTROL);
__raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
@@ -158,19 +176,8 @@ static void __init ep93xx_timer_init(void)
setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
}
-static unsigned long ep93xx_gettimeoffset(void)
-{
- int offset;
-
- offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
-
- /* Calculate (1000000 / 983040) * offset. */
- return offset + (53 * offset / 3072);
-}
-
struct sys_timer ep93xx_timer = {
.init = ep93xx_timer_init,
- .offset = ep93xx_gettimeoffset,
};