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-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/boot/dts/am335x-bone.dts60
-rw-r--r--arch/arm/boot/dts/am335x-evm.dts100
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi71
-rw-r--r--arch/arm/boot/dts/at91sam9g25ek.dts2
-rw-r--r--arch/arm/boot/dts/elpida_ecb240abacn.dtsi67
-rw-r--r--arch/arm/boot/dts/omap2420-h4.dts2
-rw-r--r--arch/arm/boot/dts/omap2420.dtsi48
-rw-r--r--arch/arm/boot/dts/omap2430.dtsi92
-rw-r--r--arch/arm/boot/dts/omap3-beagle-xm.dts (renamed from arch/arm/boot/dts/omap3-beagle.dts)54
-rw-r--r--arch/arm/boot/dts/omap3-evm.dts13
-rw-r--r--arch/arm/boot/dts/omap3-overo.dtsi57
-rw-r--r--arch/arm/boot/dts/omap3-tobi.dts35
-rw-r--r--arch/arm/boot/dts/omap3.dtsi94
-rw-r--r--arch/arm/boot/dts/omap36xx.dtsi25
-rw-r--r--arch/arm/boot/dts/omap4-panda.dts11
-rw-r--r--arch/arm/boot/dts/omap4-sdp.dts127
-rw-r--r--arch/arm/boot/dts/omap4.dtsi195
-rw-r--r--arch/arm/boot/dts/omap5-evm.dts64
-rw-r--r--arch/arm/boot/dts/omap5.dtsi127
-rw-r--r--arch/arm/boot/dts/tps65217.dtsi56
-rw-r--r--arch/arm/boot/dts/tps65910.dtsi86
-rw-r--r--arch/arm/boot/dts/twl4030.dtsi6
-rw-r--r--arch/arm/boot/dts/twl6030.dtsi26
-rw-r--r--arch/arm/configs/armadillo800eva_defconfig2
-rw-r--r--arch/arm/configs/omap2plus_defconfig1
-rw-r--r--arch/arm/include/asm/dma-mapping.h7
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c2
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c6
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c6
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c10
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c6
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c6
-rw-r--r--arch/arm/mach-at91/clock.c12
-rw-r--r--arch/arm/mach-gemini/irq.c1
-rw-r--r--arch/arm/mach-kirkwood/common.c7
-rw-r--r--arch/arm/mach-kirkwood/db88f6281-bp-setup.c1
-rw-r--r--arch/arm/mach-omap1/ams-delta-fiq-handler.S1
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c2
-rw-r--r--arch/arm/mach-omap1/board-fsample.c1
-rw-r--r--arch/arm/mach-omap1/board-generic.c6
-rw-r--r--arch/arm/mach-omap1/board-htcherald.c3
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c1
-rw-r--r--arch/arm/mach-omap1/board-osk.c2
-rw-r--r--arch/arm/mach-omap1/board-palmte.c2
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c2
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c2
-rw-r--r--arch/arm/mach-omap1/board-perseus2.c1
-rw-r--r--arch/arm/mach-omap1/board-sx1.c1
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c6
-rw-r--r--arch/arm/mach-omap1/clock_data.c8
-rw-r--r--arch/arm/mach-omap1/devices.c3
-rw-r--r--arch/arm/mach-omap1/dma.c3
-rw-r--r--arch/arm/mach-omap1/gpio15xx.c1
-rw-r--r--arch/arm/mach-omap1/gpio16xx.c1
-rw-r--r--arch/arm/mach-omap1/gpio7xx.c1
-rw-r--r--arch/arm/mach-omap1/include/mach/ams-delta-fiq.h2
-rw-r--r--arch/arm/mach-omap1/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-omap1/include/mach/hardware.h285
-rw-r--r--arch/arm/mach-omap1/include/mach/irqs.h267
-rw-r--r--arch/arm/mach-omap1/include/mach/omap1510.h (renamed from arch/arm/plat-omap/include/plat/omap1510.h)3
-rw-r--r--arch/arm/mach-omap1/include/mach/omap16xx.h (renamed from arch/arm/plat-omap/include/plat/omap16xx.h)3
-rw-r--r--arch/arm/mach-omap1/include/mach/omap7xx.h (renamed from arch/arm/plat-omap/include/plat/omap7xx.h)3
-rw-r--r--arch/arm/mach-omap1/leds-h2p2-debug.c1
-rw-r--r--arch/arm/mach-omap1/leds.c1
-rw-r--r--arch/arm/mach-omap1/serial.c1
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-omap2/Makefile.boot6
-rw-r--r--arch/arm/mach-omap2/am33xx.h (renamed from arch/arm/plat-omap/include/plat/am33xx.h)0
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c6
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c10
-rw-r--r--arch/arm/mach-omap2/board-3630sdp.c6
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c6
-rw-r--r--arch/arm/mach-omap2/board-am3517crane.c10
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c11
-rw-r--r--arch/arm/mach-omap2/board-apollon.c2
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c10
-rw-r--r--arch/arm/mach-omap2/board-cm-t3517.c9
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c7
-rw-r--r--arch/arm/mach-omap2/board-flash.c4
-rw-r--r--arch/arm/mach-omap2/board-generic.c2
-rw-r--r--arch/arm/mach-omap2/board-h4.c5
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c5
-rw-r--r--arch/arm/mach-omap2/board-ldp.c7
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c5
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c5
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c23
-rw-r--r--arch/arm/mach-omap2/board-omap3logic.c18
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c5
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c15
-rw-r--r--arch/arm/mach-omap2/board-omap3touchbook.c5
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c6
-rw-r--r--arch/arm/mach-omap2/board-overo.c6
-rw-r--r--arch/arm/mach-omap2/board-rm680.c6
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c6
-rw-r--r--arch/arm/mach-omap2/board-rx51.c2
-rw-r--r--arch/arm/mach-omap2/board-ti8168evm.c8
-rw-r--r--arch/arm/mach-omap2/board-zoom-debugboard.c3
-rw-r--r--arch/arm/mach-omap2/board-zoom-display.c2
-rw-r--r--arch/arm/mach-omap2/board-zoom-peripherals.c6
-rw-r--r--arch/arm/mach-omap2/board-zoom.c1
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c2
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c2
-rw-r--r--arch/arm/mach-omap2/clock.c8
-rw-r--r--arch/arm/mach-omap2/clock2420_data.c2
-rw-r--r--arch/arm/mach-omap2/clock2430.c2
-rw-r--r--arch/arm/mach-omap2/clock2430_data.c2
-rw-r--r--arch/arm/mach-omap2/clock2xxx.c2
-rw-r--r--arch/arm/mach-omap2/clock33xx_data.c2
-rw-r--r--arch/arm/mach-omap2/clock3xxx.c2
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/cm2xxx_3xxx.c3
-rw-r--r--arch/arm/mach-omap2/common-board-devices.c1
-rw-r--r--arch/arm/mach-omap2/common.c3
-rw-r--r--arch/arm/mach-omap2/common.h9
-rw-r--r--arch/arm/mach-omap2/control.c2
-rw-r--r--arch/arm/mach-omap2/control.h2
-rw-r--r--arch/arm/mach-omap2/cpuidle34xx.c1
-rw-r--r--arch/arm/mach-omap2/devices.c19
-rw-r--r--arch/arm/mach-omap2/dpll3xxx.c2
-rw-r--r--arch/arm/mach-omap2/dpll44xx.c2
-rw-r--r--arch/arm/mach-omap2/emu.c3
-rw-r--r--arch/arm/mach-omap2/gpio.c1
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c32
-rw-r--r--arch/arm/mach-omap2/gpmc-onenand.c27
-rw-r--r--arch/arm/mach-omap2/gpmc-smc91x.c3
-rw-r--r--arch/arm/mach-omap2/gpmc-smsc911x.c1
-rw-r--r--arch/arm/mach-omap2/gpmc.c167
-rw-r--r--arch/arm/mach-omap2/hsmmc.c2
-rw-r--r--arch/arm/mach-omap2/i2c.c1
-rw-r--r--arch/arm/mach-omap2/id.c2
-rw-r--r--arch/arm/mach-omap2/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-omap2/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-omap2/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-omap2/io.c1
-rw-r--r--arch/arm/mach-omap2/irq.c5
-rw-r--r--arch/arm/mach-omap2/mailbox.c4
-rw-r--r--arch/arm/mach-omap2/mcbsp.c2
-rw-r--r--arch/arm/mach-omap2/msdi.c1
-rw-r--r--arch/arm/mach-omap2/omap-iommu.c12
-rw-r--r--arch/arm/mach-omap2/omap-mpuss-lowpower.c3
-rw-r--r--arch/arm/mach-omap2/omap-smp.c2
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c1
-rw-r--r--arch/arm/mach-omap2/omap24xx.h (renamed from arch/arm/plat-omap/include/plat/omap24xx.h)2
-rw-r--r--arch/arm/mach-omap2/omap34xx.h (renamed from arch/arm/plat-omap/include/plat/omap34xx.h)2
-rw-r--r--arch/arm/mach-omap2/omap4-common.c14
-rw-r--r--arch/arm/mach-omap2/omap44xx.h (renamed from arch/arm/plat-omap/include/plat/omap44xx.h)2
-rw-r--r--arch/arm/mach-omap2/omap54xx.h (renamed from arch/arm/plat-omap/include/plat/omap54xx.h)0
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c35
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c25
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c73
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c108
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c8
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c152
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c3
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_common_data.h1
-rw-r--r--arch/arm/mach-omap2/omap_l3_noc.c5
-rw-r--r--arch/arm/mach-omap2/omap_phy_internal.c2
-rw-r--r--arch/arm/mach-omap2/opp2420_data.c2
-rw-r--r--arch/arm/mach-omap2/opp2430_data.c2
-rw-r--r--arch/arm/mach-omap2/opp3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/opp4xxx_data.c3
-rw-r--r--arch/arm/mach-omap2/pm-debug.c1
-rw-r--r--arch/arm/mach-omap2/pm24xx.c14
-rw-r--r--arch/arm/mach-omap2/pm34xx.c2
-rw-r--r--arch/arm/mach-omap2/powerdomain.c6
-rw-r--r--arch/arm/mach-omap2/powerdomains3xxx_data.c4
-rw-r--r--arch/arm/mach-omap2/prcm.c1
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.c7
-rw-r--r--arch/arm/mach-omap2/prm44xx.c5
-rw-r--r--arch/arm/mach-omap2/prm_common.c1
-rw-r--r--arch/arm/mach-omap2/sdrc2xxx.c2
-rw-r--r--arch/arm/mach-omap2/serial.c20
-rw-r--r--arch/arm/mach-omap2/sleep24xx.S3
-rw-r--r--arch/arm/mach-omap2/sleep34xx.S2
-rw-r--r--arch/arm/mach-omap2/sleep44xx.S2
-rw-r--r--arch/arm/mach-omap2/soc.h7
-rw-r--r--arch/arm/mach-omap2/sram242x.S3
-rw-r--r--arch/arm/mach-omap2/sram243x.S3
-rw-r--r--arch/arm/mach-omap2/sram34xx.S3
-rw-r--r--arch/arm/mach-omap2/ti81xx.h (renamed from arch/arm/plat-omap/include/plat/ti81xx.h)0
-rw-r--r--arch/arm/mach-omap2/timer.c15
-rw-r--r--arch/arm/mach-omap2/twl-common.c3
-rw-r--r--arch/arm/mach-omap2/twl-common.h6
-rw-r--r--arch/arm/mach-omap2/usb-host.c2
-rw-r--r--arch/arm/mach-omap2/usb-musb.c7
-rw-r--r--arch/arm/mach-omap2/vc.c3
-rw-r--r--arch/arm/mach-omap2/voltagedomains3xxx_data.c3
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva.c13
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c3
-rw-r--r--arch/arm/mach-shmobile/board-marzen.c2
-rw-r--r--arch/arm/mach-shmobile/intc-sh73a0.c4
-rw-r--r--arch/arm/mach-ux500/board-mop500.c21
-rw-r--r--arch/arm/mm/dma-mapping.c114
-rw-r--r--arch/arm/plat-omap/Kconfig1
-rw-r--r--arch/arm/plat-omap/Makefile3
-rw-r--r--arch/arm/plat-omap/common.c40
-rw-r--r--arch/arm/plat-omap/counter_32k.c3
-rw-r--r--arch/arm/plat-omap/debug-devices.c3
-rw-r--r--arch/arm/plat-omap/debug-leds.c1
-rw-r--r--arch/arm/plat-omap/devices.c92
-rw-r--r--arch/arm/plat-omap/dma.c3
-rw-r--r--arch/arm/plat-omap/fb.c2
-rw-r--r--arch/arm/plat-omap/i2c.c3
-rw-r--r--arch/arm/plat-omap/include/plat/board.h138
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h3
-rw-r--r--arch/arm/plat-omap/include/plat/debug-devices.h9
-rw-r--r--arch/arm/plat-omap/include/plat/dma.h2
-rw-r--r--arch/arm/plat-omap/include/plat/gpio-switch.h54
-rw-r--r--arch/arm/plat-omap/include/plat/gpio.h228
-rw-r--r--arch/arm/plat-omap/include/plat/gpmc.h19
-rw-r--r--arch/arm/plat-omap/include/plat/hardware.h293
-rw-r--r--arch/arm/plat-omap/include/plat/irqs-44xx.h144
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h453
-rw-r--r--arch/arm/plat-omap/include/plat/mmc.h1
-rw-r--r--arch/arm/plat-omap/include/plat/nand.h3
-rw-r--r--arch/arm/plat-omap/include/plat/omap-serial.h50
-rw-r--r--arch/arm/plat-omap/include/plat/omap4-keypad.h2
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h1
-rw-r--r--arch/arm/plat-omap/include/plat/usb.h1
-rw-r--r--arch/arm/plat-omap/omap_device.c79
-rw-r--r--arch/arm/plat-omap/sram.c1
223 files changed, 2810 insertions, 2224 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 93d2fab25b30..de325f4615bd 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -6,7 +6,7 @@ config ARM
select HAVE_DMA_API_DEBUG
select HAVE_IDE if PCI || ISA || PCMCIA
select HAVE_DMA_ATTRS
- select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)
+ select HAVE_DMA_CONTIGUOUS if MMU
select HAVE_MEMBLOCK
select RTC_LIB
select SYS_SUPPORTS_APM_EMULATION
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index a9af4db7234c..c634f87e230e 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -17,4 +17,64 @@
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
+
+ ocp {
+ uart1: serial@44e09000 {
+ status = "okay";
+ };
+
+ i2c1: i2c@44e0b000 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ tps: tps@24 {
+ reg = <0x24>;
+ };
+
+ };
+ };
+};
+
+/include/ "tps65217.dtsi"
+
+&tps {
+ regulators {
+ dcdc1_reg: regulator@0 {
+ regulator-always-on;
+ };
+
+ dcdc2_reg: regulator@1 {
+ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+ regulator-name = "vdd_mpu";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <1325000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ dcdc3_reg: regulator@2 {
+ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1_reg: regulator@3 {
+ regulator-always-on;
+ };
+
+ ldo2_reg: regulator@4 {
+ regulator-always-on;
+ };
+
+ ldo3_reg: regulator@5 {
+ regulator-always-on;
+ };
+
+ ldo4_reg: regulator@6 {
+ regulator-always-on;
+ };
+ };
};
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index d6a97d9eff72..185d6325a458 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -17,4 +17,104 @@
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
+
+ ocp {
+ uart1: serial@44e09000 {
+ status = "okay";
+ };
+
+ i2c1: i2c@44e0b000 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ tps: tps@2d {
+ reg = <0x2d>;
+ };
+ };
+ };
+
+ vbat: fixedregulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vbat";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ };
+};
+
+/include/ "tps65910.dtsi"
+
+&tps {
+ vcc1-supply = <&vbat>;
+ vcc2-supply = <&vbat>;
+ vcc3-supply = <&vbat>;
+ vcc4-supply = <&vbat>;
+ vcc5-supply = <&vbat>;
+ vcc6-supply = <&vbat>;
+ vcc7-supply = <&vbat>;
+ vccio-supply = <&vbat>;
+
+ regulators {
+ vrtc_reg: regulator@0 {
+ regulator-always-on;
+ };
+
+ vio_reg: regulator@1 {
+ regulator-always-on;
+ };
+
+ vdd1_reg: regulator@2 {
+ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+ regulator-name = "vdd_mpu";
+ regulator-min-microvolt = <912500>;
+ regulator-max-microvolt = <1312500>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vdd2_reg: regulator@3 {
+ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <912500>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vdd3_reg: regulator@4 {
+ regulator-always-on;
+ };
+
+ vdig1_reg: regulator@5 {
+ regulator-always-on;
+ };
+
+ vdig2_reg: regulator@6 {
+ regulator-always-on;
+ };
+
+ vpll_reg: regulator@7 {
+ regulator-always-on;
+ };
+
+ vdac_reg: regulator@8 {
+ regulator-always-on;
+ };
+
+ vaux1_reg: regulator@9 {
+ regulator-always-on;
+ };
+
+ vaux2_reg: regulator@10 {
+ regulator-always-on;
+ };
+
+ vaux33_reg: regulator@11 {
+ regulator-always-on;
+ };
+
+ vmmc_reg: regulator@12 {
+ regulator-always-on;
+ };
+ };
};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index bd0cff3f808c..bb31bff01998 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -69,95 +69,146 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
+ reg = <0x44e07000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <96>;
};
- gpio2: gpio@4804C000 {
+ gpio2: gpio@4804c000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio2";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
+ reg = <0x4804c000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <98>;
};
- gpio3: gpio@481AC000 {
+ gpio3: gpio@481ac000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio3";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
+ reg = <0x481ac000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <32>;
};
- gpio4: gpio@481AE000 {
+ gpio4: gpio@481ae000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio4";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
+ reg = <0x481ae000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <62>;
};
- uart1: serial@44E09000 {
+ uart1: serial@44e09000 {
compatible = "ti,omap3-uart";
ti,hwmods = "uart1";
clock-frequency = <48000000>;
+ reg = <0x44e09000 0x2000>;
+ interrupt-parent = <&intc>;
+ interrupts = <72>;
+ status = "disabled";
};
uart2: serial@48022000 {
compatible = "ti,omap3-uart";
ti,hwmods = "uart2";
clock-frequency = <48000000>;
+ reg = <0x48022000 0x2000>;
+ interrupt-parent = <&intc>;
+ interrupts = <73>;
+ status = "disabled";
};
uart3: serial@48024000 {
compatible = "ti,omap3-uart";
ti,hwmods = "uart3";
clock-frequency = <48000000>;
+ reg = <0x48024000 0x2000>;
+ interrupt-parent = <&intc>;
+ interrupts = <74>;
+ status = "disabled";
};
- uart4: serial@481A6000 {
+ uart4: serial@481a6000 {
compatible = "ti,omap3-uart";
ti,hwmods = "uart4";
clock-frequency = <48000000>;
+ reg = <0x481a6000 0x2000>;
+ interrupt-parent = <&intc>;
+ interrupts = <44>;
+ status = "disabled";
};
- uart5: serial@481A8000 {
+ uart5: serial@481a8000 {
compatible = "ti,omap3-uart";
ti,hwmods = "uart5";
clock-frequency = <48000000>;
+ reg = <0x481a8000 0x2000>;
+ interrupt-parent = <&intc>;
+ interrupts = <45>;
+ status = "disabled";
};
- uart6: serial@481AA000 {
+ uart6: serial@481aa000 {
compatible = "ti,omap3-uart";
ti,hwmods = "uart6";
clock-frequency = <48000000>;
+ reg = <0x481aa000 0x2000>;
+ interrupt-parent = <&intc>;
+ interrupts = <46>;
+ status = "disabled";
};
- i2c1: i2c@44E0B000 {
+ i2c1: i2c@44e0b000 {
compatible = "ti,omap4-i2c";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c1";
+ reg = <0x44e0b000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <70>;
+ status = "disabled";
};
- i2c2: i2c@4802A000 {
+ i2c2: i2c@4802a000 {
compatible = "ti,omap4-i2c";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c2";
+ reg = <0x4802a000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <71>;
+ status = "disabled";
};
- i2c3: i2c@4819C000 {
+ i2c3: i2c@4819c000 {
compatible = "ti,omap4-i2c";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c3";
+ reg = <0x4819c000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <30>;
+ status = "disabled";
};
wdt2: wdt@44e35000 {
compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
+ reg = <0x44e35000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <91>;
};
};
};
diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts
index 7829a4d0cb22..96514c134e54 100644
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -15,7 +15,7 @@
compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
chosen {
- bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
+ bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
};
ahb {
diff --git a/arch/arm/boot/dts/elpida_ecb240abacn.dtsi b/arch/arm/boot/dts/elpida_ecb240abacn.dtsi
new file mode 100644
index 000000000000..f97f70f83374
--- /dev/null
+++ b/arch/arm/boot/dts/elpida_ecb240abacn.dtsi
@@ -0,0 +1,67 @@
+/*
+ * Common devices used in different OMAP boards
+ */
+
+/ {
+ elpida_ECB240ABACN: lpddr2 {
+ compatible = "Elpida,ECB240ABACN","jedec,lpddr2-s4";
+ density = <2048>;
+ io-width = <32>;
+
+ tRPab-min-tck = <3>;
+ tRCD-min-tck = <3>;
+ tWR-min-tck = <3>;
+ tRASmin-min-tck = <3>;
+ tRRD-min-tck = <2>;
+ tWTR-min-tck = <2>;
+ tXP-min-tck = <2>;
+ tRTP-min-tck = <2>;
+ tCKE-min-tck = <3>;
+ tCKESR-min-tck = <3>;
+ tFAW-min-tck = <8>;
+
+ timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 {
+ compatible = "jedec,lpddr2-timings";
+ min-freq = <10000000>;
+ max-freq = <400000000>;
+ tRPab = <21000>;
+ tRCD = <18000>;
+ tWR = <15000>;
+ tRAS-min = <42000>;
+ tRRD = <10000>;
+ tWTR = <7500>;
+ tXP = <7500>;
+ tRTP = <7500>;
+ tCKESR = <15000>;
+ tDQSCK-max = <5500>;
+ tFAW = <50000>;
+ tZQCS = <90000>;
+ tZQCL = <360000>;
+ tZQinit = <1000000>;
+ tRAS-max-ns = <70000>;
+ tDQSCK-max-derated = <6000>;
+ };
+
+ timings_elpida_ECB240ABACN_200mhz: lpddr2-timings@1 {
+ compatible = "jedec,lpddr2-timings";
+ min-freq = <10000000>;
+ max-freq = <200000000>;
+ tRPab = <21000>;
+ tRCD = <18000>;
+ tWR = <15000>;
+ tRAS-min = <42000>;
+ tRRD = <10000>;
+ tWTR = <10000>;
+ tXP = <7500>;
+ tRTP = <7500>;
+ tCKESR = <15000>;
+ tDQSCK-max = <5500>;
+ tFAW = <50000>;
+ tZQCS = <90000>;
+ tZQCL = <360000>;
+ tZQinit = <1000000>;
+ tRAS-max-ns = <70000>;
+ tDQSCK-max-derated = <6000>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/omap2420-h4.dts b/arch/arm/boot/dts/omap2420-h4.dts
index 25b50b759dec..77b84e17c477 100644
--- a/arch/arm/boot/dts/omap2420-h4.dts
+++ b/arch/arm/boot/dts/omap2420-h4.dts
@@ -7,7 +7,7 @@
*/
/dts-v1/;
-/include/ "omap2.dtsi"
+/include/ "omap2420.dtsi"
/ {
model = "TI OMAP2420 H4 board";
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
new file mode 100644
index 000000000000..bfd76b4a0ddc
--- /dev/null
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -0,0 +1,48 @@
+/*
+ * Device Tree Source for OMAP2420 SoC
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "omap2.dtsi"
+
+/ {
+ compatible = "ti,omap2420", "ti,omap2";
+
+ ocp {
+ omap2420_pmx: pinmux@48000030 {
+ compatible = "ti,omap2420-padconf", "pinctrl-single";
+ reg = <0x48000030 0x0113>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-single,register-width = <8>;
+ pinctrl-single,function-mask = <0x3f>;
+ };
+
+ mcbsp1: mcbsp@48074000 {
+ compatible = "ti,omap2420-mcbsp";
+ reg = <0x48074000 0xff>;
+ reg-names = "mpu";
+ interrupts = <59>, /* TX interrupt */
+ <60>; /* RX interrupt */
+ interrupt-names = "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,hwmods = "mcbsp1";
+ };
+
+ mcbsp2: mcbsp@48076000 {
+ compatible = "ti,omap2420-mcbsp";
+ reg = <0x48076000 0xff>;
+ reg-names = "mpu";
+ interrupts = <62>, /* TX interrupt */
+ <63>; /* RX interrupt */
+ interrupt-names = "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,hwmods = "mcbsp2";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
new file mode 100644
index 000000000000..4565d9750f4d
--- /dev/null
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -0,0 +1,92 @@
+/*
+ * Device Tree Source for OMAP243x SoC
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "omap2.dtsi"
+
+/ {
+ compatible = "ti,omap2430", "ti,omap2";
+
+ ocp {
+ omap2430_pmx: pinmux@49002030 {
+ compatible = "ti,omap2430-padconf", "pinctrl-single";
+ reg = <0x49002030 0x0154>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-single,register-width = <8>;
+ pinctrl-single,function-mask = <0x3f>;
+ };
+
+ mcbsp1: mcbsp@48074000 {
+ compatible = "ti,omap2430-mcbsp";
+ reg = <0x48074000 0xff>;
+ reg-names = "mpu";
+ interrupts = <64>, /* OCP compliant interrupt */
+ <59>, /* TX interrupt */
+ <60>, /* RX interrupt */
+ <61>; /* RX overflow interrupt */
+ interrupt-names = "common", "tx", "rx", "rx_overflow";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp1";
+ };
+
+ mcbsp2: mcbsp@48076000 {
+ compatible = "ti,omap2430-mcbsp";
+ reg = <0x48076000 0xff>;
+ reg-names = "mpu";
+ interrupts = <16>, /* OCP compliant interrupt */
+ <62>, /* TX interrupt */
+ <63>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp2";
+ };
+
+ mcbsp3: mcbsp@4808c000 {
+ compatible = "ti,omap2430-mcbsp";
+ reg = <0x4808c000 0xff>;
+ reg-names = "mpu";
+ interrupts = <17>, /* OCP compliant interrupt */
+ <89>, /* TX interrupt */
+ <90>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp3";
+ };
+
+ mcbsp4: mcbsp@4808e000 {
+ compatible = "ti,omap2430-mcbsp";
+ reg = <0x4808e000 0xff>;
+ reg-names = "mpu";
+ interrupts = <18>, /* OCP compliant interrupt */
+ <54>, /* TX interrupt */
+ <55>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp4";
+ };
+
+ mcbsp5: mcbsp@48096000 {
+ compatible = "ti,omap2430-mcbsp";
+ reg = <0x48096000 0xff>;
+ reg-names = "mpu";
+ interrupts = <19>, /* OCP compliant interrupt */
+ <81>, /* TX interrupt */
+ <82>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp5";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index cdcb98c7e075..c38cf76df81f 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -7,16 +7,44 @@
*/
/dts-v1/;
-/include/ "omap3.dtsi"
+/include/ "omap36xx.dtsi"
/ {
- model = "TI OMAP3 BeagleBoard";
- compatible = "ti,omap3-beagle", "ti,omap3";
+ model = "TI OMAP3 BeagleBoard xM";
+ compatible = "ti,omap3-beagle-xm, ti,omap3-beagle", "ti,omap3";
memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
+
+ leds {
+ compatible = "gpio-leds";
+ pmu_stat {
+ label = "beagleboard::pmu_stat";
+ gpios = <&twl_gpio 19 0>; /* LEDB */
+ };
+
+ heartbeat {
+ label = "beagleboard::usr0";
+ gpios = <&gpio5 22 0>; /* 150 -> D6 LED */
+ linux,default-trigger = "heartbeat";
+ };
+
+ mmc {
+ label = "beagleboard::usr1";
+ gpios = <&gpio5 21 0>; /* 149 -> D7 LED */
+ linux,default-trigger = "mmc0";
+ };
+ };
+
+ sound {
+ compatible = "ti,omap-twl4030";
+ ti,model = "omap3beagle";
+
+ ti,mcbsp = <&mcbsp2>;
+ ti,codec = <&twl_audio>;
+ };
};
&i2c1 {
@@ -27,11 +55,17 @@
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
interrupt-parent = <&intc>;
- vsim: regulator@10 {
+ vsim: regulator-vsim {
compatible = "ti,twl4030-vsim";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3000000>;
};
+
+ twl_audio: audio {
+ compatible = "ti,twl4030-audio";
+ codec {
+ };
+ };
};
};
@@ -67,3 +101,15 @@
&mmc3 {
status = "disabled";
};
+
+&twl_gpio {
+ ti,use-leds;
+ /* pullups: BIT(1) */
+ ti,pullups = <0x000002>;
+ /*
+ * pulldowns:
+ * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
+ * BIT(15), BIT(16), BIT(17)
+ */
+ ti,pulldowns = <0x03a1c4>;
+};
diff --git a/arch/arm/boot/dts/omap3-evm.dts b/arch/arm/boot/dts/omap3-evm.dts
index f349ee9182ce..e8ba1c247a39 100644
--- a/arch/arm/boot/dts/omap3-evm.dts
+++ b/arch/arm/boot/dts/omap3-evm.dts
@@ -17,6 +17,15 @@
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
+
+ leds {
+ compatible = "gpio-leds";
+ ledb {
+ label = "omap3evm::ledb";
+ gpios = <&twl_gpio 19 0>; /* LEDB */
+ linux,default-trigger = "default-on";
+ };
+ };
};
&i2c1 {
@@ -46,3 +55,7 @@
reg = <0x5c>;
};
};
+
+&twl_gpio {
+ ti,use-leds;
+};
diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
new file mode 100644
index 000000000000..89808ce01673
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-overo.dtsi
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2012 Florian Vaussard, EPFL Mobots group
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * The Gumstix Overo must be combined with an expansion board.
+ */
+/dts-v1/;
+
+/include/ "omap3.dtsi"
+
+/ {
+ leds {
+ compatible = "gpio-leds";
+ overo {
+ label = "overo:blue:COM";
+ gpios = <&twl_gpio 19 0>;
+ linux,default-trigger = "mmc0";
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <2600000>;
+
+ twl: twl@48 {
+ reg = <0x48>;
+ interrupts = <7>; /* SYS_NIRQ cascaded to intc */
+ interrupt-parent = <&intc>;
+ };
+};
+
+/include/ "twl4030.dtsi"
+
+/* i2c2 pins are used for gpio */
+&i2c2 {
+ status = "disabled";
+};
+
+/* on board microSD slot */
+&mmc1 {
+ vmmc-supply = <&vmmc1>;
+ bus-width = <4>;
+};
+
+/* optional on board WiFi */
+&mmc2 {
+ bus-width = <4>;
+};
+
+&twl_gpio {
+ ti,use-leds;
+};
diff --git a/arch/arm/boot/dts/omap3-tobi.dts b/arch/arm/boot/dts/omap3-tobi.dts
new file mode 100644
index 000000000000..a13d12de77ff
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-tobi.dts
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2012 Florian Vaussard, EPFL Mobots group
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * Tobi expansion board is manufactured by Gumstix Inc.
+ */
+
+/include/ "omap3-overo.dtsi"
+
+/ {
+ model = "TI OMAP3 Gumstix Overo on Tobi";
+ compatible = "ti,omap3-tobi", "ti,omap3-overo", "ti,omap3";
+
+ leds {
+ compatible = "gpio-leds";
+ heartbeat {
+ label = "overo:red:gpio21";
+ gpios = <&gpio1 21 0>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+};
+
+&mmc3 {
+ status = "disabled";
+};
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 810947198208..f38ea8771b44 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -17,7 +17,6 @@
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
- serial3 = &uart4;
};
cpus {
@@ -69,6 +68,24 @@
reg = <0x48200000 0x1000>;
};
+ omap3_pmx_core: pinmux@48002030 {
+ compatible = "ti,omap3-padconf", "pinctrl-single";
+ reg = <0x48002030 0x05cc>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-single,register-width = <16>;
+ pinctrl-single,function-mask = <0x7fff>;
+ };
+
+ omap3_pmx_wkup: pinmux@0x48002a58 {
+ compatible = "ti,omap3-padconf", "pinctrl-single";
+ reg = <0x48002a58 0x5c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-single,register-width = <16>;
+ pinctrl-single,function-mask = <0x7fff>;
+ };
+
gpio1: gpio@48310000 {
compatible = "ti,omap3-gpio";
ti,hwmods = "gpio1";
@@ -141,12 +158,6 @@
clock-frequency = <48000000>;
};
- uart4: serial@49042000 {
- compatible = "ti,omap3-uart";
- ti,hwmods = "uart4";
- clock-frequency = <48000000>;
- };
-
i2c1: i2c@48070000 {
compatible = "ti,omap3-i2c";
#address-cells = <1>;
@@ -220,5 +231,74 @@
compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
};
+
+ mcbsp1: mcbsp@48074000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x48074000 0xff>;
+ reg-names = "mpu";
+ interrupts = <16>, /* OCP compliant interrupt */
+ <59>, /* TX interrupt */
+ <60>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp1";
+ };
+
+ mcbsp2: mcbsp@49022000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x49022000 0xff>,
+ <0x49028000 0xff>;
+ reg-names = "mpu", "sidetone";
+ interrupts = <17>, /* OCP compliant interrupt */
+ <62>, /* TX interrupt */
+ <63>, /* RX interrupt */
+ <4>; /* Sidetone */
+ interrupt-names = "common", "tx", "rx", "sidetone";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <1280>;
+ ti,hwmods = "mcbsp2";
+ };
+
+ mcbsp3: mcbsp@49024000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x49024000 0xff>,
+ <0x4902a000 0xff>;
+ reg-names = "mpu", "sidetone";
+ interrupts = <22>, /* OCP compliant interrupt */
+ <89>, /* TX interrupt */
+ <90>, /* RX interrupt */
+ <5>; /* Sidetone */
+ interrupt-names = "common", "tx", "rx", "sidetone";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp3";
+ };
+
+ mcbsp4: mcbsp@49026000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x49026000 0xff>;
+ reg-names = "mpu";
+ interrupts = <23>, /* OCP compliant interrupt */
+ <54>, /* TX interrupt */
+ <55>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp4";
+ };
+
+ mcbsp5: mcbsp@48096000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x48096000 0xff>;
+ reg-names = "mpu";
+ interrupts = <27>, /* OCP compliant interrupt */
+ <81>, /* TX interrupt */
+ <82>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp5";
+ };
};
};
diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi
new file mode 100644
index 000000000000..96bf0287cb9f
--- /dev/null
+++ b/arch/arm/boot/dts/omap36xx.dtsi
@@ -0,0 +1,25 @@
+/*
+ * Device Tree Source for OMAP3 SoC
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "omap3.dtsi"
+
+/ {
+ aliases {
+ serial3 = &uart4;
+ };
+
+ ocp {
+ uart4: serial@49042000 {
+ compatible = "ti,omap3-uart";
+ ti,hwmods = "uart4";
+ clock-frequency = <48000000>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts
index 9880c12877b3..20b966ee1bb3 100644
--- a/arch/arm/boot/dts/omap4-panda.dts
+++ b/arch/arm/boot/dts/omap4-panda.dts
@@ -8,6 +8,7 @@
/dts-v1/;
/include/ "omap4.dtsi"
+/include/ "elpida_ecb240abacn.dtsi"
/ {
model = "TI OMAP4 PandaBoard";
@@ -126,3 +127,13 @@
ti,non-removable;
bus-width = <4>;
};
+
+&emif1 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+};
+
+&emif2 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+};
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 72216e932fc0..94a23b39033d 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -8,6 +8,7 @@
/dts-v1/;
/include/ "omap4.dtsi"
+/include/ "elpida_ecb240abacn.dtsi"
/ {
model = "TI OMAP4 SDP board";
@@ -18,7 +19,7 @@
reg = <0x80000000 0x40000000>; /* 1 GB */
};
- vdd_eth: fixedregulator@0 {
+ vdd_eth: fixedregulator-vdd-eth {
compatible = "regulator-fixed";
regulator-name = "VDD_ETH";
regulator-min-microvolt = <3300000>;
@@ -28,7 +29,7 @@
regulator-boot-on;
};
- vbat: fixedregulator@2 {
+ vbat: fixedregulator-vbat {
compatible = "regulator-fixed";
regulator-name = "VBAT";
regulator-min-microvolt = <3750000>;
@@ -115,6 +116,33 @@
};
};
+&omap4_pmx_core {
+ uart2_pins: pinmux_uart2_pins {
+ pinctrl-single,pins = <
+ 0xd8 0x118 /* uart2_cts.uart2_cts INPUT_PULLUP | MODE0 */
+ 0xda 0 /* uart2_rts.uart2_rts OUTPUT | MODE0 */
+ 0xdc 0x118 /* uart2_rx.uart2_rx INPUT_PULLUP | MODE0 */
+ 0xde 0 /* uart2_tx.uart2_tx OUTPUT | MODE0 */
+ >;
+ };
+
+ uart3_pins: pinmux_uart3_pins {
+ pinctrl-single,pins = <
+ 0x100 0x118 /* uart3_cts_rctx.uart3_cts_rctx INPUT_PULLUP | MODE0 */
+ 0x102 0 /* uart3_rts_sd.uart3_rts_sd OUTPUT | MODE0 */
+ 0x104 0x100 /* uart3_rx_irrx.uart3_rx_irrx INPUT | MODE0 */
+ 0x106 0 /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */
+ >;
+ };
+
+ uart4_pins: pinmux_uart4_pins {
+ pinctrl-single,pins = <
+ 0x11c 0x100 /* uart4_rx.uart4_rx INPUT | MODE0 */
+ 0x11e 0 /* uart4_tx.uart4_tx OUTPUT | MODE0 */
+ >;
+ };
+};
+
&i2c1 {
clock-frequency = <400000>;
@@ -226,3 +254,98 @@
bus-width = <4>;
ti,non-removable;
};
+
+&emif1 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+};
+
+&emif2 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+};
+
+&keypad {
+ keypad,num-rows = <8>;
+ keypad,num-columns = <8>;
+ linux,keymap = <0x00000012 /* KEY_E */
+ 0x00010013 /* KEY_R */
+ 0x00020014 /* KEY_T */
+ 0x00030066 /* KEY_HOME */
+ 0x0004003f /* KEY_F5 */
+ 0x000500f0 /* KEY_UNKNOWN */
+ 0x00060017 /* KEY_I */
+ 0x0007002a /* KEY_LEFTSHIFT */
+ 0x01000020 /* KEY_D*/
+ 0x01010021 /* KEY_F */
+ 0x01020022 /* KEY_G */
+ 0x010300e7 /* KEY_SEND */
+ 0x01040040 /* KEY_F6 */
+ 0x010500f0 /* KEY_UNKNOWN */
+ 0x01060025 /* KEY_K */
+ 0x0107001c /* KEY_ENTER */
+ 0x0200002d /* KEY_X */
+ 0x0201002e /* KEY_C */
+ 0x0202002f /* KEY_V */
+ 0x0203006b /* KEY_END */
+ 0x02040041 /* KEY_F7 */
+ 0x020500f0 /* KEY_UNKNOWN */
+ 0x02060034 /* KEY_DOT */
+ 0x0207003a /* KEY_CAPSLOCK */
+ 0x0300002c /* KEY_Z */
+ 0x0301004e /* KEY_KPLUS */
+ 0x03020030 /* KEY_B */
+ 0x0303003b /* KEY_F1 */
+ 0x03040042 /* KEY_F8 */
+ 0x030500f0 /* KEY_UNKNOWN */
+ 0x03060018 /* KEY_O */
+ 0x03070039 /* KEY_SPACE */
+ 0x04000011 /* KEY_W */
+ 0x04010015 /* KEY_Y */
+ 0x04020016 /* KEY_U */
+ 0x0403003c /* KEY_F2 */
+ 0x04040073 /* KEY_VOLUMEUP */
+ 0x040500f0 /* KEY_UNKNOWN */
+ 0x04060026 /* KEY_L */
+ 0x04070069 /* KEY_LEFT */
+ 0x0500001f /* KEY_S */
+ 0x05010023 /* KEY_H */
+ 0x05020024 /* KEY_J */
+ 0x0503003d /* KEY_F3 */
+ 0x05040043 /* KEY_F9 */
+ 0x05050072 /* KEY_VOLUMEDOWN */
+ 0x05060032 /* KEY_M */
+ 0x0507006a /* KEY_RIGHT */
+ 0x06000010 /* KEY_Q */
+ 0x0601001e /* KEY_A */
+ 0x06020031 /* KEY_N */
+ 0x0603009e /* KEY_BACK */
+ 0x0604000e /* KEY_BACKSPACE */
+ 0x060500f0 /* KEY_UNKNOWN */
+ 0x06060019 /* KEY_P */
+ 0x06070067 /* KEY_UP */
+ 0x07000094 /* KEY_PROG1 */
+ 0x07010095 /* KEY_PROG2 */
+ 0x070200ca /* KEY_PROG3 */
+ 0x070300cb /* KEY_PROG4 */
+ 0x0704003e /* KEY_F4 */
+ 0x070500f0 /* KEY_UNKNOWN */
+ 0x07060160 /* KEY_OK */
+ 0x0707006c>; /* KEY_DOWN */
+ linux,input-no-autorepeat;
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins>;
+};
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 04cbbcb6ff91..5d1c48459e6e 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -30,12 +30,35 @@
cpus {
cpu@0 {
compatible = "arm,cortex-a9";
+ next-level-cache = <&L2>;
};
cpu@1 {
compatible = "arm,cortex-a9";
+ next-level-cache = <&L2>;
};
};
+ gic: interrupt-controller@48241000 {
+ compatible = "arm,cortex-a9-gic";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = <0x48241000 0x1000>,
+ <0x48240100 0x0100>;
+ };
+
+ L2: l2-cache-controller@48242000 {
+ compatible = "arm,pl310-cache";
+ reg = <0x48242000 0x1000>;
+ cache-unified;
+ cache-level = <2>;
+ };
+
+ local-timer@0x48240600 {
+ compatible = "arm,cortex-a9-twd-timer";
+ reg = <0x48240600 0x20>;
+ interrupts = <1 13 0x304>;
+ };
+
/*
* The soc node represents the soc top level view. It is uses for IPs
* that are not memory mapped in the MPU view or for the MPU itself.
@@ -61,30 +84,6 @@
/*
* XXX: Use a flat representation of the OMAP4 interconnect.
* The real OMAP interconnect network is quite complex.
- *
- * MPU -+-- MPU_PRIVATE - GIC, L2
- * |
- * +----------------+----------+
- * | | |
- * + +- EMIF - DDR |
- * | | |
- * | + +--------+
- * | | |
- * | +- L4_ABE - AESS, MCBSP, TIMERs...
- * | |
- * +- L3_MAIN --+- L4_CORE - IPs...
- * |
- * +- L4_PER - IPs...
- * |
- * +- L4_CFG -+- L4_WKUP - IPs...
- * | |
- * | +- IPs...
- * +- IPU ----+
- * | |
- * +- DSP ----+
- * | |
- * +- DSS ----+
- *
* Since that will not bring real advantage to represent that in DT for
* the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy.
@@ -96,16 +95,27 @@
ranges;
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
- gic: interrupt-controller@48241000 {
- compatible = "arm,cortex-a9-gic";
- interrupt-controller;
- #interrupt-cells = <3>;
- reg = <0x48241000 0x1000>,
- <0x48240100 0x0100>;
+ omap4_pmx_core: pinmux@4a100040 {
+ compatible = "ti,omap4-padconf", "pinctrl-single";
+ reg = <0x4a100040 0x0196>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-single,register-width = <16>;
+ pinctrl-single,function-mask = <0x7fff>;
+ };
+ omap4_pmx_wkup: pinmux@4a31e040 {
+ compatible = "ti,omap4-padconf", "pinctrl-single";
+ reg = <0x4a31e040 0x0038>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-single,register-width = <16>;
+ pinctrl-single,function-mask = <0x7fff>;
};
gpio1: gpio@4a310000 {
compatible = "ti,omap4-gpio";
+ reg = <0x4a310000 0x200>;
+ interrupts = <0 29 0x4>;
ti,hwmods = "gpio1";
gpio-controller;
#gpio-cells = <2>;
@@ -115,6 +125,8 @@
gpio2: gpio@48055000 {
compatible = "ti,omap4-gpio";
+ reg = <0x48055000 0x200>;
+ interrupts = <0 30 0x4>;
ti,hwmods = "gpio2";
gpio-controller;
#gpio-cells = <2>;
@@ -124,6 +136,8 @@
gpio3: gpio@48057000 {
compatible = "ti,omap4-gpio";
+ reg = <0x48057000 0x200>;
+ interrupts = <0 31 0x4>;
ti,hwmods = "gpio3";
gpio-controller;
#gpio-cells = <2>;
@@ -133,6 +147,8 @@
gpio4: gpio@48059000 {
compatible = "ti,omap4-gpio";
+ reg = <0x48059000 0x200>;
+ interrupts = <0 32 0x4>;
ti,hwmods = "gpio4";
gpio-controller;
#gpio-cells = <2>;
@@ -142,6 +158,8 @@
gpio5: gpio@4805b000 {
compatible = "ti,omap4-gpio";
+ reg = <0x4805b000 0x200>;
+ interrupts = <0 33 0x4>;
ti,hwmods = "gpio5";
gpio-controller;
#gpio-cells = <2>;
@@ -151,6 +169,8 @@
gpio6: gpio@4805d000 {
compatible = "ti,omap4-gpio";
+ reg = <0x4805d000 0x200>;
+ interrupts = <0 34 0x4>;
ti,hwmods = "gpio6";
gpio-controller;
#gpio-cells = <2>;
@@ -160,30 +180,40 @@
uart1: serial@4806a000 {
compatible = "ti,omap4-uart";
+ reg = <0x4806a000 0x100>;
+ interrupts = <0 72 0x4>;
ti,hwmods = "uart1";
clock-frequency = <48000000>;
};
uart2: serial@4806c000 {
compatible = "ti,omap4-uart";
+ reg = <0x4806c000 0x100>;
+ interrupts = <0 73 0x4>;
ti,hwmods = "uart2";
clock-frequency = <48000000>;
};
uart3: serial@48020000 {
compatible = "ti,omap4-uart";
+ reg = <0x48020000 0x100>;
+ interrupts = <0 74 0x4>;
ti,hwmods = "uart3";
clock-frequency = <48000000>;
};
uart4: serial@4806e000 {
compatible = "ti,omap4-uart";
+ reg = <0x4806e000 0x100>;
+ interrupts = <0 70 0x4>;
ti,hwmods = "uart4";
clock-frequency = <48000000>;
};
i2c1: i2c@48070000 {
compatible = "ti,omap4-i2c";
+ reg = <0x48070000 0x100>;
+ interrupts = <0 56 0x4>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c1";
@@ -191,6 +221,8 @@
i2c2: i2c@48072000 {
compatible = "ti,omap4-i2c";
+ reg = <0x48072000 0x100>;
+ interrupts = <0 57 0x4>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c2";
@@ -198,6 +230,8 @@
i2c3: i2c@48060000 {
compatible = "ti,omap4-i2c";
+ reg = <0x48060000 0x100>;
+ interrupts = <0 61 0x4>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c3";
@@ -205,6 +239,8 @@
i2c4: i2c@48350000 {
compatible = "ti,omap4-i2c";
+ reg = <0x48350000 0x100>;
+ interrupts = <0 62 0x4>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c4";
@@ -212,6 +248,8 @@
mcspi1: spi@48098000 {
compatible = "ti,omap4-mcspi";
+ reg = <0x48098000 0x200>;
+ interrupts = <0 65 0x4>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi1";
@@ -220,6 +258,8 @@
mcspi2: spi@4809a000 {
compatible = "ti,omap4-mcspi";
+ reg = <0x4809a000 0x200>;
+ interrupts = <0 66 0x4>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi2";
@@ -228,6 +268,8 @@
mcspi3: spi@480b8000 {
compatible = "ti,omap4-mcspi";
+ reg = <0x480b8000 0x200>;
+ interrupts = <0 91 0x4>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi3";
@@ -236,6 +278,8 @@
mcspi4: spi@480ba000 {
compatible = "ti,omap4-mcspi";
+ reg = <0x480ba000 0x200>;
+ interrupts = <0 48 0x4>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi4";
@@ -244,6 +288,8 @@
mmc1: mmc@4809c000 {
compatible = "ti,omap4-hsmmc";
+ reg = <0x4809c000 0x400>;
+ interrupts = <0 83 0x4>;
ti,hwmods = "mmc1";
ti,dual-volt;
ti,needs-special-reset;
@@ -251,30 +297,40 @@
mmc2: mmc@480b4000 {
compatible = "ti,omap4-hsmmc";
+ reg = <0x480b4000 0x400>;
+ interrupts = <0 86 0x4>;
ti,hwmods = "mmc2";
ti,needs-special-reset;
};
mmc3: mmc@480ad000 {
compatible = "ti,omap4-hsmmc";
+ reg = <0x480ad000 0x400>;
+ interrupts = <0 94 0x4>;
ti,hwmods = "mmc3";
ti,needs-special-reset;
};
mmc4: mmc@480d1000 {
compatible = "ti,omap4-hsmmc";
+ reg = <0x480d1000 0x400>;
+ interrupts = <0 96 0x4>;
ti,hwmods = "mmc4";
ti,needs-special-reset;
};
mmc5: mmc@480d5000 {
compatible = "ti,omap4-hsmmc";
+ reg = <0x480d5000 0x400>;
+ interrupts = <0 59 0x4>;
ti,hwmods = "mmc5";
ti,needs-special-reset;
};
wdt2: wdt@4a314000 {
compatible = "ti,omap4-wdt", "ti,omap3-wdt";
+ reg = <0x4a314000 0x80>;
+ interrupts = <0 80 0x4>;
ti,hwmods = "wd_timer2";
};
@@ -282,6 +338,7 @@
compatible = "ti,omap4-mcpdm";
reg = <0x40132000 0x7f>, /* MPU private access */
<0x49032000 0x7f>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
interrupts = <0 112 0x4>;
interrupt-parent = <&gic>;
ti,hwmods = "mcpdm";
@@ -291,9 +348,87 @@
compatible = "ti,omap4-dmic";
reg = <0x4012e000 0x7f>, /* MPU private access */
<0x4902e000 0x7f>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
interrupts = <0 114 0x4>;
interrupt-parent = <&gic>;
ti,hwmods = "dmic";
};
+
+ mcbsp1: mcbsp@40122000 {
+ compatible = "ti,omap4-mcbsp";
+ reg = <0x40122000 0xff>, /* MPU private access */
+ <0x49022000 0xff>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 17 0x4>;
+ interrupt-names = "common";
+ interrupt-parent = <&gic>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp1";
+ };
+
+ mcbsp2: mcbsp@40124000 {
+ compatible = "ti,omap4-mcbsp";
+ reg = <0x40124000 0xff>, /* MPU private access */
+ <0x49024000 0xff>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 22 0x4>;
+ interrupt-names = "common";
+ interrupt-parent = <&gic>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp2";
+ };
+
+ mcbsp3: mcbsp@40126000 {
+ compatible = "ti,omap4-mcbsp";
+ reg = <0x40126000 0xff>, /* MPU private access */
+ <0x49026000 0xff>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 23 0x4>;
+ interrupt-names = "common";
+ interrupt-parent = <&gic>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp3";
+ };
+
+ mcbsp4: mcbsp@48096000 {
+ compatible = "ti,omap4-mcbsp";
+ reg = <0x48096000 0xff>; /* L4 Interconnect */
+ reg-names = "mpu";
+ interrupts = <0 16 0x4>;
+ interrupt-names = "common";
+ interrupt-parent = <&gic>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp4";
+ };
+
+ keypad: keypad@4a31c000 {
+ compatible = "ti,omap4-keypad";
+ reg = <0x4a31c000 0x80>;
+ interrupts = <0 120 0x4>;
+ reg-names = "mpu";
+ ti,hwmods = "kbd";
+ };
+
+ emif1: emif@4c000000 {
+ compatible = "ti,emif-4d";
+ reg = <0x4c000000 0x100>;
+ interrupts = <0 110 0x4>;
+ ti,hwmods = "emif1";
+ phy-type = <1>;
+ hw-caps-read-idle-ctrl;
+ hw-caps-ll-interface;
+ hw-caps-temp-alert;
+ };
+
+ emif2: emif@4d000000 {
+ compatible = "ti,emif-4d";
+ reg = <0x4d000000 0x100>;
+ interrupts = <0 111 0x4>;
+ ti,hwmods = "emif2";
+ phy-type = <1>;
+ hw-caps-read-idle-ctrl;
+ hw-caps-ll-interface;
+ hw-caps-temp-alert;
+ };
};
};
diff --git a/arch/arm/boot/dts/omap5-evm.dts b/arch/arm/boot/dts/omap5-evm.dts
index 200c39ad1c82..9c41a3f311aa 100644
--- a/arch/arm/boot/dts/omap5-evm.dts
+++ b/arch/arm/boot/dts/omap5-evm.dts
@@ -17,4 +17,68 @@
device_type = "memory";
reg = <0x80000000 0x40000000>; /* 1 GB */
};
+
+ vmmcsd_fixed: fixedregulator-mmcsd {
+ compatible = "regulator-fixed";
+ regulator-name = "vmmcsd_fixed";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+ bus-width = <4>;
+};
+
+&mmc2 {
+ vmmc-supply = <&vmmcsd_fixed>;
+ bus-width = <8>;
+ ti,non-removable;
+};
+
+&mmc3 {
+ bus-width = <4>;
+ ti,non-removable;
+};
+
+&mmc4 {
+ status = "disabled";
+};
+
+&mmc5 {
+ status = "disabled";
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+
+ /* Pressure Sensor */
+ bmp085@77 {
+ compatible = "bosch,bmp085";
+ reg = <0x77>;
+ };
+};
+
+&i2c4 {
+ clock-frequency = <400000>;
+
+ /* Temperature Sensor */
+ tmp102@48{
+ compatible = "ti,tmp102";
+ reg = <0x48>;
+ };
+};
+
+&keypad {
+ keypad,num-rows = <8>;
+ keypad,num-columns = <8>;
+ linux,keymap = <0x02020073 /* VOLUP */
+ 0x02030072 /* VOLDOWM */
+ 0x020400e7 /* SEND */
+ 0x02050066 /* HOME */
+ 0x0206006b /* END */
+ 0x020700d9>; /* SEARCH */
+ linux,input-no-autorepeat;
};
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 57e527083746..9ac75b37c992 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -145,6 +145,41 @@
#interrupt-cells = <1>;
};
+ i2c1: i2c@48070000 {
+ compatible = "ti,omap4-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c1";
+ };
+
+ i2c2: i2c@48072000 {
+ compatible = "ti,omap4-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c2";
+ };
+
+ i2c3: i2c@48060000 {
+ compatible = "ti,omap4-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c3";
+ };
+
+ i2c4: i2c@4807A000 {
+ compatible = "ti,omap4-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c4";
+ };
+
+ i2c5: i2c@4807C000 {
+ compatible = "ti,omap4-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c5";
+ };
+
uart1: serial@4806a000 {
compatible = "ti,omap4-uart";
ti,hwmods = "uart1";
@@ -180,5 +215,97 @@
ti,hwmods = "uart6";
clock-frequency = <48000000>;
};
+
+ mmc1: mmc@4809c000 {
+ compatible = "ti,omap4-hsmmc";
+ ti,hwmods = "mmc1";
+ ti,dual-volt;
+ ti,needs-special-reset;
+ };
+
+ mmc2: mmc@480b4000 {
+ compatible = "ti,omap4-hsmmc";
+ ti,hwmods = "mmc2";
+ ti,needs-special-reset;
+ };
+
+ mmc3: mmc@480ad000 {
+ compatible = "ti,omap4-hsmmc";
+ ti,hwmods = "mmc3";
+ ti,needs-special-reset;
+ };
+
+ mmc4: mmc@480d1000 {
+ compatible = "ti,omap4-hsmmc";
+ ti,hwmods = "mmc4";
+ ti,needs-special-reset;
+ };
+
+ mmc5: mmc@480d5000 {
+ compatible = "ti,omap4-hsmmc";
+ ti,hwmods = "mmc5";
+ ti,needs-special-reset;
+ };
+
+ keypad: keypad@4ae1c000 {
+ compatible = "ti,omap4-keypad";
+ ti,hwmods = "kbd";
+ };
+
+ mcpdm: mcpdm@40132000 {
+ compatible = "ti,omap4-mcpdm";
+ reg = <0x40132000 0x7f>, /* MPU private access */
+ <0x49032000 0x7f>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 112 0x4>;
+ interrupt-parent = <&gic>;
+ ti,hwmods = "mcpdm";
+ };
+
+ dmic: dmic@4012e000 {
+ compatible = "ti,omap4-dmic";
+ reg = <0x4012e000 0x7f>, /* MPU private access */
+ <0x4902e000 0x7f>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 114 0x4>;
+ interrupt-parent = <&gic>;
+ ti,hwmods = "dmic";
+ };
+
+ mcbsp1: mcbsp@40122000 {
+ compatible = "ti,omap4-mcbsp";
+ reg = <0x40122000 0xff>, /* MPU private access */
+ <0x49022000 0xff>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 17 0x4>;
+ interrupt-names = "common";
+ interrupt-parent = <&gic>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp1";
+ };
+
+ mcbsp2: mcbsp@40124000 {
+ compatible = "ti,omap4-mcbsp";
+ reg = <0x40124000 0xff>, /* MPU private access */
+ <0x49024000 0xff>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 22 0x4>;
+ interrupt-names = "common";
+ interrupt-parent = <&gic>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp2";
+ };
+
+ mcbsp3: mcbsp@40126000 {
+ compatible = "ti,omap4-mcbsp";
+ reg = <0x40126000 0xff>, /* MPU private access */
+ <0x49026000 0xff>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 23 0x4>;
+ interrupt-names = "common";
+ interrupt-parent = <&gic>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp3";
+ };
};
};
diff --git a/arch/arm/boot/dts/tps65217.dtsi b/arch/arm/boot/dts/tps65217.dtsi
new file mode 100644
index 000000000000..a63272422d76
--- /dev/null
+++ b/arch/arm/boot/dts/tps65217.dtsi
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * Integrated Power Management Chip
+ * http://www.ti.com/lit/ds/symlink/tps65217.pdf
+ */
+
+&tps {
+ compatible = "ti,tps65217";
+
+ regulators {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dcdc1_reg: regulator@0 {
+ reg = <0>;
+ regulator-compatible = "dcdc1";
+ };
+
+ dcdc2_reg: regulator@1 {
+ reg = <1>;
+ regulator-compatible = "dcdc2";
+ };
+
+ dcdc3_reg: regulator@2 {
+ reg = <2>;
+ regulator-compatible = "dcdc3";
+ };
+
+ ldo1_reg: regulator@3 {
+ reg = <3>;
+ regulator-compatible = "ldo1";
+ };
+
+ ldo2_reg: regulator@4 {
+ reg = <4>;
+ regulator-compatible = "ldo2";
+ };
+
+ ldo3_reg: regulator@5 {
+ reg = <5>;
+ regulator-compatible = "ldo3";
+ };
+
+ ldo4_reg: regulator@6 {
+ reg = <6>;
+ regulator-compatible = "ldo4";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/tps65910.dtsi b/arch/arm/boot/dts/tps65910.dtsi
new file mode 100644
index 000000000000..92693a89160e
--- /dev/null
+++ b/arch/arm/boot/dts/tps65910.dtsi
@@ -0,0 +1,86 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * Integrated Power Management Chip
+ * http://www.ti.com/lit/ds/symlink/tps65910.pdf
+ */
+
+&tps {
+ compatible = "ti,tps65910";
+
+ regulators {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vrtc_reg: regulator@0 {
+ reg = <0>;
+ regulator-compatible = "vrtc";
+ };
+
+ vio_reg: regulator@1 {
+ reg = <1>;
+ regulator-compatible = "vio";
+ };
+
+ vdd1_reg: regulator@2 {
+ reg = <2>;
+ regulator-compatible = "vdd1";
+ };
+
+ vdd2_reg: regulator@3 {
+ reg = <3>;
+ regulator-compatible = "vdd2";
+ };
+
+ vdd3_reg: regulator@4 {
+ reg = <4>;
+ regulator-compatible = "vdd3";
+ };
+
+ vdig1_reg: regulator@5 {
+ reg = <5>;
+ regulator-compatible = "vdig1";
+ };
+
+ vdig2_reg: regulator@6 {
+ reg = <6>;
+ regulator-compatible = "vdig2";
+ };
+
+ vpll_reg: regulator@7 {
+ reg = <7>;
+ regulator-compatible = "vpll";
+ };
+
+ vdac_reg: regulator@8 {
+ reg = <8>;
+ regulator-compatible = "vdac";
+ };
+
+ vaux1_reg: regulator@9 {
+ reg = <9>;
+ regulator-compatible = "vaux1";
+ };
+
+ vaux2_reg: regulator@10 {
+ reg = <10>;
+ regulator-compatible = "vaux2";
+ };
+
+ vaux33_reg: regulator@11 {
+ reg = <11>;
+ regulator-compatible = "vaux33";
+ };
+
+ vmmc_reg: regulator@12 {
+ reg = <12>;
+ regulator-compatible = "vmmc";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi
index 22f4d1394ed3..ff000172c93c 100644
--- a/arch/arm/boot/dts/twl4030.dtsi
+++ b/arch/arm/boot/dts/twl4030.dtsi
@@ -19,19 +19,19 @@
interrupts = <11>;
};
- vdac: regulator@0 {
+ vdac: regulator-vdac {
compatible = "ti,twl4030-vdac";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
- vpll2: regulator@1 {
+ vpll2: regulator-vpll2 {
compatible = "ti,twl4030-vpll2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
- vmmc1: regulator@2 {
+ vmmc1: regulator-vmmc1 {
compatible = "ti,twl4030-vmmc1";
regulator-min-microvolt = <1850000>;
regulator-max-microvolt = <3150000>;
diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi
index d351b27d7213..123e2c40218a 100644
--- a/arch/arm/boot/dts/twl6030.dtsi
+++ b/arch/arm/boot/dts/twl6030.dtsi
@@ -20,70 +20,70 @@
interrupts = <11>;
};
- vaux1: regulator@0 {
+ vaux1: regulator-vaux1 {
compatible = "ti,twl6030-vaux1";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3000000>;
};
- vaux2: regulator@1 {
+ vaux2: regulator-vaux2 {
compatible = "ti,twl6030-vaux2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <2800000>;
};
- vaux3: regulator@2 {
+ vaux3: regulator-vaux3 {
compatible = "ti,twl6030-vaux3";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3000000>;
};
- vmmc: regulator@3 {
+ vmmc: regulator-vmmc {
compatible = "ti,twl6030-vmmc";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3000000>;
};
- vpp: regulator@4 {
+ vpp: regulator-vpp {
compatible = "ti,twl6030-vpp";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2500000>;
};
- vusim: regulator@5 {
+ vusim: regulator-vusim {
compatible = "ti,twl6030-vusim";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <2900000>;
};
- vdac: regulator@6 {
+ vdac: regulator-vdac {
compatible = "ti,twl6030-vdac";
};
- vana: regulator@7 {
+ vana: regulator-vana {
compatible = "ti,twl6030-vana";
};
- vcxio: regulator@8 {
+ vcxio: regulator-vcxio {
compatible = "ti,twl6030-vcxio";
regulator-always-on;
};
- vusb: regulator@9 {
+ vusb: regulator-vusb {
compatible = "ti,twl6030-vusb";
};
- v1v8: regulator@10 {
+ v1v8: regulator-v1v8 {
compatible = "ti,twl6030-v1v8";
regulator-always-on;
};
- v2v1: regulator@11 {
+ v2v1: regulator-v2v1 {
compatible = "ti,twl6030-v2v1";
regulator-always-on;
};
- clk32kg: regulator@12 {
+ clk32kg: regulator-clk32kg {
compatible = "ti,twl6030-clk32kg";
};
};
diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig
index 7d8718468e0d..90610c7030f7 100644
--- a/arch/arm/configs/armadillo800eva_defconfig
+++ b/arch/arm/configs/armadillo800eva_defconfig
@@ -33,7 +33,7 @@ CONFIG_AEABI=y
CONFIG_FORCE_MAX_ZONEORDER=13
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096"
+CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw"
CONFIG_CMDLINE_FORCE=y
CONFIG_KEXEC=y
CONFIG_VFP=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index e58edc36b406..62303043db9c 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -123,6 +123,7 @@ CONFIG_HW_RANDOM=y
CONFIG_I2C_CHARDEV=y
CONFIG_SPI=y
CONFIG_SPI_OMAP24XX=y
+CONFIG_PINCTRL_SINGLE=y
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_TWL4030=y
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 2ae842df4551..5c44dcb0987b 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -203,6 +203,13 @@ static inline void dma_free_writecombine(struct device *dev, size_t size,
}
/*
+ * This can be called during early boot to increase the size of the atomic
+ * coherent DMA pool above the default value of 256KiB. It must be called
+ * before postcore_initcall.
+ */
+extern void __init init_dma_coherent_pool_size(unsigned long size);
+
+/*
* This can be called during boot to increase the size of the consistent
* DMA region above it's default value of 2MB. It must be called before the
* memory allocator is initialised, i.e. before any core_initcall.
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 104ca40d8d18..aaa443b48c91 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -197,7 +197,7 @@ void __init at91rm9200_timer_init(void)
at91_st_read(AT91_ST_SR);
/* Make IRQs happen for the system timer */
- setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
+ setup_irq(NR_IRQS_LEGACY + AT91_ID_SYS, &at91rm9200_timer_irq);
/* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used
* directly for the clocksource and all clockevents, after adjusting
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 7b9c2ba396ed..bce572a530ef 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -726,6 +726,8 @@ static struct resource rtt_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
+ }, {
+ .flags = IORESOURCE_IRQ,
},
};
@@ -744,10 +746,12 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed:
* GPBR will serve as the storage for RTC time offset
*/
- at91sam9260_rtt_device.num_resources = 2;
+ at91sam9260_rtt_device.num_resources = 3;
rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
+ rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+ rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 8df5c1bdff92..bc2590d712d0 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -609,6 +609,8 @@ static struct resource rtt_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
+ }, {
+ .flags = IORESOURCE_IRQ,
}
};
@@ -626,10 +628,12 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed:
* GPBR will serve as the storage for RTC time offset
*/
- at91sam9261_rtt_device.num_resources = 2;
+ at91sam9261_rtt_device.num_resources = 3;
rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
+ rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+ rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index eb6bbf86fb9f..9b6ca734f1a9 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -990,6 +990,8 @@ static struct resource rtt0_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
+ }, {
+ .flags = IORESOURCE_IRQ,
}
};
@@ -1006,6 +1008,8 @@ static struct resource rtt1_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
+ }, {
+ .flags = IORESOURCE_IRQ,
}
};
@@ -1027,14 +1031,14 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed only for the chosen RTT:
* GPBR will serve as the storage for RTC time offset
*/
- at91sam9263_rtt0_device.num_resources = 2;
+ at91sam9263_rtt0_device.num_resources = 3;
at91sam9263_rtt1_device.num_resources = 1;
pdev = &at91sam9263_rtt0_device;
r = rtt0_resources;
break;
case 1:
at91sam9263_rtt0_device.num_resources = 1;
- at91sam9263_rtt1_device.num_resources = 2;
+ at91sam9263_rtt1_device.num_resources = 3;
pdev = &at91sam9263_rtt1_device;
r = rtt1_resources;
break;
@@ -1047,6 +1051,8 @@ static void __init at91_add_device_rtt_rtc(void)
pdev->name = "rtc-at91sam9";
r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
r[1].end = r[1].start + 3;
+ r[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+ r[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 06073996a382..1b47319ca00b 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -1293,6 +1293,8 @@ static struct resource rtt_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
+ }, {
+ .flags = IORESOURCE_IRQ,
}
};
@@ -1310,10 +1312,12 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed:
* GPBR will serve as the storage for RTC time offset
*/
- at91sam9g45_rtt_device.num_resources = 2;
+ at91sam9g45_rtt_device.num_resources = 3;
rtt_resources[1].start = AT91SAM9G45_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
+ rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+ rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index f09fff932172..b3d365dadef5 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -688,6 +688,8 @@ static struct resource rtt_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
+ }, {
+ .flags = IORESOURCE_IRQ,
}
};
@@ -705,10 +707,12 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed:
* GPBR will serve as the storage for RTC time offset
*/
- at91sam9rl_rtt_device.num_resources = 2;
+ at91sam9rl_rtt_device.num_resources = 3;
rtt_resources[1].start = AT91SAM9RL_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
+ rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+ rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index de2ec6b8fea7..188c82971ebd 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -63,6 +63,12 @@ EXPORT_SYMBOL_GPL(at91_pmc_base);
#define cpu_has_300M_plla() (cpu_is_at91sam9g10())
+#define cpu_has_240M_plla() (cpu_is_at91sam9261() \
+ || cpu_is_at91sam9263() \
+ || cpu_is_at91sam9rl())
+
+#define cpu_has_210M_plla() (cpu_is_at91sam9260())
+
#define cpu_has_pllb() (!(cpu_is_at91sam9rl() \
|| cpu_is_at91sam9g45() \
|| cpu_is_at91sam9x5() \
@@ -706,6 +712,12 @@ static int __init at91_pmc_init(unsigned long main_clock)
} else if (cpu_has_800M_plla()) {
if (plla.rate_hz > 800000000)
pll_overclock = true;
+ } else if (cpu_has_240M_plla()) {
+ if (plla.rate_hz > 240000000)
+ pll_overclock = true;
+ } else if (cpu_has_210M_plla()) {
+ if (plla.rate_hz > 210000000)
+ pll_overclock = true;
} else {
if (plla.rate_hz > 209000000)
pll_overclock = true;
diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c
index ca70e5fcc7ac..020852d3bdd8 100644
--- a/arch/arm/mach-gemini/irq.c
+++ b/arch/arm/mach-gemini/irq.c
@@ -17,6 +17,7 @@
#include <linux/sched.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
+#include <asm/system_misc.h>
#include <mach/hardware.h>
#define IRQ_SOURCE(base_addr) (base_addr + 0x00)
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 3226077735b1..1201191d7f1b 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -517,6 +517,13 @@ void __init kirkwood_wdt_init(void)
void __init kirkwood_init_early(void)
{
orion_time_set_base(TIMER_VIRT_BASE);
+
+ /*
+ * Some Kirkwood devices allocate their coherent buffers from atomic
+ * context. Increase size of atomic coherent pool to make sure such
+ * the allocations won't fail.
+ */
+ init_dma_coherent_pool_size(SZ_1M);
}
int kirkwood_tclk;
diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
index d93359379598..be90b7d0e10b 100644
--- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
+++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
@@ -10,6 +10,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/sizes.h>
#include <linux/platform_device.h>
#include <linux/mtd/partitions.h>
#include <linux/ata_platform.h>
diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
index a051cb8ae57f..d2b6acce8fc1 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S
+++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
@@ -18,6 +18,7 @@
#include <plat/board-ams-delta.h>
+#include <mach/irqs.h>
#include <mach/ams-delta-fiq.h>
#include "iomap.h"
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index c53469802c03..6f192c4900b1 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -26,6 +26,7 @@
#include <linux/export.h>
#include <linux/omapfb.h>
#include <linux/io.h>
+#include <linux/platform_data/gpio-omap.h>
#include <media/soc_camera.h>
@@ -37,7 +38,6 @@
#include <plat/board-ams-delta.h>
#include <plat/keypad.h>
#include <plat/mux.h>
-#include <plat/board.h>
#include <mach/hardware.h>
#include <mach/ams-delta-fiq.h>
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 6872f3fd400f..6d985521a39e 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -32,7 +32,6 @@
#include <plat/flash.h>
#include <plat/fpga.h>
#include <plat/keypad.h>
-#include <plat/board.h>
#include <mach/hardware.h>
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index 6ec385e2b98e..04b5fdaff831 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -23,7 +23,6 @@
#include <asm/mach/map.h>
#include <plat/mux.h>
-#include <plat/board.h>
#include <mach/usb.h>
@@ -52,9 +51,6 @@ static struct omap_usb_config generic1610_usb_config __initdata = {
};
#endif
-static struct omap_board_config_kernel generic_config[] __initdata = {
-};
-
static void __init omap_generic_init(void)
{
#ifdef CONFIG_ARCH_OMAP15XX
@@ -76,8 +72,6 @@ static void __init omap_generic_init(void)
}
#endif
- omap_board_config = generic_config;
- omap_board_config_size = ARRAY_SIZE(generic_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
}
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index b3f6e943e661..a5ac352d68d3 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -41,8 +41,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <plat/omap7xx.h>
-#include <plat/board.h>
+#include <mach/omap7xx.h>
#include <plat/keypad.h>
#include <plat/mmc.h>
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 2c0ca8fc3380..ec01f03d0446 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -26,7 +26,6 @@
#include <asm/mach/map.h>
#include <plat/mux.h>
-#include <plat/board.h>
#include <plat/keypad.h>
#include <plat/lcd_mipid.h>
#include <plat/mmc.h>
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 8784705edb60..3b2d9071022a 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -39,6 +39,8 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c/tps65010.h>
+#include <linux/platform_data/gpio-omap.h>
+#include <linux/platform_data/omap1_bl.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 26bcb9defcdc..49f8d745ea1f 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -28,6 +28,7 @@
#include <linux/interrupt.h>
#include <linux/apm-emulation.h>
#include <linux/omapfb.h>
+#include <linux/platform_data/omap1_bl.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -37,7 +38,6 @@
#include <plat/mux.h>
#include <plat/tc.h>
#include <plat/dma.h>
-#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 4d099446dfa8..01523cd78e58 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -27,6 +27,7 @@
#include <linux/omapfb.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
+#include <linux/platform_data/omap1_bl.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -37,7 +38,6 @@
#include <plat/mux.h>
#include <plat/dma.h>
#include <plat/tc.h>
-#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 355980321c2d..a7abce69043a 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -30,6 +30,7 @@
#include <linux/omapfb.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
+#include <linux/platform_data/omap1_bl.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -39,7 +40,6 @@
#include <plat/mux.h>
#include <plat/dma.h>
#include <plat/tc.h>
-#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 703d55ecffe2..277e0bc60a43 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -32,7 +32,6 @@
#include <plat/fpga.h>
#include <plat/flash.h>
#include <plat/keypad.h>
-#include <plat/board.h>
#include <mach/hardware.h>
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 8c665bd16ac2..2e1fff26a2f3 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -38,7 +38,6 @@
#include <plat/dma.h>
#include <plat/irda.h>
#include <plat/tc.h>
-#include <plat/board.h>
#include <plat/keypad.h>
#include <plat/board-sx1.h>
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 3497769eb353..1668af3017de 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -35,7 +35,6 @@
#include <plat/flash.h>
#include <plat/mux.h>
#include <plat/tc.h>
-#include <plat/board.h>
#include <mach/hardware.h>
#include <mach/usb.h>
@@ -155,9 +154,6 @@ static struct omap_usb_config voiceblue_usb_config __initdata = {
.pins[2] = 6,
};
-static struct omap_board_config_kernel voiceblue_config[] = {
-};
-
#define MACHINE_PANICED 1
#define MACHINE_REBOOTING 2
#define MACHINE_REBOOT 4
@@ -275,8 +271,6 @@ static void __init voiceblue_init(void)
voiceblue_smc91x_resources[1].start = gpio_to_irq(8);
voiceblue_smc91x_resources[1].end = gpio_to_irq(8);
platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
- omap_board_config = voiceblue_config;
- omap_board_config_size = ARRAY_SIZE(voiceblue_config);
omap_serial_init();
omap1_usb_init(&voiceblue_usb_config);
omap_register_i2c_bus(1, 100, NULL, 0);
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index c007d80dfb62..6a32b9b0dc30 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -25,7 +25,6 @@
#include <plat/clock.h>
#include <plat/cpu.h>
#include <plat/clkdev_omap.h>
-#include <plat/board.h>
#include <plat/sram.h> /* for omap_sram_reprogram_clock() */
#include <mach/hardware.h>
@@ -788,7 +787,6 @@ u32 cpu_mask;
int __init omap1_clk_init(void)
{
struct omap_clk *c;
- const struct omap_clock_config *info;
int crystal_type = 0; /* Default 12 MHz */
u32 reg;
@@ -837,12 +835,6 @@ int __init omap1_clk_init(void)
ck_dpll1_p = clk_get(NULL, "ck_dpll1");
ck_ref_p = clk_get(NULL, "ck_ref");
- info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
- if (info != NULL) {
- if (!cpu_is_omap15xx())
- crystal_type = info->system_clock_type;
- }
-
if (cpu_is_omap7xx())
ck_ref.rate = 13000000;
if (cpu_is_omap16xx() && crystal_type == 2)
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index fa1fa4deb6aa..05fdbd992c77 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -20,12 +20,11 @@
#include <asm/mach/map.h>
#include <plat/tc.h>
-#include <plat/board.h>
#include <plat/mux.h>
#include <plat/dma.h>
#include <plat/mmc.h>
-#include <plat/omap7xx.h>
+#include <mach/omap7xx.h>
#include <mach/camera.h>
#include <mach/hardware.h>
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
index 3ef7d52316b4..b0b0f0f27450 100644
--- a/arch/arm/mach-omap1/dma.c
+++ b/arch/arm/mach-omap1/dma.c
@@ -27,7 +27,8 @@
#include <plat/dma.h>
#include <plat/tc.h>
-#include <plat/irqs.h>
+
+#include <mach/irqs.h>
#define OMAP1_DMA_BASE (0xfffed800)
#define OMAP1_LOGICAL_DMA_CH_COUNT 17
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index ebef15e5e7b7..98e6f39224a4 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -17,6 +17,7 @@
*/
#include <linux/gpio.h>
+#include <linux/platform_data/gpio-omap.h>
#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
#define OMAP1510_GPIO_BASE 0xFFFCE000
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 2a48cd2e1754..33f419236b17 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -17,6 +17,7 @@
*/
#include <linux/gpio.h>
+#include <linux/platform_data/gpio-omap.h>
#define OMAP1610_GPIO1_BASE 0xfffbe400
#define OMAP1610_GPIO2_BASE 0xfffbec00
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index acf12b73eace..958ce9acee95 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -17,6 +17,7 @@
*/
#include <linux/gpio.h>
+#include <linux/platform_data/gpio-omap.h>
#define OMAP7XX_GPIO1_BASE 0xfffbc000
#define OMAP7XX_GPIO2_BASE 0xfffbc800
diff --git a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
index 23eed0035ed8..adb5e7649659 100644
--- a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
+++ b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
@@ -14,8 +14,6 @@
#ifndef __AMS_DELTA_FIQ_H
#define __AMS_DELTA_FIQ_H
-#include <plat/irqs.h>
-
/*
* Interrupt number used for passing control from FIQ to IRQ.
* IRQ12, described as reserved, has been selected.
diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-omap1/include/mach/gpio.h
index e737706a8fe1..ebf86c0f4f46 100644
--- a/arch/arm/mach-omap1/include/mach/gpio.h
+++ b/arch/arm/mach-omap1/include/mach/gpio.h
@@ -1,5 +1,3 @@
/*
* arch/arm/mach-omap1/include/mach/gpio.h
*/
-
-#include <plat/gpio.h>
diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h
index 01e35fa106b8..84248d250adb 100644
--- a/arch/arm/mach-omap1/include/mach/hardware.h
+++ b/arch/arm/mach-omap1/include/mach/hardware.h
@@ -1,11 +1,46 @@
/*
* arch/arm/mach-omap1/include/mach/hardware.h
+ *
+ * Hardware definitions for TI OMAP processors and boards
+ *
+ * NOTE: Please put device driver specific defines into a separate header
+ * file for each driver.
+ *
+ * Copyright (C) 2001 RidgeRun, Inc.
+ * Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
+ *
+ * Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
+ * and Dirk Behme <dirk.behme@de.bosch.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#ifndef __MACH_HARDWARE_H
-#define __MACH_HARDWARE_H
+#ifndef __ASM_ARCH_OMAP_HARDWARE_H
+#define __ASM_ARCH_OMAP_HARDWARE_H
+#include <asm/sizes.h>
#ifndef __ASSEMBLER__
+#include <asm/types.h>
+#include <plat/cpu.h>
+
/*
* NOTE: Please use ioremap + __raw_read/write where possible instead of these
*/
@@ -35,7 +70,249 @@ static inline u32 omap_cs3_phys(void)
? 0 : OMAP_CS3_PHYS;
}
+#endif /* ifndef __ASSEMBLER__ */
+
+#include <plat/serial.h>
+
+/*
+ * ---------------------------------------------------------------------------
+ * Common definitions for all OMAP processors
+ * NOTE: Put all processor or board specific parts to the special header
+ * files.
+ * ---------------------------------------------------------------------------
+ */
+
+/*
+ * ----------------------------------------------------------------------------
+ * Timers
+ * ----------------------------------------------------------------------------
+ */
+#define OMAP_MPU_TIMER1_BASE (0xfffec500)
+#define OMAP_MPU_TIMER2_BASE (0xfffec600)
+#define OMAP_MPU_TIMER3_BASE (0xfffec700)
+#define MPU_TIMER_FREE (1 << 6)
+#define MPU_TIMER_CLOCK_ENABLE (1 << 5)
+#define MPU_TIMER_AR (1 << 1)
+#define MPU_TIMER_ST (1 << 0)
+
+/*
+ * ----------------------------------------------------------------------------
+ * Clocks
+ * ----------------------------------------------------------------------------
+ */
+#define CLKGEN_REG_BASE (0xfffece00)
+#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0)
+#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4)
+#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8)
+#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC)
+#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10)
+#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14)
+#define ARM_SYSST (CLKGEN_REG_BASE + 0x18)
+#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
+
+#define CK_RATEF 1
+#define CK_IDLEF 2
+#define CK_ENABLEF 4
+#define CK_SELECTF 8
+#define SETARM_IDLE_SHIFT
+
+/* DPLL control registers */
+#define DPLL_CTL (0xfffecf00)
+
+/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */
+#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000)
+#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0)
+#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4)
+#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8)
+#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14)
+
+/*
+ * ---------------------------------------------------------------------------
+ * UPLD
+ * ---------------------------------------------------------------------------
+ */
+#define ULPD_REG_BASE (0xfffe0800)
+#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14)
+#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24)
+#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30)
+# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */
+# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */
+#define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34)
+# define SOFT_UDC_REQ (1 << 4)
+# define SOFT_USB_CLK_REQ (1 << 3)
+# define SOFT_DPLL_REQ (1 << 0)
+#define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c)
+#define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40)
+#define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c)
+#define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50)
+#define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68)
+# define DIS_MMC2_DPLL_REQ (1 << 11)
+# define DIS_MMC1_DPLL_REQ (1 << 10)
+# define DIS_UART3_DPLL_REQ (1 << 9)
+# define DIS_UART2_DPLL_REQ (1 << 8)
+# define DIS_UART1_DPLL_REQ (1 << 7)
+# define DIS_USB_HOST_DPLL_REQ (1 << 6)
+#define ULPD_SDW_CLK_DIV_CTRL_SEL (ULPD_REG_BASE + 0x74)
+#define ULPD_CAM_CLK_CTRL (ULPD_REG_BASE + 0x7c)
+
+/*
+ * ---------------------------------------------------------------------------
+ * Watchdog timer
+ * ---------------------------------------------------------------------------
+ */
+
+/* Watchdog timer within the OMAP3.2 gigacell */
+#define OMAP_MPU_WATCHDOG_BASE (0xfffec800)
+#define OMAP_WDT_TIMER (OMAP_MPU_WATCHDOG_BASE + 0x0)
+#define OMAP_WDT_LOAD_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4)
+#define OMAP_WDT_READ_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4)
+#define OMAP_WDT_TIMER_MODE (OMAP_MPU_WATCHDOG_BASE + 0x8)
+
+/*
+ * ---------------------------------------------------------------------------
+ * Interrupts
+ * ---------------------------------------------------------------------------
+ */
+#ifdef CONFIG_ARCH_OMAP1
+
+/*
+ * XXX: These probably want to be moved to arch/arm/mach-omap/omap1/irq.c
+ * or something similar.. -- PFM.
+ */
+
+#define OMAP_IH1_BASE 0xfffecb00
+#define OMAP_IH2_BASE 0xfffe0000
+
+#define OMAP_IH1_ITR (OMAP_IH1_BASE + 0x00)
+#define OMAP_IH1_MIR (OMAP_IH1_BASE + 0x04)
+#define OMAP_IH1_SIR_IRQ (OMAP_IH1_BASE + 0x10)
+#define OMAP_IH1_SIR_FIQ (OMAP_IH1_BASE + 0x14)
+#define OMAP_IH1_CONTROL (OMAP_IH1_BASE + 0x18)
+#define OMAP_IH1_ILR0 (OMAP_IH1_BASE + 0x1c)
+#define OMAP_IH1_ISR (OMAP_IH1_BASE + 0x9c)
+
+#define OMAP_IH2_ITR (OMAP_IH2_BASE + 0x00)
+#define OMAP_IH2_MIR (OMAP_IH2_BASE + 0x04)
+#define OMAP_IH2_SIR_IRQ (OMAP_IH2_BASE + 0x10)
+#define OMAP_IH2_SIR_FIQ (OMAP_IH2_BASE + 0x14)
+#define OMAP_IH2_CONTROL (OMAP_IH2_BASE + 0x18)
+#define OMAP_IH2_ILR0 (OMAP_IH2_BASE + 0x1c)
+#define OMAP_IH2_ISR (OMAP_IH2_BASE + 0x9c)
+
+#define IRQ_ITR_REG_OFFSET 0x00
+#define IRQ_MIR_REG_OFFSET 0x04
+#define IRQ_SIR_IRQ_REG_OFFSET 0x10
+#define IRQ_SIR_FIQ_REG_OFFSET 0x14
+#define IRQ_CONTROL_REG_OFFSET 0x18
+#define IRQ_ISR_REG_OFFSET 0x9c
+#define IRQ_ILR0_REG_OFFSET 0x1c
+#define IRQ_GMR_REG_OFFSET 0xa0
+
#endif
-#endif
-#include <plat/hardware.h>
+/*
+ * ----------------------------------------------------------------------------
+ * System control registers
+ * ----------------------------------------------------------------------------
+ */
+#define MOD_CONF_CTRL_0 0xfffe1080
+#define MOD_CONF_CTRL_1 0xfffe1110
+
+/*
+ * ----------------------------------------------------------------------------
+ * Pin multiplexing registers
+ * ----------------------------------------------------------------------------
+ */
+#define FUNC_MUX_CTRL_0 0xfffe1000
+#define FUNC_MUX_CTRL_1 0xfffe1004
+#define FUNC_MUX_CTRL_2 0xfffe1008
+#define COMP_MODE_CTRL_0 0xfffe100c
+#define FUNC_MUX_CTRL_3 0xfffe1010
+#define FUNC_MUX_CTRL_4 0xfffe1014
+#define FUNC_MUX_CTRL_5 0xfffe1018
+#define FUNC_MUX_CTRL_6 0xfffe101C
+#define FUNC_MUX_CTRL_7 0xfffe1020
+#define FUNC_MUX_CTRL_8 0xfffe1024
+#define FUNC_MUX_CTRL_9 0xfffe1028
+#define FUNC_MUX_CTRL_A 0xfffe102C
+#define FUNC_MUX_CTRL_B 0xfffe1030
+#define FUNC_MUX_CTRL_C 0xfffe1034
+#define FUNC_MUX_CTRL_D 0xfffe1038
+#define PULL_DWN_CTRL_0 0xfffe1040
+#define PULL_DWN_CTRL_1 0xfffe1044
+#define PULL_DWN_CTRL_2 0xfffe1048
+#define PULL_DWN_CTRL_3 0xfffe104c
+#define PULL_DWN_CTRL_4 0xfffe10ac
+
+/* OMAP-1610 specific multiplexing registers */
+#define FUNC_MUX_CTRL_E 0xfffe1090
+#define FUNC_MUX_CTRL_F 0xfffe1094
+#define FUNC_MUX_CTRL_10 0xfffe1098
+#define FUNC_MUX_CTRL_11 0xfffe109c
+#define FUNC_MUX_CTRL_12 0xfffe10a0
+#define PU_PD_SEL_0 0xfffe10b4
+#define PU_PD_SEL_1 0xfffe10b8
+#define PU_PD_SEL_2 0xfffe10bc
+#define PU_PD_SEL_3 0xfffe10c0
+#define PU_PD_SEL_4 0xfffe10c4
+
+/* Timer32K for 1610 and 1710*/
+#define OMAP_TIMER32K_BASE 0xFFFBC400
+
+/*
+ * ---------------------------------------------------------------------------
+ * TIPB bus interface
+ * ---------------------------------------------------------------------------
+ */
+#define TIPB_PUBLIC_CNTL_BASE 0xfffed300
+#define MPU_PUBLIC_TIPB_CNTL (TIPB_PUBLIC_CNTL_BASE + 0x8)
+#define TIPB_PRIVATE_CNTL_BASE 0xfffeca00
+#define MPU_PRIVATE_TIPB_CNTL (TIPB_PRIVATE_CNTL_BASE + 0x8)
+
+/*
+ * ----------------------------------------------------------------------------
+ * MPUI interface
+ * ----------------------------------------------------------------------------
+ */
+#define MPUI_BASE (0xfffec900)
+#define MPUI_CTRL (MPUI_BASE + 0x0)
+#define MPUI_DEBUG_ADDR (MPUI_BASE + 0x4)
+#define MPUI_DEBUG_DATA (MPUI_BASE + 0x8)
+#define MPUI_DEBUG_FLAG (MPUI_BASE + 0xc)
+#define MPUI_STATUS_REG (MPUI_BASE + 0x10)
+#define MPUI_DSP_STATUS (MPUI_BASE + 0x14)
+#define MPUI_DSP_BOOT_CONFIG (MPUI_BASE + 0x18)
+#define MPUI_DSP_API_CONFIG (MPUI_BASE + 0x1c)
+
+/*
+ * ----------------------------------------------------------------------------
+ * LED Pulse Generator
+ * ----------------------------------------------------------------------------
+ */
+#define OMAP_LPG1_BASE 0xfffbd000
+#define OMAP_LPG2_BASE 0xfffbd800
+#define OMAP_LPG1_LCR (OMAP_LPG1_BASE + 0x00)
+#define OMAP_LPG1_PMR (OMAP_LPG1_BASE + 0x04)
+#define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00)
+#define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04)
+
+/*
+ * ----------------------------------------------------------------------------
+ * Pulse-Width Light
+ * ----------------------------------------------------------------------------
+ */
+#define OMAP_PWL_BASE 0xfffb5800
+#define OMAP_PWL_ENABLE (OMAP_PWL_BASE + 0x00)
+#define OMAP_PWL_CLK_ENABLE (OMAP_PWL_BASE + 0x04)
+
+/*
+ * ---------------------------------------------------------------------------
+ * Processor specific defines
+ * ---------------------------------------------------------------------------
+ */
+
+#include "omap7xx.h"
+#include "omap1510.h"
+#include "omap16xx.h"
+
+#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/mach-omap1/include/mach/irqs.h b/arch/arm/mach-omap1/include/mach/irqs.h
index 9292fdc1cb0b..729992d7d26a 100644
--- a/arch/arm/mach-omap1/include/mach/irqs.h
+++ b/arch/arm/mach-omap1/include/mach/irqs.h
@@ -1,5 +1,268 @@
/*
- * arch/arm/mach-omap1/include/mach/irqs.h
+ * arch/arm/plat-omap/include/mach/irqs.h
+ *
+ * Copyright (C) Greg Lonnon 2001
+ * Updated for OMAP-1610 by Tony Lindgren <tony@atomide.com>
+ *
+ * Copyright (C) 2009 Texas Instruments
+ * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * NOTE: The interrupt vectors for the OMAP-1509, OMAP-1510, and OMAP-1610
+ * are different.
*/
-#include <plat/irqs.h>
+#ifndef __ASM_ARCH_OMAP15XX_IRQS_H
+#define __ASM_ARCH_OMAP15XX_IRQS_H
+
+/*
+ * IRQ numbers for interrupt handler 1
+ *
+ * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
+ *
+ */
+#define INT_CAMERA 1
+#define INT_FIQ 3
+#define INT_RTDX 6
+#define INT_DSP_MMU_ABORT 7
+#define INT_HOST 8
+#define INT_ABORT 9
+#define INT_BRIDGE_PRIV 13
+#define INT_GPIO_BANK1 14
+#define INT_UART3 15
+#define INT_TIMER3 16
+#define INT_DMA_CH0_6 19
+#define INT_DMA_CH1_7 20
+#define INT_DMA_CH2_8 21
+#define INT_DMA_CH3 22
+#define INT_DMA_CH4 23
+#define INT_DMA_CH5 24
+#define INT_TIMER1 26
+#define INT_WD_TIMER 27
+#define INT_BRIDGE_PUB 28
+#define INT_TIMER2 30
+#define INT_LCD_CTRL 31
+
+/*
+ * OMAP-1510 specific IRQ numbers for interrupt handler 1
+ */
+#define INT_1510_IH2_IRQ 0
+#define INT_1510_RES2 2
+#define INT_1510_SPI_TX 4
+#define INT_1510_SPI_RX 5
+#define INT_1510_DSP_MAILBOX1 10
+#define INT_1510_DSP_MAILBOX2 11
+#define INT_1510_RES12 12
+#define INT_1510_LB_MMU 17
+#define INT_1510_RES18 18
+#define INT_1510_LOCAL_BUS 29
+
+/*
+ * OMAP-1610 specific IRQ numbers for interrupt handler 1
+ */
+#define INT_1610_IH2_IRQ INT_1510_IH2_IRQ
+#define INT_1610_IH2_FIQ 2
+#define INT_1610_McBSP2_TX 4
+#define INT_1610_McBSP2_RX 5
+#define INT_1610_DSP_MAILBOX1 10
+#define INT_1610_DSP_MAILBOX2 11
+#define INT_1610_LCD_LINE 12
+#define INT_1610_GPTIMER1 17
+#define INT_1610_GPTIMER2 18
+#define INT_1610_SSR_FIFO_0 29
+
+/*
+ * OMAP-7xx specific IRQ numbers for interrupt handler 1
+ */
+#define INT_7XX_IH2_FIQ 0
+#define INT_7XX_IH2_IRQ 1
+#define INT_7XX_USB_NON_ISO 2
+#define INT_7XX_USB_ISO 3
+#define INT_7XX_ICR 4
+#define INT_7XX_EAC 5
+#define INT_7XX_GPIO_BANK1 6
+#define INT_7XX_GPIO_BANK2 7
+#define INT_7XX_GPIO_BANK3 8
+#define INT_7XX_McBSP2TX 10
+#define INT_7XX_McBSP2RX 11
+#define INT_7XX_McBSP2RX_OVF 12
+#define INT_7XX_LCD_LINE 14
+#define INT_7XX_GSM_PROTECT 15
+#define INT_7XX_TIMER3 16
+#define INT_7XX_GPIO_BANK5 17
+#define INT_7XX_GPIO_BANK6 18
+#define INT_7XX_SPGIO_WR 29
+
+/*
+ * IRQ numbers for interrupt handler 2
+ *
+ * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
+ */
+#define IH2_BASE 32
+
+#define INT_KEYBOARD (1 + IH2_BASE)
+#define INT_uWireTX (2 + IH2_BASE)
+#define INT_uWireRX (3 + IH2_BASE)
+#define INT_I2C (4 + IH2_BASE)
+#define INT_MPUIO (5 + IH2_BASE)
+#define INT_USB_HHC_1 (6 + IH2_BASE)
+#define INT_McBSP3TX (10 + IH2_BASE)
+#define INT_McBSP3RX (11 + IH2_BASE)
+#define INT_McBSP1TX (12 + IH2_BASE)
+#define INT_McBSP1RX (13 + IH2_BASE)
+#define INT_UART1 (14 + IH2_BASE)
+#define INT_UART2 (15 + IH2_BASE)
+#define INT_BT_MCSI1TX (16 + IH2_BASE)
+#define INT_BT_MCSI1RX (17 + IH2_BASE)
+#define INT_SOSSI_MATCH (19 + IH2_BASE)
+#define INT_USB_W2FC (20 + IH2_BASE)
+#define INT_1WIRE (21 + IH2_BASE)
+#define INT_OS_TIMER (22 + IH2_BASE)
+#define INT_MMC (23 + IH2_BASE)
+#define INT_GAUGE_32K (24 + IH2_BASE)
+#define INT_RTC_TIMER (25 + IH2_BASE)
+#define INT_RTC_ALARM (26 + IH2_BASE)
+#define INT_MEM_STICK (27 + IH2_BASE)
+
+/*
+ * OMAP-1510 specific IRQ numbers for interrupt handler 2
+ */
+#define INT_1510_DSP_MMU (28 + IH2_BASE)
+#define INT_1510_COM_SPI_RO (31 + IH2_BASE)
+
+/*
+ * OMAP-1610 specific IRQ numbers for interrupt handler 2
+ */
+#define INT_1610_FAC (0 + IH2_BASE)
+#define INT_1610_USB_HHC_2 (7 + IH2_BASE)
+#define INT_1610_USB_OTG (8 + IH2_BASE)
+#define INT_1610_SoSSI (9 + IH2_BASE)
+#define INT_1610_SoSSI_MATCH (19 + IH2_BASE)
+#define INT_1610_DSP_MMU (28 + IH2_BASE)
+#define INT_1610_McBSP2RX_OF (31 + IH2_BASE)
+#define INT_1610_STI (32 + IH2_BASE)
+#define INT_1610_STI_WAKEUP (33 + IH2_BASE)
+#define INT_1610_GPTIMER3 (34 + IH2_BASE)
+#define INT_1610_GPTIMER4 (35 + IH2_BASE)
+#define INT_1610_GPTIMER5 (36 + IH2_BASE)
+#define INT_1610_GPTIMER6 (37 + IH2_BASE)
+#define INT_1610_GPTIMER7 (38 + IH2_BASE)
+#define INT_1610_GPTIMER8 (39 + IH2_BASE)
+#define INT_1610_GPIO_BANK2 (40 + IH2_BASE)
+#define INT_1610_GPIO_BANK3 (41 + IH2_BASE)
+#define INT_1610_MMC2 (42 + IH2_BASE)
+#define INT_1610_CF (43 + IH2_BASE)
+#define INT_1610_WAKE_UP_REQ (46 + IH2_BASE)
+#define INT_1610_GPIO_BANK4 (48 + IH2_BASE)
+#define INT_1610_SPI (49 + IH2_BASE)
+#define INT_1610_DMA_CH6 (53 + IH2_BASE)
+#define INT_1610_DMA_CH7 (54 + IH2_BASE)
+#define INT_1610_DMA_CH8 (55 + IH2_BASE)
+#define INT_1610_DMA_CH9 (56 + IH2_BASE)
+#define INT_1610_DMA_CH10 (57 + IH2_BASE)
+#define INT_1610_DMA_CH11 (58 + IH2_BASE)
+#define INT_1610_DMA_CH12 (59 + IH2_BASE)
+#define INT_1610_DMA_CH13 (60 + IH2_BASE)
+#define INT_1610_DMA_CH14 (61 + IH2_BASE)
+#define INT_1610_DMA_CH15 (62 + IH2_BASE)
+#define INT_1610_NAND (63 + IH2_BASE)
+#define INT_1610_SHA1MD5 (91 + IH2_BASE)
+
+/*
+ * OMAP-7xx specific IRQ numbers for interrupt handler 2
+ */
+#define INT_7XX_HW_ERRORS (0 + IH2_BASE)
+#define INT_7XX_NFIQ_PWR_FAIL (1 + IH2_BASE)
+#define INT_7XX_CFCD (2 + IH2_BASE)
+#define INT_7XX_CFIREQ (3 + IH2_BASE)
+#define INT_7XX_I2C (4 + IH2_BASE)
+#define INT_7XX_PCC (5 + IH2_BASE)
+#define INT_7XX_MPU_EXT_NIRQ (6 + IH2_BASE)
+#define INT_7XX_SPI_100K_1 (7 + IH2_BASE)
+#define INT_7XX_SYREN_SPI (8 + IH2_BASE)
+#define INT_7XX_VLYNQ (9 + IH2_BASE)
+#define INT_7XX_GPIO_BANK4 (10 + IH2_BASE)
+#define INT_7XX_McBSP1TX (11 + IH2_BASE)
+#define INT_7XX_McBSP1RX (12 + IH2_BASE)
+#define INT_7XX_McBSP1RX_OF (13 + IH2_BASE)
+#define INT_7XX_UART_MODEM_IRDA_2 (14 + IH2_BASE)
+#define INT_7XX_UART_MODEM_1 (15 + IH2_BASE)
+#define INT_7XX_MCSI (16 + IH2_BASE)
+#define INT_7XX_uWireTX (17 + IH2_BASE)
+#define INT_7XX_uWireRX (18 + IH2_BASE)
+#define INT_7XX_SMC_CD (19 + IH2_BASE)
+#define INT_7XX_SMC_IREQ (20 + IH2_BASE)
+#define INT_7XX_HDQ_1WIRE (21 + IH2_BASE)
+#define INT_7XX_TIMER32K (22 + IH2_BASE)
+#define INT_7XX_MMC_SDIO (23 + IH2_BASE)
+#define INT_7XX_UPLD (24 + IH2_BASE)
+#define INT_7XX_USB_HHC_1 (27 + IH2_BASE)
+#define INT_7XX_USB_HHC_2 (28 + IH2_BASE)
+#define INT_7XX_USB_GENI (29 + IH2_BASE)
+#define INT_7XX_USB_OTG (30 + IH2_BASE)
+#define INT_7XX_CAMERA_IF (31 + IH2_BASE)
+#define INT_7XX_RNG (32 + IH2_BASE)
+#define INT_7XX_DUAL_MODE_TIMER (33 + IH2_BASE)
+#define INT_7XX_DBB_RF_EN (34 + IH2_BASE)
+#define INT_7XX_MPUIO_KEYPAD (35 + IH2_BASE)
+#define INT_7XX_SHA1_MD5 (36 + IH2_BASE)
+#define INT_7XX_SPI_100K_2 (37 + IH2_BASE)
+#define INT_7XX_RNG_IDLE (38 + IH2_BASE)
+#define INT_7XX_MPUIO (39 + IH2_BASE)
+#define INT_7XX_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE)
+#define INT_7XX_LLPC_OE_FALLING (41 + IH2_BASE)
+#define INT_7XX_LLPC_OE_RISING (42 + IH2_BASE)
+#define INT_7XX_LLPC_VSYNC (43 + IH2_BASE)
+#define INT_7XX_WAKE_UP_REQ (46 + IH2_BASE)
+#define INT_7XX_DMA_CH6 (53 + IH2_BASE)
+#define INT_7XX_DMA_CH7 (54 + IH2_BASE)
+#define INT_7XX_DMA_CH8 (55 + IH2_BASE)
+#define INT_7XX_DMA_CH9 (56 + IH2_BASE)
+#define INT_7XX_DMA_CH10 (57 + IH2_BASE)
+#define INT_7XX_DMA_CH11 (58 + IH2_BASE)
+#define INT_7XX_DMA_CH12 (59 + IH2_BASE)
+#define INT_7XX_DMA_CH13 (60 + IH2_BASE)
+#define INT_7XX_DMA_CH14 (61 + IH2_BASE)
+#define INT_7XX_DMA_CH15 (62 + IH2_BASE)
+#define INT_7XX_NAND (63 + IH2_BASE)
+
+/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
+ * 16 MPUIO lines */
+#define OMAP_MAX_GPIO_LINES 192
+#define IH_GPIO_BASE (128 + IH2_BASE)
+#define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE)
+#define OMAP_IRQ_END (IH_MPUIO_BASE + 16)
+
+/* External FPGA handles interrupts on Innovator boards */
+#define OMAP_FPGA_IRQ_BASE (OMAP_IRQ_END)
+#ifdef CONFIG_MACH_OMAP_INNOVATOR
+#define OMAP_FPGA_NR_IRQS 24
+#else
+#define OMAP_FPGA_NR_IRQS 0
+#endif
+#define OMAP_FPGA_IRQ_END (OMAP_FPGA_IRQ_BASE + OMAP_FPGA_NR_IRQS)
+
+#define NR_IRQS OMAP_FPGA_IRQ_END
+
+#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
+
+#include <mach/hardware.h>
+
+#ifdef CONFIG_FIQ
+#define FIQ_START 1024
+#endif
+
+#endif
diff --git a/arch/arm/plat-omap/include/plat/omap1510.h b/arch/arm/mach-omap1/include/mach/omap1510.h
index d24004668138..8fe05d6137c0 100644
--- a/arch/arm/plat-omap/include/plat/omap1510.h
+++ b/arch/arm/mach-omap1/include/mach/omap1510.h
@@ -1,5 +1,4 @@
-/* arch/arm/plat-omap/include/mach/omap1510.h
- *
+/*
* Hardware definitions for TI OMAP1510 processor.
*
* Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>
diff --git a/arch/arm/plat-omap/include/plat/omap16xx.h b/arch/arm/mach-omap1/include/mach/omap16xx.h
index e69e1d857b45..cd1c724869c7 100644
--- a/arch/arm/plat-omap/include/plat/omap16xx.h
+++ b/arch/arm/mach-omap1/include/mach/omap16xx.h
@@ -1,5 +1,4 @@
-/* arch/arm/plat-omap/include/mach/omap16xx.h
- *
+/*
* Hardware definitions for TI OMAP1610/5912/1710 processors.
*
* Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>
diff --git a/arch/arm/plat-omap/include/plat/omap7xx.h b/arch/arm/mach-omap1/include/mach/omap7xx.h
index 48e4757e1e30..63da994bc609 100644
--- a/arch/arm/plat-omap/include/plat/omap7xx.h
+++ b/arch/arm/mach-omap1/include/mach/omap7xx.h
@@ -1,5 +1,4 @@
-/* arch/arm/plat-omap/include/mach/omap7xx.h
- *
+/*
* Hardware definitions for TI OMAP7XX processor.
*
* Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>
diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c
index f6b14a14a957..7f4bba9fa02e 100644
--- a/arch/arm/mach-omap1/leds-h2p2-debug.c
+++ b/arch/arm/mach-omap1/leds-h2p2-debug.c
@@ -14,6 +14,7 @@
#include <linux/kernel_stat.h>
#include <linux/sched.h>
#include <linux/io.h>
+#include <linux/platform_data/gpio-omap.h>
#include <mach/hardware.h>
#include <asm/leds.h>
diff --git a/arch/arm/mach-omap1/leds.c b/arch/arm/mach-omap1/leds.c
index ae6dd93b8ddc..7b1a3833165d 100644
--- a/arch/arm/mach-omap1/leds.c
+++ b/arch/arm/mach-omap1/leds.c
@@ -6,6 +6,7 @@
#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/platform_data/gpio-omap.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 6809c9e56c93..0d1709b1a6fe 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -22,7 +22,6 @@
#include <asm/mach-types.h>
-#include <plat/board.h>
#include <plat/mux.h>
#include <plat/fpga.h>
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index fcd4e85c4ddc..c1309495eeb6 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -18,6 +18,7 @@ config ARCH_OMAP2PLUS_TYPICAL
select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
select HIGHMEM
+ select PINCTRL
help
Compile a kernel suitable for booting most boards
diff --git a/arch/arm/mach-omap2/Makefile.boot b/arch/arm/mach-omap2/Makefile.boot
index b03e562acc60..be0fe9226d67 100644
--- a/arch/arm/mach-omap2/Makefile.boot
+++ b/arch/arm/mach-omap2/Makefile.boot
@@ -1,3 +1,9 @@
zreladdr-y += 0x80008000
params_phys-y := 0x80000100
initrd_phys-y := 0x80800000
+
+dtb-$(CONFIG_SOC_OMAP2420) += omap2420-h4.dtb
+dtb-$(CONFIG_ARCH_OMAP3) += omap3-beagle-xm.dtb omap3-evm.dtb omap3-tobi.dtb
+dtb-$(CONFIG_ARCH_OMAP4) += omap4-panda.dtb omap4-pandaES.dtb
+dtb-$(CONFIG_ARCH_OMAP4) += omap4-var_som.dtb omap4-sdp.dtb
+dtb-$(CONFIG_SOC_OMAP5) += omap5-evm.dtb
diff --git a/arch/arm/plat-omap/include/plat/am33xx.h b/arch/arm/mach-omap2/am33xx.h
index 06c19bb7bca6..06c19bb7bca6 100644
--- a/arch/arm/plat-omap/include/plat/am33xx.h
+++ b/arch/arm/mach-omap2/am33xx.h
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 9511584fdc4f..0900eac57d56 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -33,7 +33,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/usb.h>
@@ -212,9 +211,6 @@ static struct regulator_init_data sdp2430_vmmc1 = {
};
static struct twl4030_gpio_platform_data sdp2430_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
};
static struct twl4030_platform_data sdp2430_twldata = {
@@ -235,7 +231,7 @@ static int __init omap2430_i2c_init(void)
sdp2430_i2c1_boardinfo[0].irq = gpio_to_irq(78);
omap_register_i2c_bus(1, 100, sdp2430_i2c1_boardinfo,
ARRAY_SIZE(sdp2430_i2c1_boardinfo));
- omap_pmic_init(2, 100, "twl4030", INT_24XX_SYS_NIRQ,
+ omap_pmic_init(2, 100, "twl4030", 7 + OMAP_INTC_START,
&sdp2430_twldata);
return 0;
}
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index a98c688058a9..5453173ff57b 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -25,13 +25,11 @@
#include <linux/gpio.h>
#include <linux/mmc/host.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/mcspi.h>
-#include <plat/board.h>
#include <plat/usb.h>
#include "common.h"
#include <plat/dma.h>
@@ -191,9 +189,6 @@ static struct omap_dss_board_info sdp3430_dss_data = {
.default_device = &sdp3430_lcd_device,
};
-static struct omap_board_config_kernel sdp3430_config[] __initdata = {
-};
-
static struct omap2_hsmmc_info mmc[] = {
{
.mmc = 1,
@@ -233,9 +228,6 @@ static int sdp3430_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
| BIT(16) | BIT(17),
.setup = sdp3430_twl_gpio_setup,
@@ -576,8 +568,6 @@ static void __init omap_3430sdp_init(void)
int gpio_pendown;
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
- omap_board_config = sdp3430_config;
- omap_board_config_size = ARRAY_SIZE(sdp3430_config);
omap_hsmmc_init(mmc);
omap3430_i2c_init();
omap_display_init(&sdp3430_dss_data);
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index 2dc9ba523c7a..8518b1345988 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -17,7 +17,6 @@
#include <asm/mach/arch.h>
#include "common.h"
-#include <plat/board.h>
#include <plat/gpmc-smc91x.h>
#include <plat/usb.h>
@@ -67,9 +66,6 @@ static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
.reset_gpio_port[2] = -EINVAL
};
-static struct omap_board_config_kernel sdp_config[] __initdata = {
-};
-
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
{ .reg_offset = OMAP_MUX_TERMINATOR },
@@ -197,8 +193,6 @@ static struct flash_partitions sdp_flash_partitions[] = {
static void __init omap_sdp_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
- omap_board_config = sdp_config;
- omap_board_config_size = ARRAY_SIZE(sdp_config);
zoom_peripherals_init();
omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
h8mbx00u0mer0em_sdrc_params);
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index ad8a7d94afcd..db43e22526c0 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -28,13 +28,11 @@
#include <linux/leds_pwm.h>
#include <linux/platform_data/omap4-keypad.h>
-#include <mach/hardware.h>
#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
#include <plat/mmc.h>
@@ -45,6 +43,7 @@
#include <linux/wl12xx.h>
#include <linux/platform_data/omap-abe-twl6040.h>
+#include "soc.h"
#include "mux.h"
#include "hsmmc.h"
#include "control.h"
@@ -544,7 +543,6 @@ static struct twl6040_platform_data twl6040_data = {
.codec = &twl6040_codec,
.vibra = &twl6040_vibra,
.audpwron_gpio = 127,
- .irq_base = TWL6040_CODEC_IRQ_BASE,
};
static struct twl4030_platform_data sdp4430_twldata = {
@@ -581,7 +579,7 @@ static int __init omap4_i2c_init(void)
TWL_COMMON_REGULATOR_V1V8 |
TWL_COMMON_REGULATOR_V2V1);
omap4_pmic_init("twl6030", &sdp4430_twldata,
- &twl6040_data, OMAP44XX_IRQ_SYS_2N);
+ &twl6040_data, 119 + OMAP44XX_IRQ_GIC_START);
omap_register_i2c_bus(2, 400, NULL, 0);
omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo,
ARRAY_SIZE(sdp4430_i2c_3_boardinfo));
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 92432c28673d..318feadb1d6e 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -21,12 +21,10 @@
#include <linux/init.h>
#include <linux/gpio.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
@@ -37,11 +35,6 @@
#define GPIO_USB_POWER 35
#define GPIO_USB_NRESET 38
-
-/* Board initialization */
-static struct omap_board_config_kernel am3517_crane_config[] __initdata = {
-};
-
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
{ .reg_offset = OMAP_MUX_TERMINATOR },
@@ -67,9 +60,6 @@ static void __init am3517_crane_init(void)
omap_serial_init();
omap_sdrc_init(NULL, NULL);
- omap_board_config = am3517_crane_config;
- omap_board_config_size = ARRAY_SIZE(am3517_crane_config);
-
/* Configure GPIO for EHCI port */
if (omap_mux_init_gpio(GPIO_USB_NRESET, OMAP_PIN_OUTPUT)) {
pr_err("Can not configure mux for GPIO_USB_NRESET %d\n",
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 18f601096ce1..403d048a00ee 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -25,14 +25,13 @@
#include <linux/can/platform/ti_hecc.h>
#include <linux/davinci_emac.h>
#include <linux/mmc/host.h>
+#include <linux/platform_data/gpio-omap.h>
-#include <mach/hardware.h>
#include <mach/am35xx.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
#include <video/omapdss.h>
@@ -296,8 +295,7 @@ static struct resource am3517_hecc_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = INT_35XX_HECC0_IRQ,
- .end = INT_35XX_HECC0_IRQ,
+ .start = 24 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
},
};
@@ -324,9 +322,6 @@ static void am3517_evm_hecc_init(struct ti_hecc_platform_data *pdata)
platform_device_register(&am3517_hecc_device);
}
-static struct omap_board_config_kernel am3517_evm_config[] __initdata = {
-};
-
static struct omap2_hsmmc_info mmc[] = {
{
.mmc = 1,
@@ -346,8 +341,6 @@ static struct omap2_hsmmc_info mmc[] = {
static void __init am3517_evm_init(void)
{
- omap_board_config = am3517_evm_config;
- omap_board_config_size = ARRAY_SIZE(am3517_evm_config);
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
am3517_evm_i2c_init();
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index e5fa46bfde2f..3e2d76f05af4 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -29,13 +29,11 @@
#include <linux/smc91x.h>
#include <linux/gpio.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <plat/led.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 97d719047af3..34cb90471d96 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -23,6 +23,7 @@
#include <linux/input/matrix_keypad.h>
#include <linux/delay.h>
#include <linux/gpio.h>
+#include <linux/platform_data/gpio-omap.h>
#include <linux/i2c/at24.h>
#include <linux/i2c/twl.h>
@@ -37,7 +38,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/nand.h>
#include <plat/gpmc.h>
@@ -470,9 +470,6 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
}
static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.setup = cm_t35_twl_gpio_setup,
};
@@ -714,13 +711,8 @@ static inline void cm_t35_init_mux(void) {}
static inline void cm_t3730_init_mux(void) {}
#endif
-static struct omap_board_config_kernel cm_t35_config[] __initdata = {
-};
-
static void __init cm_t3x_common_init(void)
{
- omap_board_config = cm_t35_config;
- omap_board_config_size = ARRAY_SIZE(cm_t35_config);
omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
omap_serial_init();
omap_sdrc_init(mt46h32m32lf6_sdrc_params,
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index a33ad4641d9a..27a5450751ed 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -38,7 +38,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
#include <plat/nand.h>
@@ -90,8 +89,7 @@ static struct resource cm_t3517_hecc_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = INT_35XX_HECC0_IRQ,
- .end = INT_35XX_HECC0_IRQ,
+ .start = 24 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
},
};
@@ -249,9 +247,6 @@ static void __init cm_t3517_init_nand(void)
static inline void cm_t3517_init_nand(void) {}
#endif
-static struct omap_board_config_kernel cm_t3517_config[] __initdata = {
-};
-
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
/* GPIO186 - Green LED */
@@ -285,8 +280,6 @@ static void __init cm_t3517_init(void)
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_serial_init();
omap_sdrc_init(NULL, NULL);
- omap_board_config = cm_t3517_config;
- omap_board_config_size = ARRAY_SIZE(cm_t3517_config);
cm_t3517_init_leds();
cm_t3517_init_nand();
cm_t3517_init_rtc();
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 6567c1cd5572..18b63ad56274 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -32,15 +32,12 @@
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
-
-#include <mach/hardware.h>
#include <mach/id.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/nand.h>
@@ -56,7 +53,6 @@
#include <linux/interrupt.h>
#include "sdram-micron-mt46h32m32lf-6.h"
-
#include "mux.h"
#include "hsmmc.h"
#include "common-board-devices.h"
@@ -236,9 +232,6 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
| BIT(15) | BIT(16) | BIT(17),
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index 53c39d239d6e..9017813f9abc 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -16,13 +16,14 @@
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/io.h>
-#include <plat/irqs.h>
+#include <plat/cpu.h>
#include <plat/gpmc.h>
#include <plat/nand.h>
#include <plat/onenand.h>
#include <plat/tc.h>
+#include "common.h"
#include "board-flash.h"
#define REG_FPGA_REV 0x10
@@ -140,7 +141,6 @@ __init board_nand_init(struct mtd_partition *nand_parts,
board_nand_data.devsize = nand_type;
board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
- board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
gpmc_nand_init(&board_nand_data);
}
#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 6f93a20536ea..2ea7c577b295 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -16,11 +16,9 @@
#include <linux/of_platform.h>
#include <linux/irqdomain.h>
-#include <mach/hardware.h>
#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
-#include <plat/board.h>
#include "common.h"
#include "common-board-devices.h"
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index ace20482e3e1..12569cb0eddd 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -27,20 +27,19 @@
#include <linux/io.h>
#include <linux/input/matrix_keypad.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <plat/board.h>
-#include "common.h"
#include <plat/menelaus.h>
#include <plat/dma.h>
#include <plat/gpmc.h>
+#include <plat/debug-devices.h>
#include <video/omapdss.h>
#include <video/omap-panel-generic-dpi.h>
+#include "common.h"
#include "mux.h"
#include "control.h"
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 28214483aaba..8408bb2748a6 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -29,10 +29,10 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/usb.h>
+
#include <video/omapdss.h>
#include <video/omap-panel-tfp410.h>
#include <plat/onenand.h>
@@ -425,9 +425,6 @@ static int igep_twl_gpio_setup(struct device *dev,
};
static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.setup = igep_twl_gpio_setup,
};
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index ef9e82977499..3f3a552b1036 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -29,18 +29,14 @@
#include <linux/smsc911x.h>
#include <linux/mmc/host.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/mcspi.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <mach/board-zoom.h>
-
-#include <asm/delay.h>
#include <plat/usb.h>
#include <plat/gpmc-smsc911x.h>
@@ -275,9 +271,6 @@ static int ldp_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio)
}
static struct twl4030_gpio_platform_data ldp_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.setup = ldp_twl_gpio_setup,
};
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 677357ff61ac..d8deaea37dca 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -25,14 +25,11 @@
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/menelaus.h>
-#include <mach/irqs.h>
#include <plat/mcspi.h>
#include <plat/onenand.h>
#include <plat/mmc.h>
-#include <plat/serial.h>
#include "mux.h"
@@ -600,7 +597,7 @@ static struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = {
static struct i2c_board_info __initdata n8x0_i2c_board_info_1[] __initdata = {
{
I2C_BOARD_INFO("menelaus", 0x72),
- .irq = INT_24XX_SYS_NIRQ,
+ .irq = 7 + OMAP_INTC_START,
.platform_data = &n8x0_menelaus_platform_data,
},
};
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 6202fc76e490..801bcb4c5e22 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -33,13 +33,11 @@
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
-#include <plat/board.h>
#include "common.h"
#include <video/omapdss.h>
#include <video/omap-panel-tfp410.h>
@@ -297,9 +295,6 @@ static int beagle_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data beagle_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.pullups = BIT(1),
.pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 0d362e9f9cb9..b94873d0c6b6 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -40,12 +40,10 @@
#include <linux/mmc/host.h>
#include <linux/export.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <plat/board.h>
#include <plat/usb.h>
#include <plat/nand.h>
#include "common.h"
@@ -75,6 +73,18 @@
#define OMAP3EVM_GEN1_ETHR_GPIO_RST 64
#define OMAP3EVM_GEN2_ETHR_GPIO_RST 7
+/*
+ * OMAP35x EVM revision
+ * Run time detection of EVM revision is done by reading Ethernet
+ * PHY ID -
+ * GEN_1 = 0x01150000
+ * GEN_2 = 0x92200000
+ */
+enum {
+ OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
+ OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
+};
+
static u8 omap3_evm_version;
u8 get_omap3_evm_rev(void)
@@ -377,9 +387,6 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.setup = omap3evm_twl_gpio_setup,
};
@@ -526,9 +533,6 @@ static int __init omap3_evm_i2c_init(void)
return 0;
}
-static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
-};
-
static struct usbhs_omap_board_data usbhs_bdata __initdata = {
.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -688,9 +692,6 @@ static void __init omap3_evm_init(void)
obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;
omap3_mux_init(obm, OMAP_PACKAGE_CBB);
- omap_board_config = omap3_evm_config;
- omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
-
omap_mux_init_gpio(63, OMAP_PIN_INPUT);
omap_hsmmc_init(mmc);
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index fca93d1afd43..b5e56fa83c19 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -30,24 +30,21 @@
#include <linux/i2c/twl.h>
#include <linux/mmc/host.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include "mux.h"
-#include "hsmmc.h"
-#include "control.h"
-#include "common-board-devices.h"
-
-#include <plat/mux.h>
-#include <plat/board.h>
-#include "common.h"
#include <plat/gpmc-smsc911x.h>
#include <plat/gpmc.h>
#include <plat/sdrc.h>
#include <plat/usb.h>
+#include "common.h"
+#include "mux.h"
+#include "hsmmc.h"
+#include "control.h"
+#include "common-board-devices.h"
+
#define OMAP3LOGIC_SMSC911X_CS 1
#define OMAP3530_LV_SOM_MMC_GPIO_CD 110
@@ -78,9 +75,6 @@ static struct regulator_init_data omap3logic_vmmc1 = {
};
static struct twl4030_gpio_platform_data omap3logic_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.pullups = BIT(1),
.pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8)
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 57aebee44fd0..e700a98feba6 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -40,9 +40,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <plat/board.h>
#include "common.h"
-#include <mach/hardware.h>
#include <plat/mcspi.h>
#include <plat/usb.h>
#include <video/omapdss.h>
@@ -321,9 +319,6 @@ static int omap3pandora_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data omap3pandora_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.setup = omap3pandora_twl_gpio_setup,
};
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index b318f5602e36..b8756f0d2a08 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -28,14 +28,17 @@
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
#include <linux/mmc/host.h>
+#include <linux/input/matrix_keypad.h>
+#include <linux/spi/spi.h>
+#include <linux/interrupt.h>
+#include <linux/smsc911x.h>
+#include <linux/i2c/at24.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/nand.h>
@@ -279,9 +282,6 @@ omap3stalker_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data omap3stalker_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.setup = omap3stalker_twl_gpio_setup,
};
@@ -362,9 +362,6 @@ static int __init omap3_stalker_i2c_init(void)
#define OMAP3_STALKER_TS_GPIO 175
-static struct omap_board_config_kernel omap3_stalker_config[] __initdata = {
-};
-
static struct platform_device *omap3_stalker_devices[] __initdata = {
&keys_gpio,
};
@@ -399,8 +396,6 @@ static void __init omap3_stalker_init(void)
{
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
- omap_board_config = omap3_stalker_config;
- omap_board_config_size = ARRAY_SIZE(omap3_stalker_config);
omap_mux_init_gpio(23, OMAP_PIN_INPUT);
omap_hsmmc_init(mmc);
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 485d14d6a8cd..0e2f838e4009 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -37,14 +37,12 @@
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <asm/system_info.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/nand.h>
@@ -139,9 +137,6 @@ static int touchbook_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data touchbook_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.pullups = BIT(1),
.pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 70f6d1d25463..45fe2d3f59b1 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -32,19 +32,18 @@
#include <linux/wl12xx.h>
#include <linux/platform_data/omap-abe-twl6040.h>
-#include <mach/hardware.h>
#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <video/omapdss.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
#include <plat/mmc.h>
#include <video/omap-panel-tfp410.h>
+#include "soc.h"
#include "hsmmc.h"
#include "control.h"
#include "mux.h"
@@ -263,7 +262,6 @@ static struct twl6040_codec_data twl6040_codec = {
static struct twl6040_platform_data twl6040_data = {
.codec = &twl6040_codec,
.audpwron_gpio = 127,
- .irq_base = TWL6040_CODEC_IRQ_BASE,
};
/* Panda board uses the common PMIC configuration */
@@ -294,7 +292,7 @@ static int __init omap4_panda_i2c_init(void)
TWL_COMMON_REGULATOR_V1V8 |
TWL_COMMON_REGULATOR_V2V1);
omap4_pmic_init("twl6030", &omap4_panda_twldata,
- &twl6040_data, OMAP44XX_IRQ_SYS_2N);
+ &twl6040_data, 119 + OMAP44XX_IRQ_GIC_START);
omap_register_i2c_bus(2, 400, NULL, 0);
/*
* Bus 3 is attached to the DVI port where devices like the pico DLP
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 779734d8ba37..7a62d1322b7a 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -42,16 +42,13 @@
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
-#include <plat/board.h>
#include "common.h"
#include <video/omapdss.h>
#include <video/omap-panel-generic-dpi.h>
#include <video/omap-panel-tfp410.h>
#include <plat/gpmc.h>
-#include <mach/hardware.h>
#include <plat/nand.h>
#include <plat/mcspi.h>
-#include <plat/mux.h>
#include <plat/usb.h>
#include "mux.h"
@@ -399,9 +396,6 @@ static int overo_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data overo_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.setup = overo_twl_gpio_setup,
};
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 0ad1bb3bdb98..00773a32524a 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -27,6 +27,7 @@
#include <plat/gpmc.h>
#include "common.h"
#include <plat/onenand.h>
+#include <plat/serial.h>
#include "mux.h"
#include "hsmmc.h"
@@ -72,9 +73,6 @@ static struct platform_device *rm680_peripherals_devices[] __initdata = {
/* TWL */
static struct twl4030_gpio_platform_data rm680_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.pullups = BIT(0),
.pulldowns = BIT(1) | BIT(2) | BIT(8) | BIT(15),
};
@@ -87,7 +85,7 @@ static struct twl4030_platform_data rm680_twl_data = {
static void __init rm680_i2c_init(void)
{
omap3_pmic_get_config(&rm680_twl_data, TWL_COMMON_PDATA_USB, 0);
- omap_pmic_init(1, 2900, "twl5031", INT_34XX_SYS_NIRQ, &rm680_twl_data);
+ omap_pmic_init(1, 2900, "twl5031", 7 + OMAP_INTC_START, &rm680_twl_data);
omap_register_i2c_bus(2, 400, NULL, 0);
omap_register_i2c_bus(3, 400, NULL, 0);
}
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index df2534de3361..456049055daa 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -28,7 +28,6 @@
#include <asm/system_info.h>
#include <plat/mcspi.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/dma.h>
#include <plat/gpmc.h>
@@ -774,9 +773,6 @@ static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
}
static struct twl4030_gpio_platform_data rx51_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
| BIT(4) | BIT(5)
| BIT(8) | BIT(9) | BIT(10) | BIT(11)
@@ -1051,7 +1047,7 @@ static int __init rx51_i2c_init(void)
rx51_twldata.vdac->constraints.apply_uV = true;
rx51_twldata.vdac->constraints.name = "VDAC";
- omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
+ omap_pmic_init(1, 2200, "twl5030", 7 + OMAP_INTC_START, &rx51_twldata);
omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 345dd931f76f..93b466150002 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -18,13 +18,11 @@
#include <linux/gpio.h>
#include <linux/leds.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/mcspi.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/dma.h>
#include <plat/gpmc.h>
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index d4c8392cadb6..c4f8833b4c3c 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -15,13 +15,10 @@
#include <linux/kernel.h>
#include <linux/init.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <plat/irqs.h>
-#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
@@ -32,15 +29,10 @@ static struct omap_musb_board_data musb_board_data = {
.power = 500,
};
-static struct omap_board_config_kernel ti81xx_evm_config[] __initdata = {
-};
-
static void __init ti81xx_evm_init(void)
{
omap_serial_init();
omap_sdrc_init(NULL, NULL);
- omap_board_config = ti81xx_evm_config;
- omap_board_config_size = ARRAY_SIZE(ti81xx_evm_config);
usb_musb_init(&musb_board_data);
}
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c
index f64f44173061..5ec069e529e7 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -22,6 +22,9 @@
#include <mach/board-zoom.h>
+#include "soc.h"
+#include "common.h"
+
#define ZOOM_SMSC911X_CS 7
#define ZOOM_SMSC911X_GPIO 158
#define ZOOM_QUADUART_CS 3
diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c
index 28187f134fff..ea79bc299baf 100644
--- a/arch/arm/mach-omap2/board-zoom-display.c
+++ b/arch/arm/mach-omap2/board-zoom-display.c
@@ -18,6 +18,8 @@
#include <video/omapdss.h>
#include <mach/board-zoom.h>
+#include "common.h"
+
#define LCD_PANEL_RESET_GPIO_PROD 96
#define LCD_PANEL_RESET_GPIO_PILOT 55
#define LCD_PANEL_QVGA_GPIO 56
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index b797cb279618..6bcc107b9fc3 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -19,6 +19,7 @@
#include <linux/regulator/fixed.h>
#include <linux/wl12xx.h>
#include <linux/mmc/host.h>
+#include <linux/platform_data/gpio-omap.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -251,9 +252,6 @@ static void zoom2_set_hs_extmute(int mute)
}
static struct twl4030_gpio_platform_data zoom_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.setup = zoom_twl_gpio_setup,
};
@@ -281,7 +279,7 @@ static int __init omap_i2c_init(void)
codec_data->hs_extmute = 1;
codec_data->set_hs_extmute = zoom2_set_hs_extmute;
}
- omap_pmic_init(1, 2400, "twl5030", INT_34XX_SYS_NIRQ, &zoom_twldata);
+ omap_pmic_init(1, 2400, "twl5030", 7 + OMAP_INTC_START, &zoom_twldata);
omap_register_i2c_bus(2, 400, NULL, 0);
omap_register_i2c_bus(3, 400, NULL, 0);
return 0;
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index 4e7e56142e6f..4994438e1f46 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -22,7 +22,6 @@
#include <asm/mach/arch.h>
#include "common.h"
-#include <plat/board.h>
#include <plat/usb.h>
#include <mach/board-zoom.h>
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 3d9d746b221a..cabcfdba5246 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -33,11 +33,11 @@
#include <linux/cpufreq.h>
#include <linux/slab.h>
-#include <plat/cpu.h>
#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/sdrc.h>
+#include "soc.h"
#include "clock.h"
#include "clock2xxx.h"
#include "opp2xxx.h"
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index cd7fd0f91149..ae624c3b832a 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -22,8 +22,8 @@
#include <asm/div64.h>
#include <plat/clock.h>
-#include <plat/cpu.h>
+#include "soc.h"
#include "clock.h"
#include "cm-regbits-24xx.h"
#include "cm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index ea3f565ba1a4..1a1f97f3ca69 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -22,14 +22,16 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/bitops.h>
-#include <trace/events/power.h>
#include <asm/cpu.h>
+
#include <plat/clock.h>
-#include "clockdomain.h"
-#include <plat/cpu.h>
#include <plat/prcm.h>
+#include <trace/events/power.h>
+
+#include "soc.h"
+#include "clockdomain.h"
#include "clock.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index 002745181ad6..12c178dbc9f5 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -18,9 +18,9 @@
#include <linux/clk.h>
#include <linux/list.h>
-#include <plat/hardware.h>
#include <plat/clkdev_omap.h>
+#include "soc.h"
#include "iomap.h"
#include "clock.h"
#include "clock2xxx.h"
diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c
index dfda9a3f2cb2..a8e326177466 100644
--- a/arch/arm/mach-omap2/clock2430.c
+++ b/arch/arm/mach-omap2/clock2430.c
@@ -21,9 +21,9 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/hardware.h>
#include <plat/clock.h>
+#include "soc.h"
#include "iomap.h"
#include "clock.h"
#include "clock2xxx.h"
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index cacabb070e22..02fe1f28affc 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -17,9 +17,9 @@
#include <linux/clk.h>
#include <linux/list.h>
-#include <plat/hardware.h>
#include <plat/clkdev_omap.h>
+#include "soc.h"
#include "iomap.h"
#include "clock.h"
#include "clock2xxx.h"
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index 12500097378d..e92be1fc1a00 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -22,9 +22,9 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/cpu.h>
#include <plat/clock.h>
+#include "soc.h"
#include "clock.h"
#include "clock2xxx.h"
#include "cm.h"
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
index 25bbcc7ca4dc..7aa5ecaee5a2 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -18,8 +18,8 @@
#include <linux/list.h>
#include <linux/clk.h>
#include <plat/clkdev_omap.h>
-#include <plat/am33xx.h>
+#include "am33xx.h"
#include "iomap.h"
#include "control.h"
#include "clock.h"
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index 794d82702c85..fc2765bcdd40 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -21,9 +21,9 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/hardware.h>
#include <plat/clock.h>
+#include "soc.h"
#include "clock.h"
#include "clock3xxx.h"
#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 83bed9ad3017..10a2398e1736 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -21,9 +21,9 @@
#include <linux/list.h>
#include <linux/io.h>
-#include <plat/hardware.h>
#include <plat/clkdev_omap.h>
+#include "soc.h"
#include "iomap.h"
#include "clock.h"
#include "clock3xxx.h"
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index d7f55e43b761..500682c051c1 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -28,9 +28,9 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/hardware.h>
#include <plat/clkdev_omap.h>
+#include "soc.h"
#include "iomap.h"
#include "clock.h"
#include "clock44xx.h"
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c
index 389f9f8b570c..a911e76b4ecf 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c
@@ -18,8 +18,7 @@
#include <linux/err.h>
#include <linux/io.h>
-#include <plat/hardware.h>
-
+#include "soc.h"
#include "iomap.h"
#include "common.h"
#include "cm.h"
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index c1875862679f..013fedc9e131 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -27,6 +27,7 @@
#include <plat/mcspi.h>
#include <plat/nand.h>
+#include "common.h"
#include "common-board-devices.h"
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 069f9725b1c3..8e43c4d885d5 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -17,11 +17,10 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/hardware.h>
-#include <plat/board.h>
#include <plat/mux.h>
#include <plat/clock.h>
+#include "soc.h"
#include "iomap.h"
#include "common.h"
#include "sdrc.h"
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 1f65b1871c23..da0f5c187353 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -26,11 +26,18 @@
#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
#ifndef __ASSEMBLER__
+#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/i2c/twl.h>
-#include <plat/common.h>
+
#include <asm/proc-fns.h>
+#include <plat/cpu.h>
+#include <plat/serial.h>
+#include <plat/common.h>
+
+#define OMAP_INTC_START NR_IRQS
+
#ifdef CONFIG_SOC_OMAP2420
extern void omap242x_map_common_io(void);
#else
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 3223b81e7532..d1ff8399a222 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -15,9 +15,9 @@
#include <linux/kernel.h>
#include <linux/io.h>
-#include <plat/hardware.h>
#include <plat/sdrc.h>
+#include "soc.h"
#include "iomap.h"
#include "common.h"
#include "cm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index b8cdc8531b60..c1a5cab0f236 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -21,7 +21,7 @@
#include <mach/ctrl_module_pad_core_44xx.h>
#include <mach/ctrl_module_pad_wkup_44xx.h>
-#include <plat/am33xx.h>
+#include "am33xx.h"
#ifndef __ASSEMBLY__
#define OMAP242X_CTRL_REGADDR(reg) \
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index f2a49a48ef59..bc2756959be5 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -28,7 +28,6 @@
#include <linux/cpu_pm.h>
#include <plat/prcm.h>
-#include <plat/irqs.h>
#include "powerdomain.h"
#include "clockdomain.h"
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c00c68961bb8..1efa984b1a47 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -19,19 +19,18 @@
#include <linux/of.h>
#include <linux/platform_data/omap4-keypad.h>
-#include <mach/hardware.h>
-#include <mach/irqs.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/pmu.h>
#include "iomap.h"
-#include <plat/board.h>
#include <plat/dma.h>
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
#include <plat/omap4-keypad.h>
+#include "soc.h"
+#include "common.h"
#include "mux.h"
#include "control.h"
#include "devices.h"
@@ -112,7 +111,7 @@ static struct resource omap2cam_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = INT_24XX_CAM_IRQ,
+ .start = 24 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
}
};
@@ -201,7 +200,7 @@ static struct resource omap3isp_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = INT_34XX_CAM_IRQ,
+ .start = 24 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
}
};
@@ -435,14 +434,12 @@ static inline void omap_init_mcspi(void) {}
#endif
static struct resource omap2_pmu_resource = {
- .start = 3,
- .end = 3,
+ .start = 3 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
};
static struct resource omap3_pmu_resource = {
- .start = INT_34XX_BENCH_MPU_EMUL,
- .end = INT_34XX_BENCH_MPU_EMUL,
+ .start = 3 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
};
@@ -475,7 +472,7 @@ static struct resource omap2_sham_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = INT_24XX_SHA1MD5,
+ .start = 51 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
}
};
@@ -493,7 +490,7 @@ static struct resource omap3_sham_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = INT_34XX_SHA1MD52_IRQ,
+ .start = 49 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
},
{
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index b9c8d2f6a81f..d8318dc5ee91 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -28,9 +28,9 @@
#include <linux/bitops.h>
#include <linux/clkdev.h>
-#include <plat/cpu.h>
#include <plat/clock.h>
+#include "soc.h"
#include "clock.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index 9c6a296b3dc3..09d0ccccb861 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -15,9 +15,9 @@
#include <linux/io.h>
#include <linux/bitops.h>
-#include <plat/cpu.h>
#include <plat/clock.h>
+#include "soc.h"
#include "clock.h"
#include "clock44xx.h"
#include "cm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c
index e28e761b7ab9..b3566f68a559 100644
--- a/arch/arm/mach-omap2/emu.c
+++ b/arch/arm/mach-omap2/emu.c
@@ -21,8 +21,7 @@
#include <linux/clk.h>
#include <linux/err.h>
-#include <mach/hardware.h>
-
+#include "soc.h"
#include "iomap.h"
MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 9ad7d489b0de..7b52bdfc59c9 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -21,6 +21,7 @@
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/of.h>
+#include <linux/platform_data/gpio-omap.h>
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 386dec8d2351..9e9f47ad6187 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -16,20 +16,28 @@
#include <asm/mach/flash.h>
-#include <plat/cpu.h>
#include <plat/nand.h>
-#include <plat/board.h>
#include <plat/gpmc.h>
-static struct resource gpmc_nand_resource = {
- .flags = IORESOURCE_MEM,
+#include "soc.h"
+
+static struct resource gpmc_nand_resource[] = {
+ {
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .flags = IORESOURCE_IRQ,
+ },
};
static struct platform_device gpmc_nand_device = {
.name = "omap2-nand",
.id = 0,
- .num_resources = 1,
- .resource = &gpmc_nand_resource,
+ .num_resources = ARRAY_SIZE(gpmc_nand_resource),
+ .resource = gpmc_nand_resource,
};
static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data)
@@ -75,6 +83,7 @@ static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data
gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 0);
gpmc_cs_configure(gpmc_nand_data->cs,
GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND);
+ gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_WP, 0);
err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t);
if (err)
return err;
@@ -90,12 +99,19 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
gpmc_nand_device.dev.platform_data = gpmc_nand_data;
err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
- &gpmc_nand_data->phys_base);
+ (unsigned long *)&gpmc_nand_resource[0].start);
if (err < 0) {
dev_err(dev, "Cannot request GPMC CS\n");
return err;
}
+ gpmc_nand_resource[0].end = gpmc_nand_resource[0].start +
+ NAND_IO_SIZE - 1;
+
+ gpmc_nand_resource[1].start =
+ gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
+ gpmc_nand_resource[2].start =
+ gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
/* Set timings in GPMC */
err = omap2_nand_gpmc_retime(gpmc_nand_data);
if (err < 0) {
@@ -108,6 +124,8 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1);
}
+ gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
+
err = platform_device_register(&gpmc_nand_device);
if (err < 0) {
dev_err(dev, "Unable to register NAND device\n");
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c
index a0fa9bb2bda5..b66fb8e5faaa 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -18,16 +18,24 @@
#include <asm/mach/flash.h>
-#include <plat/cpu.h>
#include <plat/onenand.h>
-#include <plat/board.h>
#include <plat/gpmc.h>
+#include "soc.h"
+
+#define ONENAND_IO_SIZE SZ_128K
+
static struct omap_onenand_platform_data *gpmc_onenand_data;
+static struct resource gpmc_onenand_resource = {
+ .flags = IORESOURCE_MEM,
+};
+
static struct platform_device gpmc_onenand_device = {
.name = "omap2-onenand",
.id = -1,
+ .num_resources = 1,
+ .resource = &gpmc_onenand_resource,
};
static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
@@ -390,6 +398,8 @@ static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr)
void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
{
+ int err;
+
gpmc_onenand_data = _onenand_data;
gpmc_onenand_data->onenand_setup = gpmc_onenand_setup;
gpmc_onenand_device.dev.platform_data = gpmc_onenand_data;
@@ -401,8 +411,19 @@ void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
gpmc_onenand_data->flags |= ONENAND_SYNC_READ;
}
+ err = gpmc_cs_request(gpmc_onenand_data->cs, ONENAND_IO_SIZE,
+ (unsigned long *)&gpmc_onenand_resource.start);
+ if (err < 0) {
+ pr_err("%s: Cannot request GPMC CS\n", __func__);
+ return;
+ }
+
+ gpmc_onenand_resource.end = gpmc_onenand_resource.start +
+ ONENAND_IO_SIZE - 1;
+
if (platform_device_register(&gpmc_onenand_device) < 0) {
- printk(KERN_ERR "Unable to register OneNAND device\n");
+ pr_err("%s: Unable to register OneNAND device\n", __func__);
+ gpmc_cs_free(gpmc_onenand_data->cs);
return;
}
}
diff --git a/arch/arm/mach-omap2/gpmc-smc91x.c b/arch/arm/mach-omap2/gpmc-smc91x.c
index ba10c24f3d8d..245839dfc722 100644
--- a/arch/arm/mach-omap2/gpmc-smc91x.c
+++ b/arch/arm/mach-omap2/gpmc-smc91x.c
@@ -17,10 +17,11 @@
#include <linux/io.h>
#include <linux/smc91x.h>
-#include <plat/board.h>
#include <plat/gpmc.h>
#include <plat/gpmc-smc91x.h>
+#include "soc.h"
+
static struct omap_smc91x_platform_data *gpmc_cfg;
static struct resource gpmc_smc91x_resources[] = {
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c
index b6c77be3e8f7..a3a28878f0c9 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -20,7 +20,6 @@
#include <linux/io.h>
#include <linux/smsc911x.h>
-#include <plat/board.h>
#include <plat/gpmc.h>
#include <plat/gpmc-smsc911x.h>
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index b2b5759ab0fe..055ae8bd943f 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -28,8 +28,13 @@
#include <asm/mach-types.h>
#include <plat/gpmc.h>
+#include <plat/cpu.h>
+#include <plat/gpmc.h>
#include <plat/sdrc.h>
+#include "soc.h"
+#include "common.h"
+
/* GPMC register offsets */
#define GPMC_REVISION 0x00
#define GPMC_SYSCONFIG 0x10
@@ -78,6 +83,15 @@
#define ENABLE_PREFETCH (0x1 << 7)
#define DMA_MPU_MODE 2
+/* XXX: Only NAND irq has been considered,currently these are the only ones used
+ */
+#define GPMC_NR_IRQ 2
+
+struct gpmc_client_irq {
+ unsigned irq;
+ u32 bitmask;
+};
+
/* Structure to save gpmc cs context */
struct gpmc_cs_config {
u32 config1;
@@ -105,6 +119,10 @@ struct omap3_gpmc_regs {
struct gpmc_cs_config cs_context[GPMC_CS_NUM];
};
+static struct gpmc_client_irq gpmc_client_irq[GPMC_NR_IRQ];
+static struct irq_chip gpmc_irq_chip;
+static unsigned gpmc_irq_start;
+
static struct resource gpmc_mem_root;
static struct resource gpmc_cs_mem[GPMC_CS_NUM];
static DEFINE_SPINLOCK(gpmc_mem_lock);
@@ -682,6 +700,117 @@ int gpmc_prefetch_reset(int cs)
}
EXPORT_SYMBOL(gpmc_prefetch_reset);
+void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
+{
+ reg->gpmc_status = gpmc_base + GPMC_STATUS;
+ reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET +
+ GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs;
+ reg->gpmc_nand_address = gpmc_base + GPMC_CS0_OFFSET +
+ GPMC_CS_NAND_ADDRESS + GPMC_CS_SIZE * cs;
+ reg->gpmc_nand_data = gpmc_base + GPMC_CS0_OFFSET +
+ GPMC_CS_NAND_DATA + GPMC_CS_SIZE * cs;
+ reg->gpmc_prefetch_config1 = gpmc_base + GPMC_PREFETCH_CONFIG1;
+ reg->gpmc_prefetch_config2 = gpmc_base + GPMC_PREFETCH_CONFIG2;
+ reg->gpmc_prefetch_control = gpmc_base + GPMC_PREFETCH_CONTROL;
+ reg->gpmc_prefetch_status = gpmc_base + GPMC_PREFETCH_STATUS;
+ reg->gpmc_ecc_config = gpmc_base + GPMC_ECC_CONFIG;
+ reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL;
+ reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG;
+ reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT;
+ reg->gpmc_bch_result0 = gpmc_base + GPMC_ECC_BCH_RESULT_0;
+}
+
+int gpmc_get_client_irq(unsigned irq_config)
+{
+ int i;
+
+ if (hweight32(irq_config) > 1)
+ return 0;
+
+ for (i = 0; i < GPMC_NR_IRQ; i++)
+ if (gpmc_client_irq[i].bitmask & irq_config)
+ return gpmc_client_irq[i].irq;
+
+ return 0;
+}
+
+static int gpmc_irq_endis(unsigned irq, bool endis)
+{
+ int i;
+ u32 regval;
+
+ for (i = 0; i < GPMC_NR_IRQ; i++)
+ if (irq == gpmc_client_irq[i].irq) {
+ regval = gpmc_read_reg(GPMC_IRQENABLE);
+ if (endis)
+ regval |= gpmc_client_irq[i].bitmask;
+ else
+ regval &= ~gpmc_client_irq[i].bitmask;
+ gpmc_write_reg(GPMC_IRQENABLE, regval);
+ break;
+ }
+
+ return 0;
+}
+
+static void gpmc_irq_disable(struct irq_data *p)
+{
+ gpmc_irq_endis(p->irq, false);
+}
+
+static void gpmc_irq_enable(struct irq_data *p)
+{
+ gpmc_irq_endis(p->irq, true);
+}
+
+static void gpmc_irq_noop(struct irq_data *data) { }
+
+static unsigned int gpmc_irq_noop_ret(struct irq_data *data) { return 0; }
+
+static int gpmc_setup_irq(int gpmc_irq)
+{
+ int i;
+ u32 regval;
+
+ if (!gpmc_irq)
+ return -EINVAL;
+
+ gpmc_irq_start = irq_alloc_descs(-1, 0, GPMC_NR_IRQ, 0);
+ if (IS_ERR_VALUE(gpmc_irq_start)) {
+ pr_err("irq_alloc_descs failed\n");
+ return gpmc_irq_start;
+ }
+
+ gpmc_irq_chip.name = "gpmc";
+ gpmc_irq_chip.irq_startup = gpmc_irq_noop_ret;
+ gpmc_irq_chip.irq_enable = gpmc_irq_enable;
+ gpmc_irq_chip.irq_disable = gpmc_irq_disable;
+ gpmc_irq_chip.irq_shutdown = gpmc_irq_noop;
+ gpmc_irq_chip.irq_ack = gpmc_irq_noop;
+ gpmc_irq_chip.irq_mask = gpmc_irq_noop;
+ gpmc_irq_chip.irq_unmask = gpmc_irq_noop;
+
+ gpmc_client_irq[0].bitmask = GPMC_IRQ_FIFOEVENTENABLE;
+ gpmc_client_irq[1].bitmask = GPMC_IRQ_COUNT_EVENT;
+
+ for (i = 0; i < GPMC_NR_IRQ; i++) {
+ gpmc_client_irq[i].irq = gpmc_irq_start + i;
+ irq_set_chip_and_handler(gpmc_client_irq[i].irq,
+ &gpmc_irq_chip, handle_simple_irq);
+ set_irq_flags(gpmc_client_irq[i].irq,
+ IRQF_VALID | IRQF_NOAUTOEN);
+ }
+
+ /* Disable interrupts */
+ gpmc_write_reg(GPMC_IRQENABLE, 0);
+
+ /* clear interrupts */
+ regval = gpmc_read_reg(GPMC_IRQSTATUS);
+ gpmc_write_reg(GPMC_IRQSTATUS, regval);
+
+ return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL);
+}
+
static void __init gpmc_mem_init(void)
{
int cs;
@@ -711,8 +840,8 @@ static void __init gpmc_mem_init(void)
static int __init gpmc_init(void)
{
- u32 l, irq;
- int cs, ret = -EINVAL;
+ u32 l;
+ int ret = -EINVAL;
int gpmc_irq;
char *ck = NULL;
@@ -722,16 +851,16 @@ static int __init gpmc_init(void)
l = OMAP2420_GPMC_BASE;
else
l = OMAP34XX_GPMC_BASE;
- gpmc_irq = INT_34XX_GPMC_IRQ;
+ gpmc_irq = 20 + OMAP_INTC_START;
} else if (cpu_is_omap34xx()) {
ck = "gpmc_fck";
l = OMAP34XX_GPMC_BASE;
- gpmc_irq = INT_34XX_GPMC_IRQ;
+ gpmc_irq = 20 + OMAP_INTC_START;
} else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
/* Base address and irq number are same for OMAP4/5 */
ck = "gpmc_ck";
l = OMAP44XX_GPMC_BASE;
- gpmc_irq = OMAP44XX_IRQ_GPMC;
+ gpmc_irq = 20 + OMAP44XX_IRQ_GIC_START;
}
if (WARN_ON(!ck))
@@ -761,16 +890,7 @@ static int __init gpmc_init(void)
gpmc_write_reg(GPMC_SYSCONFIG, l);
gpmc_mem_init();
- /* initalize the irq_chained */
- irq = OMAP_GPMC_IRQ_BASE;
- for (cs = 0; cs < GPMC_CS_NUM; cs++) {
- irq_set_chip_and_handler(irq, &dummy_irq_chip,
- handle_simple_irq);
- set_irq_flags(irq, IRQF_VALID);
- irq++;
- }
-
- ret = request_irq(gpmc_irq, gpmc_handle_irq, IRQF_SHARED, "gpmc", NULL);
+ ret = gpmc_setup_irq(gpmc_irq);
if (ret)
pr_err("gpmc: irq-%d could not claim: err %d\n",
gpmc_irq, ret);
@@ -780,12 +900,19 @@ postcore_initcall(gpmc_init);
static irqreturn_t gpmc_handle_irq(int irq, void *dev)
{
- u8 cs;
+ int i;
+ u32 regval;
+
+ regval = gpmc_read_reg(GPMC_IRQSTATUS);
+
+ if (!regval)
+ return IRQ_NONE;
+
+ for (i = 0; i < GPMC_NR_IRQ; i++)
+ if (regval & gpmc_client_irq[i].bitmask)
+ generic_handle_irq(gpmc_client_irq[i].irq);
- /* check cs to invoke the irq */
- cs = ((gpmc_read_reg(GPMC_PREFETCH_CONFIG1)) >> CS_NUM_SHIFT) & 0x7;
- if (OMAP_GPMC_IRQ_BASE+cs <= OMAP_GPMC_IRQ_END)
- generic_handle_irq(OMAP_GPMC_IRQ_BASE+cs);
+ gpmc_write_reg(GPMC_IRQSTATUS, regval);
return IRQ_HANDLED;
}
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index a9675d8d1822..80399d740952 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -15,6 +15,8 @@
#include <linux/delay.h>
#include <linux/gpio.h>
#include <mach/hardware.h>
+#include <linux/platform_data/gpio-omap.h>
+
#include <plat/mmc.h>
#include <plat/omap-pm.h>
#include <plat/mux.h>
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index a12e224eb97d..fc57e67b321f 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -19,7 +19,6 @@
*
*/
-#include <plat/cpu.h>
#include <plat/i2c.h>
#include "common.h"
#include <plat/omap_hwmod.h>
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 40373db649aa..7219df0e831a 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -22,10 +22,10 @@
#include <asm/cputype.h>
#include "common.h"
-#include <plat/cpu.h>
#include <mach/id.h>
+#include "soc.h"
#include "control.h"
static unsigned int omap_revision;
diff --git a/arch/arm/mach-omap2/include/mach/gpio.h b/arch/arm/mach-omap2/include/mach/gpio.h
index be4d290d57ee..5621cc59c9f4 100644
--- a/arch/arm/mach-omap2/include/mach/gpio.h
+++ b/arch/arm/mach-omap2/include/mach/gpio.h
@@ -1,5 +1,3 @@
/*
* arch/arm/mach-omap2/include/mach/gpio.h
*/
-
-#include <plat/gpio.h>
diff --git a/arch/arm/mach-omap2/include/mach/hardware.h b/arch/arm/mach-omap2/include/mach/hardware.h
index 78edf9d33f71..54492dbf6973 100644
--- a/arch/arm/mach-omap2/include/mach/hardware.h
+++ b/arch/arm/mach-omap2/include/mach/hardware.h
@@ -1,5 +1,3 @@
/*
* arch/arm/mach-omap2/include/mach/hardware.h
*/
-
-#include <plat/hardware.h>
diff --git a/arch/arm/mach-omap2/include/mach/irqs.h b/arch/arm/mach-omap2/include/mach/irqs.h
index 44dab7725696..ba5282cafa42 100644
--- a/arch/arm/mach-omap2/include/mach/irqs.h
+++ b/arch/arm/mach-omap2/include/mach/irqs.h
@@ -1,5 +1,3 @@
/*
* arch/arm/mach-omap2/include/mach/irqs.h
*/
-
-#include <plat/irqs.h>
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4d2d981ff5c5..0d79c23e9f88 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -33,6 +33,7 @@
#include <plat/multi.h>
#include <plat/dma.h>
+#include "soc.h"
#include "iomap.h"
#include "voltage.h"
#include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index bcd83db41bbc..efed4f540adb 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -23,8 +23,7 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
-#include <mach/hardware.h>
-
+#include "soc.h"
#include "iomap.h"
#include "common.h"
@@ -49,6 +48,8 @@
#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */
#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
+#define INTCPS_NR_MIR_REGS 3
+#define INTCPS_NR_IRQS 96
/*
* OMAP2 has a number of different interrupt controllers, each interrupt
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 6875be837d9f..0d974565f8ca 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -16,8 +16,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/pm_runtime.h>
+
#include <plat/mailbox.h>
-#include <mach/irqs.h>
+
+#include "soc.h"
#define MAILBOX_REVISION 0x000
#define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 577cb77db26c..d493727632e9 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -18,9 +18,7 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
-#include <mach/irqs.h>
#include <plat/dma.h>
-#include <plat/cpu.h>
#include <plat/mcbsp.h>
#include <plat/omap_device.h>
#include <linux/pm_runtime.h>
diff --git a/arch/arm/mach-omap2/msdi.c b/arch/arm/mach-omap2/msdi.c
index fb5bc6cf3773..9e57b4aadb06 100644
--- a/arch/arm/mach-omap2/msdi.c
+++ b/arch/arm/mach-omap2/msdi.c
@@ -23,6 +23,7 @@
#include <linux/kernel.h>
#include <linux/err.h>
+#include <linux/platform_data/gpio-omap.h>
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index 1be8bcb52e93..df298d46707c 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -14,7 +14,9 @@
#include <linux/platform_device.h>
#include <plat/iommu.h>
-#include <plat/irqs.h>
+
+#include "soc.h"
+#include "common.h"
struct iommu_device {
resource_size_t base;
@@ -29,7 +31,7 @@ static int num_iommu_devices;
static struct iommu_device omap3_devices[] = {
{
.base = 0x480bd400,
- .irq = 24,
+ .irq = 24 + OMAP_INTC_START,
.pdata = {
.name = "isp",
.nr_tlb_entries = 8,
@@ -41,7 +43,7 @@ static struct iommu_device omap3_devices[] = {
#if defined(CONFIG_OMAP_IOMMU_IVA2)
{
.base = 0x5d000000,
- .irq = 28,
+ .irq = 28 + OMAP_INTC_START,
.pdata = {
.name = "iva2",
.nr_tlb_entries = 32,
@@ -64,7 +66,7 @@ static struct platform_device *omap3_iommu_pdev[NR_OMAP3_IOMMU_DEVICES];
static struct iommu_device omap4_devices[] = {
{
.base = OMAP4_MMU1_BASE,
- .irq = OMAP44XX_IRQ_DUCATI_MMU,
+ .irq = 100 + OMAP44XX_IRQ_GIC_START,
.pdata = {
.name = "ducati",
.nr_tlb_entries = 32,
@@ -75,7 +77,7 @@ static struct iommu_device omap4_devices[] = {
},
{
.base = OMAP4_MMU2_BASE,
- .irq = OMAP44XX_IRQ_TESLA_MMU,
+ .irq = 28 + OMAP44XX_IRQ_GIC_START,
.pdata = {
.name = "tesla",
.nr_tlb_entries = 32,
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 637a1bdf2ac4..ff4e6a0e9c7c 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -50,9 +50,8 @@
#include <asm/suspend.h>
#include <asm/hardware/cache-l2x0.h>
-#include <plat/omap44xx.h>
-
#include "common.h"
+#include "omap44xx.h"
#include "omap4-sar-layout.h"
#include "pm.h"
#include "prcm_mpu44xx.h"
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 9a35adf91232..19cc5f504f7e 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -24,11 +24,11 @@
#include <asm/hardware/gic.h>
#include <asm/smp_scu.h>
-#include <mach/hardware.h>
#include <mach/omap-secure.h>
#include <mach/omap-wakeupgen.h>
#include <asm/cputype.h>
+#include "soc.h"
#include "iomap.h"
#include "common.h"
#include "clockdomain.h"
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 05fdebfaa195..b54427dec2a3 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -30,6 +30,7 @@
#include <mach/omap-wakeupgen.h>
#include <mach/omap-secure.h>
+#include "soc.h"
#include "omap4-sar-layout.h"
#include "common.h"
diff --git a/arch/arm/plat-omap/include/plat/omap24xx.h b/arch/arm/mach-omap2/omap24xx.h
index 92df9e27cc5c..641a2c8d2eee 100644
--- a/arch/arm/plat-omap/include/plat/omap24xx.h
+++ b/arch/arm/mach-omap2/omap24xx.h
@@ -1,6 +1,4 @@
/*
- * arch/arm/plat-omap/include/mach/omap24xx.h
- *
* This file contains the processor specific definitions
* of the TI OMAP24XX.
*
diff --git a/arch/arm/plat-omap/include/plat/omap34xx.h b/arch/arm/mach-omap2/omap34xx.h
index 0d818acf3917..c0d1b4b1653f 100644
--- a/arch/arm/plat-omap/include/plat/omap34xx.h
+++ b/arch/arm/mach-omap2/omap34xx.h
@@ -1,6 +1,4 @@
/*
- * arch/arm/plat-omap/include/mach/omap34xx.h
- *
* This file contains the processor specific definitions of the TI OMAP34XX.
*
* Copyright (C) 2007 Texas Instruments.
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index c29dee998a79..3cd2564ed5cd 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -16,26 +16,25 @@
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/memblock.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/export.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/map.h>
#include <asm/memblock.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
-#include <plat/irqs.h>
#include <plat/sram.h>
#include <plat/omap-secure.h>
#include <plat/mmc.h>
-#include <mach/hardware.h>
#include <mach/omap-wakeupgen.h>
+#include "soc.h"
#include "common.h"
#include "hsmmc.h"
#include "omap4-sar-layout.h"
-#include <linux/export.h>
#ifdef CONFIG_CACHE_L2X0
static void __iomem *l2cache_base;
@@ -171,7 +170,10 @@ static int __init omap_l2_cache_init(void)
/* Enable PL310 L2 Cache controller */
omap_smc1(0x102, 0x1);
- l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK);
+ if (of_have_populated_dt())
+ l2x0_of_init(aux_ctrl, L2X0_AUX_CTRL_MASK);
+ else
+ l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK);
/*
* Override default outer_cache.disable with a OMAP4
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h b/arch/arm/mach-omap2/omap44xx.h
index c0d478e55c84..43b927b2e2e8 100644
--- a/arch/arm/plat-omap/include/plat/omap44xx.h
+++ b/arch/arm/mach-omap2/omap44xx.h
@@ -39,12 +39,12 @@
#define IRQ_SIR_IRQ 0x0040
#define OMAP44XX_GIC_DIST_BASE 0x48241000
#define OMAP44XX_GIC_CPU_BASE 0x48240100
+#define OMAP44XX_IRQ_GIC_START 32
#define OMAP44XX_SCU_BASE 0x48240000
#define OMAP44XX_LOCAL_TWD_BASE 0x48240600
#define OMAP44XX_L2CACHE_BASE 0x48242000
#define OMAP44XX_WKUPGEN_BASE 0x48281000
#define OMAP44XX_MCPDM_BASE 0x40132000
-#define OMAP44XX_MCPDM_L3_BASE 0x49032000
#define OMAP44XX_SAR_RAM_BASE 0x4a326000
#define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000)
diff --git a/arch/arm/plat-omap/include/plat/omap54xx.h b/arch/arm/mach-omap2/omap54xx.h
index a2582bb3cab3..a2582bb3cab3 100644
--- a/arch/arm/plat-omap/include/plat/omap54xx.h
+++ b/arch/arm/mach-omap2/omap54xx.h
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6ca8e519968d..4c6b5a774054 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -139,14 +139,14 @@
#include <linux/slab.h>
#include <linux/bootmem.h>
-#include "common.h"
-#include <plat/cpu.h>
-#include "clockdomain.h"
-#include "powerdomain.h"
#include <plat/clock.h>
#include <plat/omap_hwmod.h>
#include <plat/prcm.h>
+#include "soc.h"
+#include "common.h"
+#include "clockdomain.h"
+#include "powerdomain.h"
#include "cm2xxx_3xxx.h"
#include "cminst44xx.h"
#include "prm2xxx_3xxx.h"
@@ -3158,6 +3158,33 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
}
/**
+ * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
+ * @oh: struct omap_hwmod *
+ * @res: pointer to the array of struct resource to fill
+ *
+ * Fill the struct resource array @res with dma resource data from the
+ * omap_hwmod @oh. Intended to be called by code that registers
+ * omap_devices. See also omap_hwmod_count_resources(). Returns the
+ * number of array elements filled.
+ */
+int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
+{
+ int i, sdma_reqs_cnt;
+ int r = 0;
+
+ sdma_reqs_cnt = _count_sdma_reqs(oh);
+ for (i = 0; i < sdma_reqs_cnt; i++) {
+ (res + r)->name = (oh->sdma_reqs + i)->name;
+ (res + r)->start = (oh->sdma_reqs + i)->dma_req;
+ (res + r)->end = (oh->sdma_reqs + i)->dma_req;
+ (res + r)->flags = IORESOURCE_DMA;
+ r++;
+ }
+
+ return r;
+}
+
+/**
* omap_hwmod_get_resource_byname - fetch IP block integration data by name
* @oh: struct omap_hwmod * to operate on
* @type: one of the IORESOURCE_* constants from include/linux/ioport.h
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 50cfab61b0e2..4e81637640e9 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -13,12 +13,9 @@
* XXX these should be marked initdata for multi-OMAP kernels
*/
#include <plat/omap_hwmod.h>
-#include <mach/irqs.h>
-#include <plat/cpu.h>
#include <plat/dma.h>
#include <plat/serial.h>
#include <plat/i2c.h>
-#include <plat/gpio.h>
#include <plat/mcspi.h>
#include <plat/dmtimer.h>
#include <plat/l3_2xxx.h>
@@ -162,9 +159,9 @@ static struct omap_hwmod omap2420_dma_system_hwmod = {
/* mailbox */
static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = {
- { .name = "dsp", .irq = 26 },
- { .name = "iva", .irq = 34 },
- { .irq = -1 }
+ { .name = "dsp", .irq = 26 + OMAP_INTC_START, },
+ { .name = "iva", .irq = 34 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap2420_mailbox_hwmod = {
@@ -199,9 +196,9 @@ static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
/* mcbsp1 */
static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {
- { .name = "tx", .irq = 59 },
- { .name = "rx", .irq = 60 },
- { .irq = -1 }
+ { .name = "tx", .irq = 59 + OMAP_INTC_START, },
+ { .name = "rx", .irq = 60 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap2420_mcbsp1_hwmod = {
@@ -225,9 +222,9 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
/* mcbsp2 */
static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = {
- { .name = "tx", .irq = 62 },
- { .name = "rx", .irq = 63 },
- { .irq = -1 }
+ { .name = "tx", .irq = 62 + OMAP_INTC_START, },
+ { .name = "rx", .irq = 63 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap2420_mcbsp2_hwmod = {
@@ -265,8 +262,8 @@ static struct omap_hwmod_class omap2420_msdi_hwmod_class = {
/* msdi1 */
static struct omap_hwmod_irq_info omap2420_msdi1_irqs[] = {
- { .irq = 83 },
- { .irq = -1 }
+ { .irq = 83 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info omap2420_msdi1_sdma_reqs[] = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 58b5bc196d32..ceb23c3fa89d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -13,20 +13,17 @@
* XXX these should be marked initdata for multi-OMAP kernels
*/
#include <plat/omap_hwmod.h>
-#include <mach/irqs.h>
-#include <plat/cpu.h>
#include <plat/dma.h>
#include <plat/serial.h>
#include <plat/i2c.h>
-#include <plat/gpio.h>
#include <plat/mcbsp.h>
#include <plat/mcspi.h>
#include <plat/dmtimer.h>
#include <plat/mmc.h>
#include <plat/l3_2xxx.h>
+#include "soc.h"
#include "omap_hwmod_common_data.h"
-
#include "prm-regbits-24xx.h"
#include "cm-regbits-24xx.h"
#include "wd_timer.h"
@@ -133,8 +130,8 @@ static struct omap_hwmod omap2430_i2c2_hwmod = {
/* gpio5 */
static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = {
- { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */
- { .irq = -1 }
+ { .irq = 33 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK5 */
+ { .irq = -1 },
};
static struct omap_hwmod omap2430_gpio5_hwmod = {
@@ -173,8 +170,8 @@ static struct omap_hwmod omap2430_dma_system_hwmod = {
/* mailbox */
static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = {
- { .irq = 26 },
- { .irq = -1 }
+ { .irq = 26 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap2430_mailbox_hwmod = {
@@ -195,8 +192,8 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {
/* mcspi3 */
static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = {
- { .irq = 91 },
- { .irq = -1 }
+ { .irq = 91 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = {
@@ -250,9 +247,9 @@ static struct omap_hwmod_class usbotg_class = {
/* usb_otg_hs */
static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = {
- { .name = "mc", .irq = 92 },
- { .name = "dma", .irq = 93 },
- { .irq = -1 }
+ { .name = "mc", .irq = 92 + OMAP_INTC_START, },
+ { .name = "dma", .irq = 93 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap2430_usbhsotg_hwmod = {
@@ -303,11 +300,11 @@ static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
/* mcbsp1 */
static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
- { .name = "tx", .irq = 59 },
- { .name = "rx", .irq = 60 },
- { .name = "ovr", .irq = 61 },
- { .name = "common", .irq = 64 },
- { .irq = -1 }
+ { .name = "tx", .irq = 59 + OMAP_INTC_START, },
+ { .name = "rx", .irq = 60 + OMAP_INTC_START, },
+ { .name = "ovr", .irq = 61 + OMAP_INTC_START, },
+ { .name = "common", .irq = 64 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap2430_mcbsp1_hwmod = {
@@ -331,10 +328,10 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
/* mcbsp2 */
static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = {
- { .name = "tx", .irq = 62 },
- { .name = "rx", .irq = 63 },
- { .name = "common", .irq = 16 },
- { .irq = -1 }
+ { .name = "tx", .irq = 62 + OMAP_INTC_START, },
+ { .name = "rx", .irq = 63 + OMAP_INTC_START, },
+ { .name = "common", .irq = 16 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap2430_mcbsp2_hwmod = {
@@ -358,10 +355,10 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
/* mcbsp3 */
static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = {
- { .name = "tx", .irq = 89 },
- { .name = "rx", .irq = 90 },
- { .name = "common", .irq = 17 },
- { .irq = -1 }
+ { .name = "tx", .irq = 89 + OMAP_INTC_START, },
+ { .name = "rx", .irq = 90 + OMAP_INTC_START, },
+ { .name = "common", .irq = 17 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap2430_mcbsp3_hwmod = {
@@ -385,10 +382,10 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
/* mcbsp4 */
static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = {
- { .name = "tx", .irq = 54 },
- { .name = "rx", .irq = 55 },
- { .name = "common", .irq = 18 },
- { .irq = -1 }
+ { .name = "tx", .irq = 54 + OMAP_INTC_START, },
+ { .name = "rx", .irq = 55 + OMAP_INTC_START, },
+ { .name = "common", .irq = 18 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = {
@@ -418,10 +415,10 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
/* mcbsp5 */
static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = {
- { .name = "tx", .irq = 81 },
- { .name = "rx", .irq = 82 },
- { .name = "common", .irq = 19 },
- { .irq = -1 }
+ { .name = "tx", .irq = 81 + OMAP_INTC_START, },
+ { .name = "rx", .irq = 82 + OMAP_INTC_START, },
+ { .name = "common", .irq = 19 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = {
@@ -468,8 +465,8 @@ static struct omap_hwmod_class omap2430_mmc_class = {
/* MMC/SD/SDIO1 */
static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = {
- { .irq = 83 },
- { .irq = -1 }
+ { .irq = 83 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = {
@@ -509,8 +506,8 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
/* MMC/SD/SDIO2 */
static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = {
- { .irq = 86 },
- { .irq = -1 }
+ { .irq = 86 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index 102d76e9e9ea..bea700e928e7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -15,8 +15,6 @@
#include <plat/common.h>
#include <plat/hdq1w.h>
-#include <mach/irqs.h>
-
#include "omap_hwmod_common_data.h"
/* UART */
@@ -182,126 +180,126 @@ struct omap_hwmod_class iva_hwmod_class = {
/* Common MPU IRQ line data */
struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = {
- { .irq = 37, },
- { .irq = -1 }
+ { .irq = 37 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[] = {
- { .irq = 38, },
- { .irq = -1 }
+ { .irq = 38 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[] = {
- { .irq = 39, },
- { .irq = -1 }
+ { .irq = 39 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[] = {
- { .irq = 40, },
- { .irq = -1 }
+ { .irq = 40 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[] = {
- { .irq = 41, },
- { .irq = -1 }
+ { .irq = 41 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[] = {
- { .irq = 42, },
- { .irq = -1 }
+ { .irq = 42 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[] = {
- { .irq = 43, },
- { .irq = -1 }
+ { .irq = 43 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[] = {
- { .irq = 44, },
- { .irq = -1 }
+ { .irq = 44 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[] = {
- { .irq = 45, },
- { .irq = -1 }
+ { .irq = 45 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[] = {
- { .irq = 46, },
- { .irq = -1 }
+ { .irq = 46 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[] = {
- { .irq = 47, },
- { .irq = -1 }
+ { .irq = 47 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[] = {
- { .irq = INT_24XX_UART1_IRQ, },
- { .irq = -1 }
+ { .irq = 72 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[] = {
- { .irq = INT_24XX_UART2_IRQ, },
- { .irq = -1 }
+ { .irq = 73 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[] = {
- { .irq = INT_24XX_UART3_IRQ, },
- { .irq = -1 }
+ { .irq = 74 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_dispc_irqs[] = {
- { .irq = 25 },
- { .irq = -1 }
+ { .irq = 25 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[] = {
- { .irq = INT_24XX_I2C1_IRQ, },
- { .irq = -1 }
+ { .irq = 56 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[] = {
- { .irq = INT_24XX_I2C2_IRQ, },
- { .irq = -1 }
+ { .irq = 57 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_gpio1_irqs[] = {
- { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */
- { .irq = -1 }
+ { .irq = 29 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK1 */
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_gpio2_irqs[] = {
- { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */
- { .irq = -1 }
+ { .irq = 30 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK2 */
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_gpio3_irqs[] = {
- { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */
- { .irq = -1 }
+ { .irq = 31 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK3 */
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_gpio4_irqs[] = {
- { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */
- { .irq = -1 }
+ { .irq = 32 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK4 */
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_dma_system_irqs[] = {
- { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
- { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
- { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
- { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
- { .irq = -1 }
+ { .name = "0", .irq = 12 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ0 */
+ { .name = "1", .irq = 13 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ1 */
+ { .name = "2", .irq = 14 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ2 */
+ { .name = "3", .irq = 15 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ3 */
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[] = {
- { .irq = 65 },
- { .irq = -1 }
+ { .irq = 65 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = {
- { .irq = 66 },
- { .irq = -1 }
+ { .irq = 66 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_class_sysconfig omap2_hdq1w_sysc = {
@@ -320,7 +318,7 @@ struct omap_hwmod_class omap2_hdq1w_class = {
};
struct omap_hwmod_irq_info omap2_hdq1w_mpu_irqs[] = {
- { .irq = 58, },
- { .irq = -1 }
+ { .irq = 58 + OMAP_INTC_START, },
+ { .irq = -1 },
};
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index afad69c6ba6e..ceb305242340 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -10,21 +10,19 @@
*/
#include <plat/omap_hwmod.h>
#include <plat/serial.h>
-#include <plat/gpio.h>
+#include <linux/platform_data/gpio-omap.h>
#include <plat/dma.h>
#include <plat/dmtimer.h>
#include <plat/mcspi.h>
-#include <mach/irqs.h>
-
#include "omap_hwmod_common_data.h"
#include "cm-regbits-24xx.h"
#include "prm-regbits-24xx.h"
#include "wd_timer.h"
struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = {
- { .irq = 48, },
- { .irq = -1 }
+ { .irq = 48 + OMAP_INTC_START, },
+ { .irq = -1 },
};
struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index c9e38200216b..75fbbac13921 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -15,26 +15,26 @@
* XXX these should be marked initdata for multi-OMAP kernels
*/
#include <linux/power/smartreflex.h>
+#include <linux/platform_data/gpio-omap.h>
#include <plat/omap_hwmod.h>
-#include <mach/irqs.h>
-#include <plat/cpu.h>
#include <plat/dma.h>
#include <plat/serial.h>
#include <plat/l3_3xxx.h>
#include <plat/l4_3xxx.h>
#include <plat/i2c.h>
-#include <plat/gpio.h>
#include <plat/mmc.h>
#include <plat/mcbsp.h>
#include <plat/mcspi.h>
#include <plat/dmtimer.h>
+#include <mach/am35xx.h>
+
+#include "soc.h"
#include "omap_hwmod_common_data.h"
#include "prm-regbits-34xx.h"
#include "cm-regbits-34xx.h"
#include "wd_timer.h"
-#include <mach/am35xx.h>
/*
* OMAP3xxx hardware module integration data
@@ -51,9 +51,9 @@
/* L3 */
static struct omap_hwmod_irq_info omap3xxx_l3_main_irqs[] = {
- { .irq = INT_34XX_L3_DBG_IRQ },
- { .irq = INT_34XX_L3_APP_IRQ },
- { .irq = -1 }
+ { .irq = 9 + OMAP_INTC_START, },
+ { .irq = 10 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap3xxx_l3_main_hwmod = {
@@ -355,8 +355,8 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {
/* timer12 */
static struct omap_hwmod_irq_info omap3xxx_timer12_mpu_irqs[] = {
- { .irq = 95, },
- { .irq = -1 }
+ { .irq = 95 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap3xxx_timer12_hwmod = {
@@ -490,8 +490,8 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
/* UART4 */
static struct omap_hwmod_irq_info uart4_mpu_irqs[] = {
- { .irq = INT_36XX_UART4_IRQ, },
- { .irq = -1 }
+ { .irq = 80 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info uart4_sdma_reqs[] = {
@@ -518,8 +518,8 @@ static struct omap_hwmod omap36xx_uart4_hwmod = {
};
static struct omap_hwmod_irq_info am35xx_uart4_mpu_irqs[] = {
- { .irq = INT_35XX_UART4_IRQ, },
- { .irq = -1 }
+ { .irq = 84 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info am35xx_uart4_sdma_reqs[] = {
@@ -674,8 +674,8 @@ static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = {
};
static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = {
- { .irq = 25 },
- { .irq = -1 }
+ { .irq = 25 + OMAP_INTC_START, },
+ { .irq = -1 },
};
/* dss_dsi1 */
@@ -804,8 +804,8 @@ static struct omap_i2c_dev_attr i2c3_dev_attr = {
};
static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = {
- { .irq = INT_34XX_I2C3_IRQ, },
- { .irq = -1 }
+ { .irq = 61 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = {
@@ -963,8 +963,8 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = {
/* gpio5 */
static struct omap_hwmod_irq_info omap3xxx_gpio5_irqs[] = {
- { .irq = 33 }, /* INT_34XX_GPIO_BANK5 */
- { .irq = -1 }
+ { .irq = 33 + OMAP_INTC_START, }, /* INT_34XX_GPIO_BANK5 */
+ { .irq = -1 },
};
static struct omap_hwmod_opt_clk gpio5_opt_clks[] = {
@@ -993,8 +993,8 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = {
/* gpio6 */
static struct omap_hwmod_irq_info omap3xxx_gpio6_irqs[] = {
- { .irq = 34 }, /* INT_34XX_GPIO_BANK6 */
- { .irq = -1 }
+ { .irq = 34 + OMAP_INTC_START, }, /* INT_34XX_GPIO_BANK6 */
+ { .irq = -1 },
};
static struct omap_hwmod_opt_clk gpio6_opt_clks[] = {
@@ -1098,10 +1098,10 @@ static struct omap_hwmod_opt_clk mcbsp234_opt_clks[] = {
/* mcbsp1 */
static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = {
- { .name = "common", .irq = 16 },
- { .name = "tx", .irq = 59 },
- { .name = "rx", .irq = 60 },
- { .irq = -1 }
+ { .name = "common", .irq = 16 + OMAP_INTC_START, },
+ { .name = "tx", .irq = 59 + OMAP_INTC_START, },
+ { .name = "rx", .irq = 60 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
@@ -1125,10 +1125,10 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
/* mcbsp2 */
static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = {
- { .name = "common", .irq = 17 },
- { .name = "tx", .irq = 62 },
- { .name = "rx", .irq = 63 },
- { .irq = -1 }
+ { .name = "common", .irq = 17 + OMAP_INTC_START, },
+ { .name = "tx", .irq = 62 + OMAP_INTC_START, },
+ { .name = "rx", .irq = 63 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_mcbsp_dev_attr omap34xx_mcbsp2_dev_attr = {
@@ -1157,10 +1157,10 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
/* mcbsp3 */
static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = {
- { .name = "common", .irq = 22 },
- { .name = "tx", .irq = 89 },
- { .name = "rx", .irq = 90 },
- { .irq = -1 }
+ { .name = "common", .irq = 22 + OMAP_INTC_START, },
+ { .name = "tx", .irq = 89 + OMAP_INTC_START, },
+ { .name = "rx", .irq = 90 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_mcbsp_dev_attr omap34xx_mcbsp3_dev_attr = {
@@ -1189,10 +1189,10 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
/* mcbsp4 */
static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = {
- { .name = "common", .irq = 23 },
- { .name = "tx", .irq = 54 },
- { .name = "rx", .irq = 55 },
- { .irq = -1 }
+ { .name = "common", .irq = 23 + OMAP_INTC_START, },
+ { .name = "tx", .irq = 54 + OMAP_INTC_START, },
+ { .name = "rx", .irq = 55 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = {
@@ -1222,10 +1222,10 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
/* mcbsp5 */
static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = {
- { .name = "common", .irq = 27 },
- { .name = "tx", .irq = 81 },
- { .name = "rx", .irq = 82 },
- { .irq = -1 }
+ { .name = "common", .irq = 27 + OMAP_INTC_START, },
+ { .name = "tx", .irq = 81 + OMAP_INTC_START, },
+ { .name = "rx", .irq = 82 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = {
@@ -1267,8 +1267,8 @@ static struct omap_hwmod_class omap3xxx_mcbsp_sidetone_hwmod_class = {
/* mcbsp2_sidetone */
static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = {
- { .name = "irq", .irq = 4 },
- { .irq = -1 }
+ { .name = "irq", .irq = 4 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
@@ -1289,8 +1289,8 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
/* mcbsp3_sidetone */
static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = {
- { .name = "irq", .irq = 5 },
- { .irq = -1 }
+ { .name = "irq", .irq = 5 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {
@@ -1352,8 +1352,8 @@ static struct omap_smartreflex_dev_attr sr1_dev_attr = {
};
static struct omap_hwmod_irq_info omap3_smartreflex_mpu_irqs[] = {
- { .irq = 18 },
- { .irq = -1 }
+ { .irq = 18 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap34xx_sr1_hwmod = {
@@ -1397,8 +1397,8 @@ static struct omap_smartreflex_dev_attr sr2_dev_attr = {
};
static struct omap_hwmod_irq_info omap3_smartreflex_core_irqs[] = {
- { .irq = 19 },
- { .irq = -1 }
+ { .irq = 19 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap34xx_sr2_hwmod = {
@@ -1458,8 +1458,8 @@ static struct omap_hwmod_class omap3xxx_mailbox_hwmod_class = {
};
static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = {
- { .irq = 26 },
- { .irq = -1 }
+ { .irq = 26 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap3xxx_mailbox_hwmod = {
@@ -1549,8 +1549,8 @@ static struct omap_hwmod omap34xx_mcspi2 = {
/* mcspi3 */
static struct omap_hwmod_irq_info omap34xx_mcspi3_mpu_irqs[] = {
- { .name = "irq", .irq = 91 }, /* 91 */
- { .irq = -1 }
+ { .name = "irq", .irq = 91 + OMAP_INTC_START, }, /* 91 */
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = {
@@ -1585,8 +1585,8 @@ static struct omap_hwmod omap34xx_mcspi3 = {
/* mcspi4 */
static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = {
- { .name = "irq", .irq = INT_34XX_SPI4_IRQ }, /* 48 */
- { .irq = -1 }
+ { .name = "irq", .irq = 48 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = {
@@ -1638,9 +1638,9 @@ static struct omap_hwmod_class usbotg_class = {
/* usb_otg_hs */
static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = {
- { .name = "mc", .irq = 92 },
- { .name = "dma", .irq = 93 },
- { .irq = -1 }
+ { .name = "mc", .irq = 92 + OMAP_INTC_START, },
+ { .name = "dma", .irq = 93 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
@@ -1670,8 +1670,8 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
/* usb_otg_hs */
static struct omap_hwmod_irq_info am35xx_usbhsotg_mpu_irqs[] = {
- { .name = "mc", .irq = 71 },
- { .irq = -1 }
+ { .name = "mc", .irq = 71 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_class am35xx_usbotg_class = {
@@ -1706,8 +1706,8 @@ static struct omap_hwmod_class omap34xx_mmc_class = {
/* MMC/SD/SDIO1 */
static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = {
- { .irq = 83, },
- { .irq = -1 }
+ { .irq = 83 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = {
@@ -1773,8 +1773,8 @@ static struct omap_hwmod omap3xxx_es3plus_mmc1_hwmod = {
/* MMC/SD/SDIO2 */
static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = {
- { .irq = INT_24XX_MMC2_IRQ, },
- { .irq = -1 }
+ { .irq = 86 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = {
@@ -1834,8 +1834,8 @@ static struct omap_hwmod omap3xxx_es3plus_mmc2_hwmod = {
/* MMC/SD/SDIO3 */
static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = {
- { .irq = 94, },
- { .irq = -1 }
+ { .irq = 94 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = {
@@ -1893,9 +1893,9 @@ static struct omap_hwmod_opt_clk omap3xxx_usb_host_hs_opt_clks[] = {
};
static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = {
- { .name = "ohci-irq", .irq = 76 },
- { .name = "ehci-irq", .irq = 77 },
- { .irq = -1 }
+ { .name = "ohci-irq", .irq = 76 + OMAP_INTC_START, },
+ { .name = "ehci-irq", .irq = 77 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
@@ -1987,8 +1987,8 @@ static struct omap_hwmod_class omap3xxx_usb_tll_hs_hwmod_class = {
};
static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = {
- { .name = "tll-irq", .irq = 78 },
- { .irq = -1 }
+ { .name = "tll-irq", .irq = 78 + OMAP_INTC_START, },
+ { .irq = -1 },
};
static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
@@ -3214,11 +3214,11 @@ static struct omap_hwmod_ocp_if am35xx_l4_core__mdio = {
};
static struct omap_hwmod_irq_info am35xx_emac_mpu_irqs[] = {
- { .name = "rxthresh", .irq = INT_35XX_EMAC_C0_RXTHRESH_IRQ },
- { .name = "rx_pulse", .irq = INT_35XX_EMAC_C0_RX_PULSE_IRQ },
- { .name = "tx_pulse", .irq = INT_35XX_EMAC_C0_TX_PULSE_IRQ },
- { .name = "misc_pulse", .irq = INT_35XX_EMAC_C0_MISC_PULSE_IRQ },
- { .irq = -1 }
+ { .name = "rxthresh", .irq = 67 + OMAP_INTC_START, },
+ { .name = "rx_pulse", .irq = 68 + OMAP_INTC_START, },
+ { .name = "tx_pulse", .irq = 69 + OMAP_INTC_START },
+ { .name = "misc_pulse", .irq = 70 + OMAP_INTC_START },
+ { .irq = -1 },
};
static struct omap_hwmod_class am35xx_emac_class = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 242aee498ceb..b95244b76a15 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -19,12 +19,11 @@
*/
#include <linux/io.h>
+#include <linux/platform_data/gpio-omap.h>
#include <linux/power/smartreflex.h>
#include <plat/omap_hwmod.h>
-#include <plat/cpu.h>
#include <plat/i2c.h>
-#include <plat/gpio.h>
#include <plat/dma.h>
#include <plat/mcspi.h>
#include <plat/mcbsp.h>
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
index e7e8eeae95e5..dddb677fed68 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
@@ -16,6 +16,7 @@
#include <plat/omap_hwmod.h>
+#include "common.h"
#include "display.h"
/* Common address space across OMAP2xxx */
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index d15225ff5c49..f447e02102bb 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -28,6 +28,7 @@
#include <linux/kernel.h>
#include <linux/slab.h>
+#include "soc.h"
#include "omap_l3_noc.h"
/*
@@ -190,7 +191,7 @@ static int __devinit omap4_l3_probe(struct platform_device *pdev)
IRQF_DISABLED, "l3-dbg-irq", l3);
if (ret) {
pr_crit("L3: request_irq failed to register for 0x%x\n",
- OMAP44XX_IRQ_L3_DBG);
+ 9 + OMAP44XX_IRQ_GIC_START);
goto err3;
}
@@ -200,7 +201,7 @@ static int __devinit omap4_l3_probe(struct platform_device *pdev)
IRQF_DISABLED, "l3-app-irq", l3);
if (ret) {
pr_crit("L3: request_irq failed to register for 0x%x\n",
- OMAP44XX_IRQ_L3_APP);
+ 10 + OMAP44XX_IRQ_GIC_START);
goto err4;
}
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index d52651a05daa..593eaea35cec 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -29,6 +29,8 @@
#include <linux/usb.h>
#include <plat/usb.h>
+
+#include "soc.h"
#include "control.h"
/* OMAP control module register for UTMI PHY */
diff --git a/arch/arm/mach-omap2/opp2420_data.c b/arch/arm/mach-omap2/opp2420_data.c
index 5037e76e4e23..a9e8cf21705d 100644
--- a/arch/arm/mach-omap2/opp2420_data.c
+++ b/arch/arm/mach-omap2/opp2420_data.c
@@ -28,7 +28,7 @@
* http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/
*/
-#include <plat/hardware.h>
+#include <linux/kernel.h>
#include "opp2xxx.h"
#include "sdrc.h"
diff --git a/arch/arm/mach-omap2/opp2430_data.c b/arch/arm/mach-omap2/opp2430_data.c
index 750805c528d8..0e75ec3e114b 100644
--- a/arch/arm/mach-omap2/opp2430_data.c
+++ b/arch/arm/mach-omap2/opp2430_data.c
@@ -26,7 +26,7 @@
* This is technically part of the OMAP2xxx clock code.
*/
-#include <plat/hardware.h>
+#include <linux/kernel.h>
#include "opp2xxx.h"
#include "sdrc.h"
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c
index d95f3f945d4a..75cef5f67a8a 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -19,8 +19,6 @@
*/
#include <linux/module.h>
-#include <plat/cpu.h>
-
#include "control.h"
#include "omap_opp_data.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c
index c95415da23c2..a9fd6d5fe79e 100644
--- a/arch/arm/mach-omap2/opp4xxx_data.c
+++ b/arch/arm/mach-omap2/opp4xxx_data.c
@@ -20,8 +20,7 @@
*/
#include <linux/module.h>
-#include <plat/cpu.h>
-
+#include "soc.h"
#include "control.h"
#include "omap_opp_data.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 814bcd901596..3e1345fc0713 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -28,7 +28,6 @@
#include <linux/slab.h>
#include <plat/clock.h>
-#include <plat/board.h>
#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/dmtimer.h>
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 2edeffc923a6..8af6cd6ac331 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -29,6 +29,7 @@
#include <linux/irq.h>
#include <linux/time.h>
#include <linux/gpio.h>
+#include <linux/platform_data/gpio-omap.h>
#include <asm/mach/time.h>
#include <asm/mach/irq.h>
@@ -38,9 +39,6 @@
#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/dma.h>
-#include <plat/board.h>
-
-#include <mach/irqs.h>
#include "common.h"
#include "prm2xxx_3xxx.h"
@@ -352,16 +350,6 @@ int __init omap2_pm_init(void)
prcm_setup_regs();
- /* Hack to prevent MPU retention when STI console is enabled. */
- {
- const struct omap_sti_console_config *sti;
-
- sti = omap_get_config(OMAP_TAG_STI_CONSOLE,
- struct omap_sti_console_config);
- if (sti != NULL && sti->enable)
- sti_console_enabled = 1;
- }
-
/*
* We copy the assembler sleep/wakeup routines to SRAM.
* These routines need to be in SRAM as that's the only
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 05bd8f02723f..90480f759974 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -28,6 +28,8 @@
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/slab.h>
+#include <linux/platform_data/gpio-omap.h>
+
#include <trace/events/power.h>
#include <asm/suspend.h>
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 69b36e185e9b..ca5be83d5019 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -28,11 +28,13 @@
#include "prm44xx.h"
#include <asm/cpu.h>
-#include <plat/cpu.h>
+
+#include <plat/prcm.h>
+
#include "powerdomain.h"
#include "clockdomain.h"
-#include <plat/prcm.h>
+#include "soc.h"
#include "pm.h"
#define PWRDM_TRACE_STATES_FLAG (1<<31)
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index bb883e463078..8b23d234fb55 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -15,11 +15,9 @@
#include <linux/init.h>
#include <linux/bug.h>
-#include <plat/cpu.h>
-
+#include "soc.h"
#include "powerdomain.h"
#include "powerdomains2xxx_3xxx_data.h"
-
#include "prcm-common.h"
#include "prm2xxx_3xxx.h"
#include "prm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 053e24ed3c48..9c9d23c10205 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -27,7 +27,6 @@
#include "common.h"
#include <plat/prcm.h>
-#include <plat/irqs.h>
#include "clock.h"
#include "clock2xxx.h"
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index a0309dea6794..9529984d8d2b 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -17,11 +17,10 @@
#include <linux/io.h>
#include <linux/irq.h>
-#include "common.h"
-#include <plat/cpu.h>
#include <plat/prcm.h>
-#include <plat/irqs.h>
+#include "soc.h"
+#include "common.h"
#include "vp.h"
#include "prm2xxx_3xxx.h"
@@ -40,7 +39,7 @@ static struct omap_prcm_irq_setup omap3_prcm_irq_setup = {
.nr_regs = 1,
.irqs = omap3_prcm_irqs,
.nr_irqs = ARRAY_SIZE(omap3_prcm_irqs),
- .irq = INT_34XX_PRCM_MPU_IRQ,
+ .irq = 11 + OMAP_INTC_START,
.read_pending_irqs = &omap3xxx_prm_read_pending_irqs,
.ocp_barrier = &omap3xxx_prm_ocp_barrier,
.save_and_clear_irqen = &omap3xxx_prm_save_and_clear_irqen,
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index bb727c2d9337..f0c4d5f4a174 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -17,10 +17,9 @@
#include <linux/err.h>
#include <linux/io.h>
-#include <plat/cpu.h>
-#include <plat/irqs.h>
#include <plat/prcm.h>
+#include "soc.h"
#include "iomap.h"
#include "common.h"
#include "vp.h"
@@ -40,7 +39,7 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
.nr_regs = 2,
.irqs = omap4_prcm_irqs,
.nr_irqs = ARRAY_SIZE(omap4_prcm_irqs),
- .irq = OMAP44XX_IRQ_PRCM,
+ .irq = 11 + OMAP44XX_IRQ_GIC_START,
.read_pending_irqs = &omap44xx_prm_read_pending_irqs,
.ocp_barrier = &omap44xx_prm_ocp_barrier,
.save_and_clear_irqen = &omap44xx_prm_save_and_clear_irqen,
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 03b126d9ad94..6b4d332be2f6 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -26,7 +26,6 @@
#include <plat/common.h>
#include <plat/prcm.h>
-#include <plat/irqs.h>
#include "prm2xxx_3xxx.h"
#include "prm44xx.h"
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index 1133bb2f632b..73e55e485329 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -24,11 +24,11 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/hardware.h>
#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/sdrc.h>
+#include "soc.h"
#include "iomap.h"
#include "common.h"
#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index c1b93c752d70..7ca266e987f6 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -29,11 +29,11 @@
#include <plat/omap-serial.h>
#include "common.h"
-#include <plat/board.h>
#include <plat/dma.h>
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
#include <plat/omap-pm.h>
+#include <plat/serial.h>
#include "prm2xxx_3xxx.h"
#include "pm.h"
@@ -81,8 +81,9 @@ static struct omap_uart_port_info omap_serial_default_info[] __initdata = {
};
#ifdef CONFIG_PM
-static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable)
+static void omap_uart_enable_wakeup(struct device *dev, bool enable)
{
+ struct platform_device *pdev = to_platform_device(dev);
struct omap_device *od = to_omap_device(pdev);
if (!od)
@@ -99,15 +100,17 @@ static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable)
* in Smartidle Mode When Configured for DMA Operations.
* WA: configure uart in force idle mode.
*/
-static void omap_uart_set_noidle(struct platform_device *pdev)
+static void omap_uart_set_noidle(struct device *dev)
{
+ struct platform_device *pdev = to_platform_device(dev);
struct omap_device *od = to_omap_device(pdev);
omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO);
}
-static void omap_uart_set_smartidle(struct platform_device *pdev)
+static void omap_uart_set_smartidle(struct device *dev)
{
+ struct platform_device *pdev = to_platform_device(dev);
struct omap_device *od = to_omap_device(pdev);
u8 idlemode;
@@ -120,10 +123,10 @@ static void omap_uart_set_smartidle(struct platform_device *pdev)
}
#else
-static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable)
+static void omap_uart_enable_wakeup(struct device *dev, bool enable)
{}
-static void omap_uart_set_noidle(struct platform_device *pdev) {}
-static void omap_uart_set_smartidle(struct platform_device *pdev) {}
+static void omap_uart_set_noidle(struct device *dev) {}
+static void omap_uart_set_smartidle(struct device *dev) {}
#endif /* CONFIG_PM */
#ifdef CONFIG_OMAP_MUX
@@ -304,6 +307,9 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
omap_up.dma_rx_timeout = info->dma_rx_timeout;
omap_up.dma_rx_poll_rate = info->dma_rx_poll_rate;
omap_up.autosuspend_timeout = info->autosuspend_timeout;
+ omap_up.DTR_gpio = info->DTR_gpio;
+ omap_up.DTR_inverted = info->DTR_inverted;
+ omap_up.DTR_present = info->DTR_present;
pdata = &omap_up;
pdata_size = sizeof(struct omap_uart_port_info);
diff --git a/arch/arm/mach-omap2/sleep24xx.S b/arch/arm/mach-omap2/sleep24xx.S
index d4bf904d84ab..ce0ccd26efbd 100644
--- a/arch/arm/mach-omap2/sleep24xx.S
+++ b/arch/arm/mach-omap2/sleep24xx.S
@@ -28,8 +28,7 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
-#include <plat/omap24xx.h>
-
+#include "omap24xx.h"
#include "sdrc.h"
/* First address of reserved address space? apparently valid for OMAP2 & 3 */
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 1f62f23673fb..506987979c1c 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -26,9 +26,9 @@
#include <asm/assembler.h>
-#include <plat/hardware.h>
#include <plat/sram.h>
+#include "omap34xx.h"
#include "iomap.h"
#include "cm2xxx_3xxx.h"
#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index 91e71d8f46f0..b7d8ead4b86a 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -14,10 +14,10 @@
#include <asm/memory.h>
#include <asm/hardware/cache-l2x0.h>
-#include <plat/omap44xx.h>
#include <mach/omap-secure.h>
#include "common.h"
+#include "omap44xx.h"
#include "omap4-sar-layout.h"
#if defined(CONFIG_SMP) && defined(CONFIG_PM)
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
new file mode 100644
index 000000000000..fc9b96daf851
--- /dev/null
+++ b/arch/arm/mach-omap2/soc.h
@@ -0,0 +1,7 @@
+#include <plat/cpu.h>
+#include "omap24xx.h"
+#include "omap34xx.h"
+#include "omap44xx.h"
+#include "ti81xx.h"
+#include "am33xx.h"
+#include "omap54xx.h"
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S
index ee0bfcc1410f..8f7326cd435b 100644
--- a/arch/arm/mach-omap2/sram242x.S
+++ b/arch/arm/mach-omap2/sram242x.S
@@ -32,8 +32,7 @@
#include <asm/assembler.h>
-#include <mach/hardware.h>
-
+#include "soc.h"
#include "iomap.h"
#include "prm2xxx_3xxx.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S
index d4d39ef04769..b140d6578529 100644
--- a/arch/arm/mach-omap2/sram243x.S
+++ b/arch/arm/mach-omap2/sram243x.S
@@ -32,8 +32,7 @@
#include <asm/assembler.h>
-#include <mach/hardware.h>
-
+#include "soc.h"
#include "iomap.h"
#include "prm2xxx_3xxx.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S
index df5a21322b0a..2d0ceaa23fb8 100644
--- a/arch/arm/mach-omap2/sram34xx.S
+++ b/arch/arm/mach-omap2/sram34xx.S
@@ -29,8 +29,7 @@
#include <asm/assembler.h>
-#include <mach/hardware.h>
-
+#include "soc.h"
#include "iomap.h"
#include "sdrc.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/plat-omap/include/plat/ti81xx.h b/arch/arm/mach-omap2/ti81xx.h
index 8f9843f78422..8f9843f78422 100644
--- a/arch/arm/plat-omap/include/plat/ti81xx.h
+++ b/arch/arm/mach-omap2/ti81xx.h
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 2ff6d41ec6c6..e2084facca59 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -36,16 +36,19 @@
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/slab.h>
+#include <linux/of.h>
#include <asm/mach/time.h>
-#include <plat/dmtimer.h>
#include <asm/smp_twd.h>
#include <asm/sched_clock.h>
-#include "common.h"
+
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
+#include <plat/dmtimer.h>
#include <plat/omap-pm.h>
+#include "soc.h"
+#include "common.h"
#include "powerdomain.h"
/* Parent clocks, eventually these will come from the clock framework */
@@ -373,8 +376,7 @@ OMAP_SYS_TIMER(3_am33xx)
#ifdef CONFIG_ARCH_OMAP4
#ifdef CONFIG_LOCAL_TIMERS
static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
- OMAP44XX_LOCAL_TWD_BASE,
- OMAP44XX_IRQ_LOCALTIMER);
+ OMAP44XX_LOCAL_TWD_BASE, 29 + OMAP_INTC_START);
#endif
static void __init omap4_timer_init(void)
@@ -386,6 +388,11 @@ static void __init omap4_timer_init(void)
if (omap_rev() != OMAP4430_REV_ES1_0) {
int err;
+ if (of_have_populated_dt()) {
+ twd_local_timer_of_register();
+ return;
+ }
+
err = twd_local_timer_register(&twd_local_timer);
if (err)
pr_err("twd_local_timer_register failed %d\n", err);
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index db5ff6642375..99be94e94547 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -29,6 +29,7 @@
#include <plat/i2c.h>
#include <plat/usb.h>
+#include "soc.h"
#include "twl-common.h"
#include "pm.h"
#include "voltage.h"
@@ -84,7 +85,7 @@ void __init omap4_pmic_init(const char *pmic_type,
omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
strncpy(omap4_i2c1_board_info[0].type, pmic_type,
sizeof(omap4_i2c1_board_info[0].type));
- omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N;
+ omap4_i2c1_board_info[0].irq = 7 + OMAP44XX_IRQ_GIC_START;
omap4_i2c1_board_info[0].platform_data = pmic_data;
/* TWL6040 audio IC part */
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
index 8fe71cfd002c..d109c09ef34b 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -1,7 +1,7 @@
#ifndef __OMAP_PMIC_COMMON__
#define __OMAP_PMIC_COMMON__
-#include <plat/irqs.h>
+#include "common.h"
#define TWL_COMMON_PDATA_USB (1 << 0)
#define TWL_COMMON_PDATA_BCI (1 << 1)
@@ -40,13 +40,13 @@ void omap_pmic_late_init(void);
static inline void omap2_pmic_init(const char *pmic_type,
struct twl4030_platform_data *pmic_data)
{
- omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, pmic_data);
+ omap_pmic_init(2, 2600, pmic_type, 7 + OMAP_INTC_START, pmic_data);
}
static inline void omap3_pmic_init(const char *pmic_type,
struct twl4030_platform_data *pmic_data)
{
- omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data);
+ omap_pmic_init(1, 2600, pmic_type, 7 + OMAP_INTC_START, pmic_data);
}
void omap4_pmic_init(const char *pmic_type,
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index dde8a11f47d5..ac95daaa4702 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -25,8 +25,6 @@
#include <asm/io.h>
-#include <mach/hardware.h>
-#include <mach/irqs.h>
#include <plat/usb.h>
#include <plat/omap_device.h>
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index c4a576856661..89150b2435e5 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -23,14 +23,13 @@
#include <linux/clk.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>
-
#include <linux/usb/musb.h>
-#include <mach/hardware.h>
-#include <mach/irqs.h>
-#include <mach/am35xx.h>
#include <plat/usb.h>
#include <plat/omap_device.h>
+
+#include <mach/am35xx.h>
+
#include "mux.h"
static struct musb_hdrc_config musb_config = {
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 84da34f9a7cf..b451f3c13292 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -12,8 +12,7 @@
#include <linux/init.h>
#include <linux/bug.h>
-#include <plat/cpu.h>
-
+#include "soc.h"
#include "voltage.h"
#include "vc.h"
#include "prm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index d0103c80d040..63afbfed3cbc 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -18,9 +18,8 @@
#include <linux/err.h>
#include <linux/init.h>
+#include "soc.h"
#include "common.h"
-#include <plat/cpu.h>
-
#include "prm-regbits-34xx.h"
#include "omap_opp_data.h"
#include "voltage.h"
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index cf10f92856dc..453a6e50db8b 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -520,13 +520,14 @@ static struct platform_device hdmi_lcdc_device = {
};
/* GPIO KEY */
-#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
+#define GPIO_KEY(c, g, d, ...) \
+ { .code = c, .gpio = g, .desc = d, .active_low = 1, __VA_ARGS__ }
static struct gpio_keys_button gpio_buttons[] = {
- GPIO_KEY(KEY_POWER, GPIO_PORT99, "SW1"),
- GPIO_KEY(KEY_BACK, GPIO_PORT100, "SW2"),
- GPIO_KEY(KEY_MENU, GPIO_PORT97, "SW3"),
- GPIO_KEY(KEY_HOME, GPIO_PORT98, "SW4"),
+ GPIO_KEY(KEY_POWER, GPIO_PORT99, "SW3", .wakeup = 1),
+ GPIO_KEY(KEY_BACK, GPIO_PORT100, "SW4"),
+ GPIO_KEY(KEY_MENU, GPIO_PORT97, "SW5"),
+ GPIO_KEY(KEY_HOME, GPIO_PORT98, "SW6"),
};
static struct gpio_keys_platform_data gpio_key_info = {
@@ -901,8 +902,8 @@ static struct platform_device *eva_devices[] __initdata = {
&camera_device,
&ceu0_device,
&fsi_device,
- &fsi_hdmi_device,
&fsi_wm8978_device,
+ &fsi_hdmi_device,
};
static void __init eva_clock_init(void)
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 7ea2b31e3199..c129542f6aed 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -695,6 +695,7 @@ static struct platform_device usbhs0_device = {
* - J30 "open"
* - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET
* - add .get_vbus = usbhs_get_vbus in usbhs1_private
+ * - check usbhs0_device(pio)/usbhs1_device(irq) order in mackerel_devices.
*/
#define IRQ8 evt2irq(0x0300)
#define USB_PHY_MODE (1 << 4)
@@ -1325,8 +1326,8 @@ static struct platform_device *mackerel_devices[] __initdata = {
&nor_flash_device,
&smc911x_device,
&lcdc_device,
- &usbhs1_device,
&usbhs0_device,
+ &usbhs1_device,
&leds_device,
&fsi_device,
&fsi_ak4643_device,
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index 3a528cf4366c..fcf5a47f4772 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -67,7 +67,7 @@ static struct smsc911x_platform_config smsc911x_platdata = {
static struct platform_device eth_device = {
.name = "smsc911x",
- .id = 0,
+ .id = -1,
.dev = {
.platform_data = &smsc911x_platdata,
},
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index ee447404c857..588555a67d9c 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -259,9 +259,9 @@ static int sh73a0_set_wake(struct irq_data *data, unsigned int on)
return 0; /* always allow wakeup */
}
-#define RELOC_BASE 0x1000
+#define RELOC_BASE 0x1200
-/* INTCA IRQ pins at INTCS + 0x1000 to make space for GIC+INTC handling */
+/* INTCA IRQ pins at INTCS + RELOC_BASE to make space for GIC+INTC handling */
#define INTCS_VECT_RELOC(n, vect) INTCS_VECT((n), (vect) + RELOC_BASE)
INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000,
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index a534d8880de1..1d2e3c6f8b59 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -524,33 +524,12 @@ static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
};
#endif
-#define PRCC_K_SOFTRST_SET 0x18
-#define PRCC_K_SOFTRST_CLEAR 0x1C
-static void ux500_uart0_reset(void)
-{
- void __iomem *prcc_rst_set, *prcc_rst_clr;
-
- prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
- PRCC_K_SOFTRST_SET);
- prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
- PRCC_K_SOFTRST_CLEAR);
-
- /* Activate soft reset PRCC_K_SOFTRST_CLEAR */
- writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr);
- udelay(1);
-
- /* Release soft reset PRCC_K_SOFTRST_SET */
- writel((readl(prcc_rst_set) | 0x1), prcc_rst_set);
- udelay(1);
-}
-
static struct amba_pl011_data uart0_plat = {
#ifdef CONFIG_STE_DMA40
.dma_filter = stedma40_filter,
.dma_rx_param = &uart0_dma_cfg_rx,
.dma_tx_param = &uart0_dma_cfg_tx,
#endif
- .reset = ux500_uart0_reset,
};
static struct amba_pl011_data uart1_plat = {
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 4e7d1182e8a3..051204fc4617 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -267,17 +267,19 @@ static void __dma_free_remap(void *cpu_addr, size_t size)
vunmap(cpu_addr);
}
+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
+
struct dma_pool {
size_t size;
spinlock_t lock;
unsigned long *bitmap;
unsigned long nr_pages;
void *vaddr;
- struct page *page;
+ struct page **pages;
};
static struct dma_pool atomic_pool = {
- .size = SZ_256K,
+ .size = DEFAULT_DMA_COHERENT_POOL_SIZE,
};
static int __init early_coherent_pool(char *p)
@@ -287,6 +289,21 @@ static int __init early_coherent_pool(char *p)
}
early_param("coherent_pool", early_coherent_pool);
+void __init init_dma_coherent_pool_size(unsigned long size)
+{
+ /*
+ * Catch any attempt to set the pool size too late.
+ */
+ BUG_ON(atomic_pool.vaddr);
+
+ /*
+ * Set architecture specific coherent pool size only if
+ * it has not been changed by kernel command line parameter.
+ */
+ if (atomic_pool.size == DEFAULT_DMA_COHERENT_POOL_SIZE)
+ atomic_pool.size = size;
+}
+
/*
* Initialise the coherent pool for atomic allocations.
*/
@@ -297,6 +314,7 @@ static int __init atomic_pool_init(void)
unsigned long nr_pages = pool->size >> PAGE_SHIFT;
unsigned long *bitmap;
struct page *page;
+ struct page **pages;
void *ptr;
int bitmap_size = BITS_TO_LONGS(nr_pages) * sizeof(long);
@@ -304,21 +322,31 @@ static int __init atomic_pool_init(void)
if (!bitmap)
goto no_bitmap;
+ pages = kzalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
+ if (!pages)
+ goto no_pages;
+
if (IS_ENABLED(CONFIG_CMA))
ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page);
else
ptr = __alloc_remap_buffer(NULL, pool->size, GFP_KERNEL, prot,
&page, NULL);
if (ptr) {
+ int i;
+
+ for (i = 0; i < nr_pages; i++)
+ pages[i] = page + i;
+
spin_lock_init(&pool->lock);
pool->vaddr = ptr;
- pool->page = page;
+ pool->pages = pages;
pool->bitmap = bitmap;
pool->nr_pages = nr_pages;
pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
(unsigned)pool->size / 1024);
return 0;
}
+no_pages:
kfree(bitmap);
no_bitmap:
pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
@@ -443,27 +471,45 @@ static void *__alloc_from_pool(size_t size, struct page **ret_page)
if (pageno < pool->nr_pages) {
bitmap_set(pool->bitmap, pageno, count);
ptr = pool->vaddr + PAGE_SIZE * pageno;
- *ret_page = pool->page + pageno;
+ *ret_page = pool->pages[pageno];
+ } else {
+ pr_err_once("ERROR: %u KiB atomic DMA coherent pool is too small!\n"
+ "Please increase it with coherent_pool= kernel parameter!\n",
+ (unsigned)pool->size / 1024);
}
spin_unlock_irqrestore(&pool->lock, flags);
return ptr;
}
+static bool __in_atomic_pool(void *start, size_t size)
+{
+ struct dma_pool *pool = &atomic_pool;
+ void *end = start + size;
+ void *pool_start = pool->vaddr;
+ void *pool_end = pool->vaddr + pool->size;
+
+ if (start < pool_start || start > pool_end)
+ return false;
+
+ if (end <= pool_end)
+ return true;
+
+ WARN(1, "Wrong coherent size(%p-%p) from atomic pool(%p-%p)\n",
+ start, end - 1, pool_start, pool_end - 1);
+
+ return false;
+}
+
static int __free_from_pool(void *start, size_t size)
{
struct dma_pool *pool = &atomic_pool;
unsigned long pageno, count;
unsigned long flags;
- if (start < pool->vaddr || start > pool->vaddr + pool->size)
+ if (!__in_atomic_pool(start, size))
return 0;
- if (start + size > pool->vaddr + pool->size) {
- WARN(1, "freeing wrong coherent size from pool\n");
- return 0;
- }
-
pageno = (start - pool->vaddr) >> PAGE_SHIFT;
count = size >> PAGE_SHIFT;
@@ -1090,10 +1136,22 @@ static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t si
return 0;
}
+static struct page **__atomic_get_pages(void *addr)
+{
+ struct dma_pool *pool = &atomic_pool;
+ struct page **pages = pool->pages;
+ int offs = (addr - pool->vaddr) >> PAGE_SHIFT;
+
+ return pages + offs;
+}
+
static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
{
struct vm_struct *area;
+ if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
+ return __atomic_get_pages(cpu_addr);
+
if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
return cpu_addr;
@@ -1103,6 +1161,34 @@ static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
return NULL;
}
+static void *__iommu_alloc_atomic(struct device *dev, size_t size,
+ dma_addr_t *handle)
+{
+ struct page *page;
+ void *addr;
+
+ addr = __alloc_from_pool(size, &page);
+ if (!addr)
+ return NULL;
+
+ *handle = __iommu_create_mapping(dev, &page, size);
+ if (*handle == DMA_ERROR_CODE)
+ goto err_mapping;
+
+ return addr;
+
+err_mapping:
+ __free_from_pool(addr, size);
+ return NULL;
+}
+
+static void __iommu_free_atomic(struct device *dev, struct page **pages,
+ dma_addr_t handle, size_t size)
+{
+ __iommu_remove_mapping(dev, handle, size);
+ __free_from_pool(page_address(pages[0]), size);
+}
+
static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
{
@@ -1113,6 +1199,9 @@ static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
*handle = DMA_ERROR_CODE;
size = PAGE_ALIGN(size);
+ if (gfp & GFP_ATOMIC)
+ return __iommu_alloc_atomic(dev, size, handle);
+
pages = __iommu_alloc_buffer(dev, size, gfp);
if (!pages)
return NULL;
@@ -1179,6 +1268,11 @@ void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
return;
}
+ if (__in_atomic_pool(cpu_addr, size)) {
+ __iommu_free_atomic(dev, pages, handle, size);
+ return;
+ }
+
if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
unmap_kernel_range((unsigned long)cpu_addr, size);
vunmap(cpu_addr);
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index dd36eba9506c..d15a4a6d6146 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -25,6 +25,7 @@ config ARCH_OMAP2PLUS
bool "TI OMAP2/3/4"
select CLKDEV_LOOKUP
select GENERIC_IRQ_CHIP
+ select SPARSE_IRQ
select OMAP_DM_TIMER
select USE_OF
select PROC_DEVICETREE if PROC_FS
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 961bf859bc0c..a017e994e006 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -3,8 +3,7 @@
#
# Common support
-obj-y := common.o sram.o clock.o devices.o dma.o mux.o \
- fb.o counter_32k.o
+obj-y := common.o sram.o clock.o dma.o mux.o fb.o counter_32k.o
obj-m :=
obj-n :=
obj- :=
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 89a3723b3538..e5778ed689d8 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -17,52 +17,12 @@
#include <linux/dma-mapping.h>
#include <plat/common.h>
-#include <plat/board.h>
#include <plat/vram.h>
#include <plat/dsp.h>
#include <plat/dma.h>
#include <plat/omap-secure.h>
-
-#define NO_LENGTH_CHECK 0xffffffff
-
-struct omap_board_config_kernel *omap_board_config __initdata;
-int omap_board_config_size;
-
-static const void *__init get_config(u16 tag, size_t len,
- int skip, size_t *len_out)
-{
- struct omap_board_config_kernel *kinfo = NULL;
- int i;
-
- /* Try to find the config from the board-specific structures
- * in the kernel. */
- for (i = 0; i < omap_board_config_size; i++) {
- if (omap_board_config[i].tag == tag) {
- if (skip == 0) {
- kinfo = &omap_board_config[i];
- break;
- } else {
- skip--;
- }
- }
- }
- if (kinfo == NULL)
- return NULL;
- return kinfo->data;
-}
-
-const void *__init __omap_get_config(u16 tag, size_t len, int nr)
-{
- return get_config(tag, len, nr, NULL);
-}
-
-const void *__init omap_get_var_config(u16 tag, size_t *len)
-{
- return get_config(tag, NO_LENGTH_CHECK, 0, len);
-}
-
void __init omap_reserve(void)
{
omap_vram_reserve_sdram_memblock();
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index dbf1e03029a5..2e826f1faf7b 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -22,10 +22,7 @@
#include <asm/mach/time.h>
#include <asm/sched_clock.h>
-#include <plat/hardware.h>
#include <plat/common.h>
-#include <plat/board.h>
-
#include <plat/clock.h>
/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c
index caa1f7b6cc21..c7a4c0902b38 100644
--- a/arch/arm/plat-omap/debug-devices.c
+++ b/arch/arm/plat-omap/debug-devices.c
@@ -17,9 +17,6 @@
#include <mach/hardware.h>
-#include <plat/board.h>
-
-
/* Many OMAP development platforms reuse the same "debug board"; these
* platforms include H2, H3, H4, and Perseus2.
*/
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index 39407cbe34c6..195aaae65872 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -12,6 +12,7 @@
#include <linux/platform_device.h>
#include <linux/leds.h>
#include <linux/io.h>
+#include <linux/platform_data/gpio-omap.h>
#include <mach/hardware.h>
#include <asm/leds.h>
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
deleted file mode 100644
index 1cba9273d2cb..000000000000
--- a/arch/arm/plat-omap/devices.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * linux/arch/arm/plat-omap/devices.c
- *
- * Common platform device setup/initialization for OMAP1 and OMAP2
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#include <linux/gpio.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/slab.h>
-#include <linux/memblock.h>
-
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/mach/map.h>
-#include <asm/memblock.h>
-
-#include <plat/tc.h>
-#include <plat/board.h>
-#include <plat/mmc.h>
-#include <plat/menelaus.h>
-#include <plat/omap44xx.h>
-
-/*-------------------------------------------------------------------------*/
-
-#if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)
-
-#ifdef CONFIG_ARCH_OMAP2
-#define OMAP_RNG_BASE 0x480A0000
-#else
-#define OMAP_RNG_BASE 0xfffe5000
-#endif
-
-static struct resource rng_resources[] = {
- {
- .start = OMAP_RNG_BASE,
- .end = OMAP_RNG_BASE + 0x4f,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device omap_rng_device = {
- .name = "omap_rng",
- .id = -1,
- .num_resources = ARRAY_SIZE(rng_resources),
- .resource = rng_resources,
-};
-
-static void omap_init_rng(void)
-{
- (void) platform_device_register(&omap_rng_device);
-}
-#else
-static inline void omap_init_rng(void) {}
-#endif
-
-/*
- * This gets called after board-specific INIT_MACHINE, and initializes most
- * on-chip peripherals accessible on this board (except for few like USB):
- *
- * (a) Does any "standard config" pin muxing needed. Board-specific
- * code will have muxed GPIO pins and done "nonstandard" setup;
- * that code could live in the boot loader.
- * (b) Populating board-specific platform_data with the data drivers
- * rely on to handle wiring variations.
- * (c) Creating platform devices as meaningful on this board and
- * with this kernel configuration.
- *
- * Claiming GPIOs, and setting their direction and initial values, is the
- * responsibility of the device drivers. So is responding to probe().
- *
- * Board-specific knowledge like creating devices or pin setup is to be
- * kept out of drivers as much as possible. In particular, pin setup
- * may be handled by the boot loader, and drivers should expect it will
- * normally have been done by the time they're probed.
- */
-static int __init omap_init_devices(void)
-{
- /* please keep these calls, and their implementations above,
- * in alphabetical order so they're easier to sort through.
- */
- omap_init_rng();
- return 0;
-}
-arch_initcall(omap_init_devices);
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 7fe626761e53..6dcad5873d57 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -36,9 +36,8 @@
#include <linux/slab.h>
#include <linux/delay.h>
-#include <mach/hardware.h>
+#include <plat/cpu.h>
#include <plat/dma.h>
-
#include <plat/tc.h>
/*
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c
index dd6f92c99e56..bcbb9d5dc293 100644
--- a/arch/arm/plat-omap/fb.c
+++ b/arch/arm/plat-omap/fb.c
@@ -33,8 +33,6 @@
#include <mach/hardware.h>
#include <asm/mach/map.h>
-#include <plat/board.h>
-
#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE)
static bool omapfb_lcd_configured;
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index db071bc71c4d..40bc06a7ac43 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -39,6 +39,7 @@
#define OMAP_I2C_SIZE 0x3f
#define OMAP1_I2C_BASE 0xfffb3800
+#define OMAP1_INT_I2C (32 + 4)
static const char name[] = "omap_i2c";
@@ -105,7 +106,7 @@ static inline int omap1_i2c_add_bus(int bus_id)
res = pdev->resource;
res[0].start = OMAP1_I2C_BASE;
res[0].end = res[0].start + OMAP_I2C_SIZE;
- res[1].start = INT_I2C;
+ res[1].start = OMAP1_INT_I2C;
pdata = &i2c_pdata[bus_id - 1];
/* all OMAP1 have IP version 1 register set */
diff --git a/arch/arm/plat-omap/include/plat/board.h b/arch/arm/plat-omap/include/plat/board.h
deleted file mode 100644
index e62f20a5c0af..000000000000
--- a/arch/arm/plat-omap/include/plat/board.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board.h
- *
- * Information structures for board-specific data
- *
- * Copyright (C) 2004 Nokia Corporation
- * Written by Juha Yrjölä <juha.yrjola@nokia.com>
- */
-
-#ifndef _OMAP_BOARD_H
-#define _OMAP_BOARD_H
-
-#include <linux/types.h>
-
-#include <plat/gpio-switch.h>
-
-/*
- * OMAP35x EVM revision
- * Run time detection of EVM revision is done by reading Ethernet
- * PHY ID -
- * GEN_1 = 0x01150000
- * GEN_2 = 0x92200000
- */
-enum {
- OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
- OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
-};
-
-/* Different peripheral ids */
-#define OMAP_TAG_CLOCK 0x4f01
-#define OMAP_TAG_GPIO_SWITCH 0x4f06
-#define OMAP_TAG_STI_CONSOLE 0x4f09
-#define OMAP_TAG_CAMERA_SENSOR 0x4f0a
-
-#define OMAP_TAG_BOOT_REASON 0x4f80
-#define OMAP_TAG_FLASH_PART 0x4f81
-#define OMAP_TAG_VERSION_STR 0x4f82
-
-struct omap_clock_config {
- /* 0 for 12 MHz, 1 for 13 MHz and 2 for 19.2 MHz */
- u8 system_clock_type;
-};
-
-struct omap_serial_console_config {
- u8 console_uart;
- u32 console_speed;
-};
-
-struct omap_sti_console_config {
- unsigned enable:1;
- u8 channel;
-};
-
-struct omap_camera_sensor_config {
- u16 reset_gpio;
- int (*power_on)(void * data);
- int (*power_off)(void * data);
-};
-
-struct omap_lcd_config {
- char panel_name[16];
- char ctrl_name[16];
- s16 nreset_gpio;
- u8 data_lines;
-};
-
-struct device;
-struct fb_info;
-struct omap_backlight_config {
- int default_intensity;
- int (*set_power)(struct device *dev, int state);
-};
-
-struct omap_fbmem_config {
- u32 start;
- u32 size;
-};
-
-struct omap_pwm_led_platform_data {
- const char *name;
- int intensity_timer;
- int blink_timer;
- void (*set_power)(struct omap_pwm_led_platform_data *self, int on_off);
-};
-
-struct omap_uart_config {
- /* Bit field of UARTs present; bit 0 --> UART1 */
- unsigned int enabled_uarts;
-};
-
-
-struct omap_flash_part_config {
- char part_table[0];
-};
-
-struct omap_boot_reason_config {
- char reason_str[12];
-};
-
-struct omap_version_config {
- char component[12];
- char version[12];
-};
-
-struct omap_board_config_entry {
- u16 tag;
- u16 len;
- u8 data[0];
-};
-
-struct omap_board_config_kernel {
- u16 tag;
- const void *data;
-};
-
-extern const void *__init __omap_get_config(u16 tag, size_t len, int nr);
-
-#define omap_get_config(tag, type) \
- ((const type *) __omap_get_config((tag), sizeof(type), 0))
-#define omap_get_nr_config(tag, type, nr) \
- ((const type *) __omap_get_config((tag), sizeof(type), (nr)))
-
-extern const void *__init omap_get_var_config(u16 tag, size_t *len);
-
-extern struct omap_board_config_kernel *omap_board_config;
-extern int omap_board_config_size;
-
-
-/* for TI reference platforms sharing the same debug card */
-extern int debug_card_init(u32 addr, unsigned gpio);
-
-/* OMAP3EVM revision */
-#if defined(CONFIG_MACH_OMAP3EVM)
-u8 get_omap3_evm_rev(void);
-#else
-#define get_omap3_evm_rev() (-EINVAL)
-#endif
-#endif
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index bb5d08a70dbc..67da857783ce 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -30,6 +30,8 @@
#ifndef __ASM_ARCH_OMAP_CPU_H
#define __ASM_ARCH_OMAP_CPU_H
+#ifndef __ASSEMBLY__
+
#include <linux/bitops.h>
#include <plat/multi.h>
@@ -493,4 +495,5 @@ OMAP4_HAS_FEATURE(mpu_1ghz, MPU_1GHZ)
OMAP4_HAS_FEATURE(mpu_1_2ghz, MPU_1_2GHZ)
OMAP4_HAS_FEATURE(mpu_1_5ghz, MPU_1_5GHZ)
+#endif /* __ASSEMBLY__ */
#endif
diff --git a/arch/arm/plat-omap/include/plat/debug-devices.h b/arch/arm/plat-omap/include/plat/debug-devices.h
new file mode 100644
index 000000000000..a4edbd2f7484
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/debug-devices.h
@@ -0,0 +1,9 @@
+#ifndef _OMAP_DEBUG_DEVICES_H
+#define _OMAP_DEBUG_DEVICES_H
+
+#include <linux/types.h>
+
+/* for TI reference platforms sharing the same debug card */
+extern int debug_card_init(u32 addr, unsigned gpio);
+
+#endif
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
index c5811d4409b0..0a87b052f8f7 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -31,6 +31,8 @@
/* Move omap4 specific defines to dma-44xx.h */
#include "dma-44xx.h"
+#define INT_DMA_LCD 25
+
/* DMA channels for omap1 */
#define OMAP_DMA_NO_DEVICE 0
#define OMAP_DMA_MCSI1_TX 1
diff --git a/arch/arm/plat-omap/include/plat/gpio-switch.h b/arch/arm/plat-omap/include/plat/gpio-switch.h
deleted file mode 100644
index 10da0e07c0cf..000000000000
--- a/arch/arm/plat-omap/include/plat/gpio-switch.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * GPIO switch definitions
- *
- * Copyright (C) 2006 Nokia Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_OMAP_GPIO_SWITCH_H
-#define __ASM_ARCH_OMAP_GPIO_SWITCH_H
-
-#include <linux/types.h>
-
-/* Cover:
- * high -> closed
- * low -> open
- * Connection:
- * high -> connected
- * low -> disconnected
- * Activity:
- * high -> active
- * low -> inactive
- *
- */
-#define OMAP_GPIO_SWITCH_TYPE_COVER 0x0000
-#define OMAP_GPIO_SWITCH_TYPE_CONNECTION 0x0001
-#define OMAP_GPIO_SWITCH_TYPE_ACTIVITY 0x0002
-#define OMAP_GPIO_SWITCH_FLAG_INVERTED 0x0001
-#define OMAP_GPIO_SWITCH_FLAG_OUTPUT 0x0002
-
-struct omap_gpio_switch {
- const char *name;
- s16 gpio;
- unsigned flags:4;
- unsigned type:4;
-
- /* Time in ms to debounce when transitioning from
- * inactive state to active state. */
- u16 debounce_rising;
- /* Same for transition from active to inactive state. */
- u16 debounce_falling;
-
- /* notify board-specific code about state changes */
- void (* notify)(void *data, int state);
- void *notify_data;
-};
-
-/* Call at init time only */
-extern void omap_register_gpio_switches(const struct omap_gpio_switch *tbl,
- int count);
-
-#endif
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
deleted file mode 100644
index 50fb7cc000ea..000000000000
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ /dev/null
@@ -1,228 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/gpio.h
- *
- * OMAP GPIO handling defines and functions
- *
- * Copyright (C) 2003-2005 Nokia Corporation
- *
- * Written by Juha Yrjölä <juha.yrjola@nokia.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#ifndef __ASM_ARCH_OMAP_GPIO_H
-#define __ASM_ARCH_OMAP_GPIO_H
-
-#include <linux/io.h>
-#include <linux/platform_device.h>
-#include <mach/irqs.h>
-
-#define OMAP1_MPUIO_BASE 0xfffb5000
-
-/*
- * These are the omap15xx/16xx offsets. The omap7xx offset are
- * OMAP_MPUIO_ / 2 offsets below.
- */
-#define OMAP_MPUIO_INPUT_LATCH 0x00
-#define OMAP_MPUIO_OUTPUT 0x04
-#define OMAP_MPUIO_IO_CNTL 0x08
-#define OMAP_MPUIO_KBR_LATCH 0x10
-#define OMAP_MPUIO_KBC 0x14
-#define OMAP_MPUIO_GPIO_EVENT_MODE 0x18
-#define OMAP_MPUIO_GPIO_INT_EDGE 0x1c
-#define OMAP_MPUIO_KBD_INT 0x20
-#define OMAP_MPUIO_GPIO_INT 0x24
-#define OMAP_MPUIO_KBD_MASKIT 0x28
-#define OMAP_MPUIO_GPIO_MASKIT 0x2c
-#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30
-#define OMAP_MPUIO_LATCH 0x34
-
-#define OMAP34XX_NR_GPIOS 6
-
-/*
- * OMAP1510 GPIO registers
- */
-#define OMAP1510_GPIO_DATA_INPUT 0x00
-#define OMAP1510_GPIO_DATA_OUTPUT 0x04
-#define OMAP1510_GPIO_DIR_CONTROL 0x08
-#define OMAP1510_GPIO_INT_CONTROL 0x0c
-#define OMAP1510_GPIO_INT_MASK 0x10
-#define OMAP1510_GPIO_INT_STATUS 0x14
-#define OMAP1510_GPIO_PIN_CONTROL 0x18
-
-#define OMAP1510_IH_GPIO_BASE 64
-
-/*
- * OMAP1610 specific GPIO registers
- */
-#define OMAP1610_GPIO_REVISION 0x0000
-#define OMAP1610_GPIO_SYSCONFIG 0x0010
-#define OMAP1610_GPIO_SYSSTATUS 0x0014
-#define OMAP1610_GPIO_IRQSTATUS1 0x0018
-#define OMAP1610_GPIO_IRQENABLE1 0x001c
-#define OMAP1610_GPIO_WAKEUPENABLE 0x0028
-#define OMAP1610_GPIO_DATAIN 0x002c
-#define OMAP1610_GPIO_DATAOUT 0x0030
-#define OMAP1610_GPIO_DIRECTION 0x0034
-#define OMAP1610_GPIO_EDGE_CTRL1 0x0038
-#define OMAP1610_GPIO_EDGE_CTRL2 0x003c
-#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c
-#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8
-#define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0
-#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc
-#define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8
-#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
-
-/*
- * OMAP7XX specific GPIO registers
- */
-#define OMAP7XX_GPIO_DATA_INPUT 0x00
-#define OMAP7XX_GPIO_DATA_OUTPUT 0x04
-#define OMAP7XX_GPIO_DIR_CONTROL 0x08
-#define OMAP7XX_GPIO_INT_CONTROL 0x0c
-#define OMAP7XX_GPIO_INT_MASK 0x10
-#define OMAP7XX_GPIO_INT_STATUS 0x14
-
-/*
- * omap2+ specific GPIO registers
- */
-#define OMAP24XX_GPIO_REVISION 0x0000
-#define OMAP24XX_GPIO_IRQSTATUS1 0x0018
-#define OMAP24XX_GPIO_IRQSTATUS2 0x0028
-#define OMAP24XX_GPIO_IRQENABLE2 0x002c
-#define OMAP24XX_GPIO_IRQENABLE1 0x001c
-#define OMAP24XX_GPIO_WAKE_EN 0x0020
-#define OMAP24XX_GPIO_CTRL 0x0030
-#define OMAP24XX_GPIO_OE 0x0034
-#define OMAP24XX_GPIO_DATAIN 0x0038
-#define OMAP24XX_GPIO_DATAOUT 0x003c
-#define OMAP24XX_GPIO_LEVELDETECT0 0x0040
-#define OMAP24XX_GPIO_LEVELDETECT1 0x0044
-#define OMAP24XX_GPIO_RISINGDETECT 0x0048
-#define OMAP24XX_GPIO_FALLINGDETECT 0x004c
-#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050
-#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054
-#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060
-#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064
-#define OMAP24XX_GPIO_CLEARWKUENA 0x0080
-#define OMAP24XX_GPIO_SETWKUENA 0x0084
-#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
-#define OMAP24XX_GPIO_SETDATAOUT 0x0094
-
-#define OMAP4_GPIO_REVISION 0x0000
-#define OMAP4_GPIO_EOI 0x0020
-#define OMAP4_GPIO_IRQSTATUSRAW0 0x0024
-#define OMAP4_GPIO_IRQSTATUSRAW1 0x0028
-#define OMAP4_GPIO_IRQSTATUS0 0x002c
-#define OMAP4_GPIO_IRQSTATUS1 0x0030
-#define OMAP4_GPIO_IRQSTATUSSET0 0x0034
-#define OMAP4_GPIO_IRQSTATUSSET1 0x0038
-#define OMAP4_GPIO_IRQSTATUSCLR0 0x003c
-#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040
-#define OMAP4_GPIO_IRQWAKEN0 0x0044
-#define OMAP4_GPIO_IRQWAKEN1 0x0048
-#define OMAP4_GPIO_IRQENABLE1 0x011c
-#define OMAP4_GPIO_WAKE_EN 0x0120
-#define OMAP4_GPIO_IRQSTATUS2 0x0128
-#define OMAP4_GPIO_IRQENABLE2 0x012c
-#define OMAP4_GPIO_CTRL 0x0130
-#define OMAP4_GPIO_OE 0x0134
-#define OMAP4_GPIO_DATAIN 0x0138
-#define OMAP4_GPIO_DATAOUT 0x013c
-#define OMAP4_GPIO_LEVELDETECT0 0x0140
-#define OMAP4_GPIO_LEVELDETECT1 0x0144
-#define OMAP4_GPIO_RISINGDETECT 0x0148
-#define OMAP4_GPIO_FALLINGDETECT 0x014c
-#define OMAP4_GPIO_DEBOUNCENABLE 0x0150
-#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154
-#define OMAP4_GPIO_CLEARIRQENABLE1 0x0160
-#define OMAP4_GPIO_SETIRQENABLE1 0x0164
-#define OMAP4_GPIO_CLEARWKUENA 0x0180
-#define OMAP4_GPIO_SETWKUENA 0x0184
-#define OMAP4_GPIO_CLEARDATAOUT 0x0190
-#define OMAP4_GPIO_SETDATAOUT 0x0194
-
-#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr))
-#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES)
-
-struct omap_gpio_dev_attr {
- int bank_width; /* GPIO bank width */
- bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
-};
-
-struct omap_gpio_reg_offs {
- u16 revision;
- u16 direction;
- u16 datain;
- u16 dataout;
- u16 set_dataout;
- u16 clr_dataout;
- u16 irqstatus;
- u16 irqstatus2;
- u16 irqstatus_raw0;
- u16 irqstatus_raw1;
- u16 irqenable;
- u16 irqenable2;
- u16 set_irqenable;
- u16 clr_irqenable;
- u16 debounce;
- u16 debounce_en;
- u16 ctrl;
- u16 wkup_en;
- u16 leveldetect0;
- u16 leveldetect1;
- u16 risingdetect;
- u16 fallingdetect;
- u16 irqctrl;
- u16 edgectrl1;
- u16 edgectrl2;
- u16 pinctrl;
-
- bool irqenable_inv;
-};
-
-struct omap_gpio_platform_data {
- int bank_type;
- int bank_width; /* GPIO bank width */
- int bank_stride; /* Only needed for omap1 MPUIO */
- bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
- bool loses_context; /* whether the bank would ever lose context */
- bool is_mpuio; /* whether the bank is of type MPUIO */
- u32 non_wakeup_gpios;
-
- struct omap_gpio_reg_offs *regs;
-
- /* Return context loss count due to PM states changing */
- int (*get_context_loss_count)(struct device *dev);
-};
-
-extern void omap2_gpio_prepare_for_idle(int off_mode);
-extern void omap2_gpio_resume_after_idle(void);
-extern void omap_set_gpio_debounce(int gpio, int enable);
-extern void omap_set_gpio_debounce_time(int gpio, int enable);
-/*-------------------------------------------------------------------------*/
-
-/*
- * Wrappers for "new style" GPIO calls, using the new infrastructure
- * which lets us plug in FPGA, I2C, and other implementations.
- *
- * The original OMAP-specific calls should eventually be removed.
- */
-
-#include <linux/errno.h>
-#include <asm-generic/gpio.h>
-
-#endif
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
index f37764a36072..2e6e2597178c 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -133,6 +133,25 @@ struct gpmc_timings {
u16 wr_data_mux_bus; /* WRDATAONADMUXBUS */
};
+struct gpmc_nand_regs {
+ void __iomem *gpmc_status;
+ void __iomem *gpmc_nand_command;
+ void __iomem *gpmc_nand_address;
+ void __iomem *gpmc_nand_data;
+ void __iomem *gpmc_prefetch_config1;
+ void __iomem *gpmc_prefetch_config2;
+ void __iomem *gpmc_prefetch_control;
+ void __iomem *gpmc_prefetch_status;
+ void __iomem *gpmc_ecc_config;
+ void __iomem *gpmc_ecc_control;
+ void __iomem *gpmc_ecc_size_config;
+ void __iomem *gpmc_ecc1_result;
+ void __iomem *gpmc_bch_result0;
+};
+
+extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs);
+extern int gpmc_get_client_irq(unsigned irq_config);
+
extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns);
extern unsigned int gpmc_ps_to_ticks(unsigned int time_ps);
extern unsigned int gpmc_ticks_to_ns(unsigned int ticks);
diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h
deleted file mode 100644
index ddbde38e1e33..000000000000
--- a/arch/arm/plat-omap/include/plat/hardware.h
+++ /dev/null
@@ -1,293 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/hardware.h
- *
- * Hardware definitions for TI OMAP processors and boards
- *
- * NOTE: Please put device driver specific defines into a separate header
- * file for each driver.
- *
- * Copyright (C) 2001 RidgeRun, Inc.
- * Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
- *
- * Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
- * and Dirk Behme <dirk.behme@de.bosch.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ASM_ARCH_OMAP_HARDWARE_H
-#define __ASM_ARCH_OMAP_HARDWARE_H
-
-#include <asm/sizes.h>
-#ifndef __ASSEMBLER__
-#include <asm/types.h>
-#include <plat/cpu.h>
-#endif
-#include <plat/serial.h>
-
-/*
- * ---------------------------------------------------------------------------
- * Common definitions for all OMAP processors
- * NOTE: Put all processor or board specific parts to the special header
- * files.
- * ---------------------------------------------------------------------------
- */
-
-/*
- * ----------------------------------------------------------------------------
- * Timers
- * ----------------------------------------------------------------------------
- */
-#define OMAP_MPU_TIMER1_BASE (0xfffec500)
-#define OMAP_MPU_TIMER2_BASE (0xfffec600)
-#define OMAP_MPU_TIMER3_BASE (0xfffec700)
-#define MPU_TIMER_FREE (1 << 6)
-#define MPU_TIMER_CLOCK_ENABLE (1 << 5)
-#define MPU_TIMER_AR (1 << 1)
-#define MPU_TIMER_ST (1 << 0)
-
-/*
- * ----------------------------------------------------------------------------
- * Clocks
- * ----------------------------------------------------------------------------
- */
-#define CLKGEN_REG_BASE (0xfffece00)
-#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0)
-#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4)
-#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8)
-#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC)
-#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10)
-#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14)
-#define ARM_SYSST (CLKGEN_REG_BASE + 0x18)
-#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
-
-#define CK_RATEF 1
-#define CK_IDLEF 2
-#define CK_ENABLEF 4
-#define CK_SELECTF 8
-#define SETARM_IDLE_SHIFT
-
-/* DPLL control registers */
-#define DPLL_CTL (0xfffecf00)
-
-/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */
-#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000)
-#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0)
-#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4)
-#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8)
-#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14)
-
-/*
- * ---------------------------------------------------------------------------
- * UPLD
- * ---------------------------------------------------------------------------
- */
-#define ULPD_REG_BASE (0xfffe0800)
-#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14)
-#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24)
-#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30)
-# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */
-# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */
-#define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34)
-# define SOFT_UDC_REQ (1 << 4)
-# define SOFT_USB_CLK_REQ (1 << 3)
-# define SOFT_DPLL_REQ (1 << 0)
-#define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c)
-#define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40)
-#define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c)
-#define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50)
-#define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68)
-# define DIS_MMC2_DPLL_REQ (1 << 11)
-# define DIS_MMC1_DPLL_REQ (1 << 10)
-# define DIS_UART3_DPLL_REQ (1 << 9)
-# define DIS_UART2_DPLL_REQ (1 << 8)
-# define DIS_UART1_DPLL_REQ (1 << 7)
-# define DIS_USB_HOST_DPLL_REQ (1 << 6)
-#define ULPD_SDW_CLK_DIV_CTRL_SEL (ULPD_REG_BASE + 0x74)
-#define ULPD_CAM_CLK_CTRL (ULPD_REG_BASE + 0x7c)
-
-/*
- * ---------------------------------------------------------------------------
- * Watchdog timer
- * ---------------------------------------------------------------------------
- */
-
-/* Watchdog timer within the OMAP3.2 gigacell */
-#define OMAP_MPU_WATCHDOG_BASE (0xfffec800)
-#define OMAP_WDT_TIMER (OMAP_MPU_WATCHDOG_BASE + 0x0)
-#define OMAP_WDT_LOAD_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4)
-#define OMAP_WDT_READ_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4)
-#define OMAP_WDT_TIMER_MODE (OMAP_MPU_WATCHDOG_BASE + 0x8)
-
-/*
- * ---------------------------------------------------------------------------
- * Interrupts
- * ---------------------------------------------------------------------------
- */
-#ifdef CONFIG_ARCH_OMAP1
-
-/*
- * XXX: These probably want to be moved to arch/arm/mach-omap/omap1/irq.c
- * or something similar.. -- PFM.
- */
-
-#define OMAP_IH1_BASE 0xfffecb00
-#define OMAP_IH2_BASE 0xfffe0000
-
-#define OMAP_IH1_ITR (OMAP_IH1_BASE + 0x00)
-#define OMAP_IH1_MIR (OMAP_IH1_BASE + 0x04)
-#define OMAP_IH1_SIR_IRQ (OMAP_IH1_BASE + 0x10)
-#define OMAP_IH1_SIR_FIQ (OMAP_IH1_BASE + 0x14)
-#define OMAP_IH1_CONTROL (OMAP_IH1_BASE + 0x18)
-#define OMAP_IH1_ILR0 (OMAP_IH1_BASE + 0x1c)
-#define OMAP_IH1_ISR (OMAP_IH1_BASE + 0x9c)
-
-#define OMAP_IH2_ITR (OMAP_IH2_BASE + 0x00)
-#define OMAP_IH2_MIR (OMAP_IH2_BASE + 0x04)
-#define OMAP_IH2_SIR_IRQ (OMAP_IH2_BASE + 0x10)
-#define OMAP_IH2_SIR_FIQ (OMAP_IH2_BASE + 0x14)
-#define OMAP_IH2_CONTROL (OMAP_IH2_BASE + 0x18)
-#define OMAP_IH2_ILR0 (OMAP_IH2_BASE + 0x1c)
-#define OMAP_IH2_ISR (OMAP_IH2_BASE + 0x9c)
-
-#define IRQ_ITR_REG_OFFSET 0x00
-#define IRQ_MIR_REG_OFFSET 0x04
-#define IRQ_SIR_IRQ_REG_OFFSET 0x10
-#define IRQ_SIR_FIQ_REG_OFFSET 0x14
-#define IRQ_CONTROL_REG_OFFSET 0x18
-#define IRQ_ISR_REG_OFFSET 0x9c
-#define IRQ_ILR0_REG_OFFSET 0x1c
-#define IRQ_GMR_REG_OFFSET 0xa0
-
-#endif
-
-/*
- * ----------------------------------------------------------------------------
- * System control registers
- * ----------------------------------------------------------------------------
- */
-#define MOD_CONF_CTRL_0 0xfffe1080
-#define MOD_CONF_CTRL_1 0xfffe1110
-
-/*
- * ----------------------------------------------------------------------------
- * Pin multiplexing registers
- * ----------------------------------------------------------------------------
- */
-#define FUNC_MUX_CTRL_0 0xfffe1000
-#define FUNC_MUX_CTRL_1 0xfffe1004
-#define FUNC_MUX_CTRL_2 0xfffe1008
-#define COMP_MODE_CTRL_0 0xfffe100c
-#define FUNC_MUX_CTRL_3 0xfffe1010
-#define FUNC_MUX_CTRL_4 0xfffe1014
-#define FUNC_MUX_CTRL_5 0xfffe1018
-#define FUNC_MUX_CTRL_6 0xfffe101C
-#define FUNC_MUX_CTRL_7 0xfffe1020
-#define FUNC_MUX_CTRL_8 0xfffe1024
-#define FUNC_MUX_CTRL_9 0xfffe1028
-#define FUNC_MUX_CTRL_A 0xfffe102C
-#define FUNC_MUX_CTRL_B 0xfffe1030
-#define FUNC_MUX_CTRL_C 0xfffe1034
-#define FUNC_MUX_CTRL_D 0xfffe1038
-#define PULL_DWN_CTRL_0 0xfffe1040
-#define PULL_DWN_CTRL_1 0xfffe1044
-#define PULL_DWN_CTRL_2 0xfffe1048
-#define PULL_DWN_CTRL_3 0xfffe104c
-#define PULL_DWN_CTRL_4 0xfffe10ac
-
-/* OMAP-1610 specific multiplexing registers */
-#define FUNC_MUX_CTRL_E 0xfffe1090
-#define FUNC_MUX_CTRL_F 0xfffe1094
-#define FUNC_MUX_CTRL_10 0xfffe1098
-#define FUNC_MUX_CTRL_11 0xfffe109c
-#define FUNC_MUX_CTRL_12 0xfffe10a0
-#define PU_PD_SEL_0 0xfffe10b4
-#define PU_PD_SEL_1 0xfffe10b8
-#define PU_PD_SEL_2 0xfffe10bc
-#define PU_PD_SEL_3 0xfffe10c0
-#define PU_PD_SEL_4 0xfffe10c4
-
-/* Timer32K for 1610 and 1710*/
-#define OMAP_TIMER32K_BASE 0xFFFBC400
-
-/*
- * ---------------------------------------------------------------------------
- * TIPB bus interface
- * ---------------------------------------------------------------------------
- */
-#define TIPB_PUBLIC_CNTL_BASE 0xfffed300
-#define MPU_PUBLIC_TIPB_CNTL (TIPB_PUBLIC_CNTL_BASE + 0x8)
-#define TIPB_PRIVATE_CNTL_BASE 0xfffeca00
-#define MPU_PRIVATE_TIPB_CNTL (TIPB_PRIVATE_CNTL_BASE + 0x8)
-
-/*
- * ----------------------------------------------------------------------------
- * MPUI interface
- * ----------------------------------------------------------------------------
- */
-#define MPUI_BASE (0xfffec900)
-#define MPUI_CTRL (MPUI_BASE + 0x0)
-#define MPUI_DEBUG_ADDR (MPUI_BASE + 0x4)
-#define MPUI_DEBUG_DATA (MPUI_BASE + 0x8)
-#define MPUI_DEBUG_FLAG (MPUI_BASE + 0xc)
-#define MPUI_STATUS_REG (MPUI_BASE + 0x10)
-#define MPUI_DSP_STATUS (MPUI_BASE + 0x14)
-#define MPUI_DSP_BOOT_CONFIG (MPUI_BASE + 0x18)
-#define MPUI_DSP_API_CONFIG (MPUI_BASE + 0x1c)
-
-/*
- * ----------------------------------------------------------------------------
- * LED Pulse Generator
- * ----------------------------------------------------------------------------
- */
-#define OMAP_LPG1_BASE 0xfffbd000
-#define OMAP_LPG2_BASE 0xfffbd800
-#define OMAP_LPG1_LCR (OMAP_LPG1_BASE + 0x00)
-#define OMAP_LPG1_PMR (OMAP_LPG1_BASE + 0x04)
-#define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00)
-#define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04)
-
-/*
- * ----------------------------------------------------------------------------
- * Pulse-Width Light
- * ----------------------------------------------------------------------------
- */
-#define OMAP_PWL_BASE 0xfffb5800
-#define OMAP_PWL_ENABLE (OMAP_PWL_BASE + 0x00)
-#define OMAP_PWL_CLK_ENABLE (OMAP_PWL_BASE + 0x04)
-
-/*
- * ---------------------------------------------------------------------------
- * Processor specific defines
- * ---------------------------------------------------------------------------
- */
-
-#include <plat/omap7xx.h>
-#include <plat/omap1510.h>
-#include <plat/omap16xx.h>
-#include <plat/omap24xx.h>
-#include <plat/omap34xx.h>
-#include <plat/omap44xx.h>
-#include <plat/ti81xx.h>
-#include <plat/am33xx.h>
-#include <plat/omap54xx.h>
-
-#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/plat-omap/include/plat/irqs-44xx.h b/arch/arm/plat-omap/include/plat/irqs-44xx.h
deleted file mode 100644
index 518322c80116..000000000000
--- a/arch/arm/plat-omap/include/plat/irqs-44xx.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * OMAP4 Interrupt lines definitions
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Santosh Shilimkar (santosh.shilimkar@ti.com)
- * Benoit Cousson (b-cousson@ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_OMAP44XX_IRQS_H
-#define __ARCH_ARM_MACH_OMAP2_OMAP44XX_IRQS_H
-
-/* OMAP44XX IRQs numbers definitions */
-#define OMAP44XX_IRQ_LOCALTIMER 29
-#define OMAP44XX_IRQ_LOCALWDT 30
-
-#define OMAP44XX_IRQ_GIC_START 32
-
-#define OMAP44XX_IRQ_PL310 (0 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_CTI0 (1 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_CTI1 (2 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_ELM (4 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SYS_1N (7 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SECURITY_EVENTS (8 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_L3_DBG (9 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_L3_APP (10 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_PRCM (11 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SDMA_0 (12 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SDMA_1 (13 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SDMA_2 (14 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SDMA_3 (15 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_MCBSP4 (16 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_MCBSP1 (17 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SR_MCU (18 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SR_CORE (19 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPMC (20 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GFX (21 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_MCBSP2 (22 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_MCBSP3 (23 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_ISS_5 (24 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_DSS_DISPC (25 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_MAIL_U0 (26 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_C2C_SSCM_0 (27 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_TESLA_MMU (28 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPIO1 (29 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPIO2 (30 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPIO3 (31 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPIO4 (32 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPIO5 (33 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPIO6 (34 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_USIM (35 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_WDT3 (36 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPT1 (37 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPT2 (38 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPT3 (39 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPT4 (40 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPT5 (41 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPT6 (42 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPT7 (43 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPT8 (44 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPT9 (45 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPT10 (46 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPT11 (47 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SPI4 (48 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SHA1_S (49 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_FPKA_SINTREQUEST_S (50 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SHA1_P (51 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_RNG (52 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_DSS_DSI1 (53 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_I2C1 (56 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_I2C2 (57 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_HDQ (58 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_MMC5 (59 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_I2C3 (61 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_I2C4 (62 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_AES2_S (63 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_AES2_P (64 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SPI1 (65 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SPI2 (66 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_HSI_P1 (67 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_HSI_P2 (68 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_FDIF_3 (69 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_UART4 (70 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_HSI_DMA (71 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_UART1 (72 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_UART2 (73 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_UART3 (74 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_PBIAS (75 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_OHCI (76 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_EHCI (77 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_TLL (78 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_AES1_S (79 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_WDT2 (80 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_DES_S (81 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_DES_P (82 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_MMC1 (83 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_DSS_DSI2 (84 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_AES1_P (85 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_MMC2 (86 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_MPU_ICR (87 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_C2C_SSCM_1 (88 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_FSUSB (89 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_FSUSB_SMI (90 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SPI3 (91 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_HS_USB_MC_N (92 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_HS_USB_DMA_N (93 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_MMC3 (94 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_GPT12 (95 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_MMC4 (96 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SLIMBUS1 (97 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SLIMBUS2 (98 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_ABE (99 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_DUCATI_MMU (100 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_DSS_HDMI (101 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SR_IVA (102 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_IVA_HD_POSYNCITRPEND_1 (103 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_IVA_HD_POSYNCITRPEND_0 (104 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_IVA_HD_POMBINTRPEND_0 (107 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_MCASP1_AR (108 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_MCASP1_AX (109 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_EMIF4_1 (110 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_EMIF4_2 (111 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_MCPDM (112 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_DMM (113 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_DMIC (114 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_CDMA_0 (115 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_CDMA_1 (116 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_CDMA_2 (117 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_CDMA_3 (118 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_SYS_2N (119 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_KBD_CTL (120 + OMAP44XX_IRQ_GIC_START)
-#define OMAP44XX_IRQ_UNIPRO1 (124 + OMAP44XX_IRQ_GIC_START)
-
-#endif
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
deleted file mode 100644
index 37bbbbb981b2..000000000000
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ /dev/null
@@ -1,453 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/irqs.h
- *
- * Copyright (C) Greg Lonnon 2001
- * Updated for OMAP-1610 by Tony Lindgren <tony@atomide.com>
- *
- * Copyright (C) 2009 Texas Instruments
- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * NOTE: The interrupt vectors for the OMAP-1509, OMAP-1510, and OMAP-1610
- * are different.
- */
-
-#ifndef __ASM_ARCH_OMAP15XX_IRQS_H
-#define __ASM_ARCH_OMAP15XX_IRQS_H
-
-/* All OMAP4 specific defines are moved to irqs-44xx.h */
-#include "irqs-44xx.h"
-
-/*
- * IRQ numbers for interrupt handler 1
- *
- * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
- *
- */
-#define INT_CAMERA 1
-#define INT_FIQ 3
-#define INT_RTDX 6
-#define INT_DSP_MMU_ABORT 7
-#define INT_HOST 8
-#define INT_ABORT 9
-#define INT_BRIDGE_PRIV 13
-#define INT_GPIO_BANK1 14
-#define INT_UART3 15
-#define INT_TIMER3 16
-#define INT_DMA_CH0_6 19
-#define INT_DMA_CH1_7 20
-#define INT_DMA_CH2_8 21
-#define INT_DMA_CH3 22
-#define INT_DMA_CH4 23
-#define INT_DMA_CH5 24
-#define INT_DMA_LCD 25
-#define INT_TIMER1 26
-#define INT_WD_TIMER 27
-#define INT_BRIDGE_PUB 28
-#define INT_TIMER2 30
-#define INT_LCD_CTRL 31
-
-/*
- * OMAP-1510 specific IRQ numbers for interrupt handler 1
- */
-#define INT_1510_IH2_IRQ 0
-#define INT_1510_RES2 2
-#define INT_1510_SPI_TX 4
-#define INT_1510_SPI_RX 5
-#define INT_1510_DSP_MAILBOX1 10
-#define INT_1510_DSP_MAILBOX2 11
-#define INT_1510_RES12 12
-#define INT_1510_LB_MMU 17
-#define INT_1510_RES18 18
-#define INT_1510_LOCAL_BUS 29
-
-/*
- * OMAP-1610 specific IRQ numbers for interrupt handler 1
- */
-#define INT_1610_IH2_IRQ INT_1510_IH2_IRQ
-#define INT_1610_IH2_FIQ 2
-#define INT_1610_McBSP2_TX 4
-#define INT_1610_McBSP2_RX 5
-#define INT_1610_DSP_MAILBOX1 10
-#define INT_1610_DSP_MAILBOX2 11
-#define INT_1610_LCD_LINE 12
-#define INT_1610_GPTIMER1 17
-#define INT_1610_GPTIMER2 18
-#define INT_1610_SSR_FIFO_0 29
-
-/*
- * OMAP-7xx specific IRQ numbers for interrupt handler 1
- */
-#define INT_7XX_IH2_FIQ 0
-#define INT_7XX_IH2_IRQ 1
-#define INT_7XX_USB_NON_ISO 2
-#define INT_7XX_USB_ISO 3
-#define INT_7XX_ICR 4
-#define INT_7XX_EAC 5
-#define INT_7XX_GPIO_BANK1 6
-#define INT_7XX_GPIO_BANK2 7
-#define INT_7XX_GPIO_BANK3 8
-#define INT_7XX_McBSP2TX 10
-#define INT_7XX_McBSP2RX 11
-#define INT_7XX_McBSP2RX_OVF 12
-#define INT_7XX_LCD_LINE 14
-#define INT_7XX_GSM_PROTECT 15
-#define INT_7XX_TIMER3 16
-#define INT_7XX_GPIO_BANK5 17
-#define INT_7XX_GPIO_BANK6 18
-#define INT_7XX_SPGIO_WR 29
-
-/*
- * IRQ numbers for interrupt handler 2
- *
- * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
- */
-#define IH2_BASE 32
-
-#define INT_KEYBOARD (1 + IH2_BASE)
-#define INT_uWireTX (2 + IH2_BASE)
-#define INT_uWireRX (3 + IH2_BASE)
-#define INT_I2C (4 + IH2_BASE)
-#define INT_MPUIO (5 + IH2_BASE)
-#define INT_USB_HHC_1 (6 + IH2_BASE)
-#define INT_McBSP3TX (10 + IH2_BASE)
-#define INT_McBSP3RX (11 + IH2_BASE)
-#define INT_McBSP1TX (12 + IH2_BASE)
-#define INT_McBSP1RX (13 + IH2_BASE)
-#define INT_UART1 (14 + IH2_BASE)
-#define INT_UART2 (15 + IH2_BASE)
-#define INT_BT_MCSI1TX (16 + IH2_BASE)
-#define INT_BT_MCSI1RX (17 + IH2_BASE)
-#define INT_SOSSI_MATCH (19 + IH2_BASE)
-#define INT_USB_W2FC (20 + IH2_BASE)
-#define INT_1WIRE (21 + IH2_BASE)
-#define INT_OS_TIMER (22 + IH2_BASE)
-#define INT_MMC (23 + IH2_BASE)
-#define INT_GAUGE_32K (24 + IH2_BASE)
-#define INT_RTC_TIMER (25 + IH2_BASE)
-#define INT_RTC_ALARM (26 + IH2_BASE)
-#define INT_MEM_STICK (27 + IH2_BASE)
-
-/*
- * OMAP-1510 specific IRQ numbers for interrupt handler 2
- */
-#define INT_1510_DSP_MMU (28 + IH2_BASE)
-#define INT_1510_COM_SPI_RO (31 + IH2_BASE)
-
-/*
- * OMAP-1610 specific IRQ numbers for interrupt handler 2
- */
-#define INT_1610_FAC (0 + IH2_BASE)
-#define INT_1610_USB_HHC_2 (7 + IH2_BASE)
-#define INT_1610_USB_OTG (8 + IH2_BASE)
-#define INT_1610_SoSSI (9 + IH2_BASE)
-#define INT_1610_SoSSI_MATCH (19 + IH2_BASE)
-#define INT_1610_DSP_MMU (28 + IH2_BASE)
-#define INT_1610_McBSP2RX_OF (31 + IH2_BASE)
-#define INT_1610_STI (32 + IH2_BASE)
-#define INT_1610_STI_WAKEUP (33 + IH2_BASE)
-#define INT_1610_GPTIMER3 (34 + IH2_BASE)
-#define INT_1610_GPTIMER4 (35 + IH2_BASE)
-#define INT_1610_GPTIMER5 (36 + IH2_BASE)
-#define INT_1610_GPTIMER6 (37 + IH2_BASE)
-#define INT_1610_GPTIMER7 (38 + IH2_BASE)
-#define INT_1610_GPTIMER8 (39 + IH2_BASE)
-#define INT_1610_GPIO_BANK2 (40 + IH2_BASE)
-#define INT_1610_GPIO_BANK3 (41 + IH2_BASE)
-#define INT_1610_MMC2 (42 + IH2_BASE)
-#define INT_1610_CF (43 + IH2_BASE)
-#define INT_1610_WAKE_UP_REQ (46 + IH2_BASE)
-#define INT_1610_GPIO_BANK4 (48 + IH2_BASE)
-#define INT_1610_SPI (49 + IH2_BASE)
-#define INT_1610_DMA_CH6 (53 + IH2_BASE)
-#define INT_1610_DMA_CH7 (54 + IH2_BASE)
-#define INT_1610_DMA_CH8 (55 + IH2_BASE)
-#define INT_1610_DMA_CH9 (56 + IH2_BASE)
-#define INT_1610_DMA_CH10 (57 + IH2_BASE)
-#define INT_1610_DMA_CH11 (58 + IH2_BASE)
-#define INT_1610_DMA_CH12 (59 + IH2_BASE)
-#define INT_1610_DMA_CH13 (60 + IH2_BASE)
-#define INT_1610_DMA_CH14 (61 + IH2_BASE)
-#define INT_1610_DMA_CH15 (62 + IH2_BASE)
-#define INT_1610_NAND (63 + IH2_BASE)
-#define INT_1610_SHA1MD5 (91 + IH2_BASE)
-
-/*
- * OMAP-7xx specific IRQ numbers for interrupt handler 2
- */
-#define INT_7XX_HW_ERRORS (0 + IH2_BASE)
-#define INT_7XX_NFIQ_PWR_FAIL (1 + IH2_BASE)
-#define INT_7XX_CFCD (2 + IH2_BASE)
-#define INT_7XX_CFIREQ (3 + IH2_BASE)
-#define INT_7XX_I2C (4 + IH2_BASE)
-#define INT_7XX_PCC (5 + IH2_BASE)
-#define INT_7XX_MPU_EXT_NIRQ (6 + IH2_BASE)
-#define INT_7XX_SPI_100K_1 (7 + IH2_BASE)
-#define INT_7XX_SYREN_SPI (8 + IH2_BASE)
-#define INT_7XX_VLYNQ (9 + IH2_BASE)
-#define INT_7XX_GPIO_BANK4 (10 + IH2_BASE)
-#define INT_7XX_McBSP1TX (11 + IH2_BASE)
-#define INT_7XX_McBSP1RX (12 + IH2_BASE)
-#define INT_7XX_McBSP1RX_OF (13 + IH2_BASE)
-#define INT_7XX_UART_MODEM_IRDA_2 (14 + IH2_BASE)
-#define INT_7XX_UART_MODEM_1 (15 + IH2_BASE)
-#define INT_7XX_MCSI (16 + IH2_BASE)
-#define INT_7XX_uWireTX (17 + IH2_BASE)
-#define INT_7XX_uWireRX (18 + IH2_BASE)
-#define INT_7XX_SMC_CD (19 + IH2_BASE)
-#define INT_7XX_SMC_IREQ (20 + IH2_BASE)
-#define INT_7XX_HDQ_1WIRE (21 + IH2_BASE)
-#define INT_7XX_TIMER32K (22 + IH2_BASE)
-#define INT_7XX_MMC_SDIO (23 + IH2_BASE)
-#define INT_7XX_UPLD (24 + IH2_BASE)
-#define INT_7XX_USB_HHC_1 (27 + IH2_BASE)
-#define INT_7XX_USB_HHC_2 (28 + IH2_BASE)
-#define INT_7XX_USB_GENI (29 + IH2_BASE)
-#define INT_7XX_USB_OTG (30 + IH2_BASE)
-#define INT_7XX_CAMERA_IF (31 + IH2_BASE)
-#define INT_7XX_RNG (32 + IH2_BASE)
-#define INT_7XX_DUAL_MODE_TIMER (33 + IH2_BASE)
-#define INT_7XX_DBB_RF_EN (34 + IH2_BASE)
-#define INT_7XX_MPUIO_KEYPAD (35 + IH2_BASE)
-#define INT_7XX_SHA1_MD5 (36 + IH2_BASE)
-#define INT_7XX_SPI_100K_2 (37 + IH2_BASE)
-#define INT_7XX_RNG_IDLE (38 + IH2_BASE)
-#define INT_7XX_MPUIO (39 + IH2_BASE)
-#define INT_7XX_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE)
-#define INT_7XX_LLPC_OE_FALLING (41 + IH2_BASE)
-#define INT_7XX_LLPC_OE_RISING (42 + IH2_BASE)
-#define INT_7XX_LLPC_VSYNC (43 + IH2_BASE)
-#define INT_7XX_WAKE_UP_REQ (46 + IH2_BASE)
-#define INT_7XX_DMA_CH6 (53 + IH2_BASE)
-#define INT_7XX_DMA_CH7 (54 + IH2_BASE)
-#define INT_7XX_DMA_CH8 (55 + IH2_BASE)
-#define INT_7XX_DMA_CH9 (56 + IH2_BASE)
-#define INT_7XX_DMA_CH10 (57 + IH2_BASE)
-#define INT_7XX_DMA_CH11 (58 + IH2_BASE)
-#define INT_7XX_DMA_CH12 (59 + IH2_BASE)
-#define INT_7XX_DMA_CH13 (60 + IH2_BASE)
-#define INT_7XX_DMA_CH14 (61 + IH2_BASE)
-#define INT_7XX_DMA_CH15 (62 + IH2_BASE)
-#define INT_7XX_NAND (63 + IH2_BASE)
-
-#define INT_24XX_SYS_NIRQ 7
-#define INT_24XX_SDMA_IRQ0 12
-#define INT_24XX_SDMA_IRQ1 13
-#define INT_24XX_SDMA_IRQ2 14
-#define INT_24XX_SDMA_IRQ3 15
-#define INT_24XX_CAM_IRQ 24
-#define INT_24XX_DSS_IRQ 25
-#define INT_24XX_MAIL_U0_MPU 26
-#define INT_24XX_DSP_UMA 27
-#define INT_24XX_DSP_MMU 28
-#define INT_24XX_GPIO_BANK1 29
-#define INT_24XX_GPIO_BANK2 30
-#define INT_24XX_GPIO_BANK3 31
-#define INT_24XX_GPIO_BANK4 32
-#define INT_24XX_GPIO_BANK5 33
-#define INT_24XX_MAIL_U3_MPU 34
-#define INT_24XX_GPTIMER1 37
-#define INT_24XX_GPTIMER2 38
-#define INT_24XX_GPTIMER3 39
-#define INT_24XX_GPTIMER4 40
-#define INT_24XX_GPTIMER5 41
-#define INT_24XX_GPTIMER6 42
-#define INT_24XX_GPTIMER7 43
-#define INT_24XX_GPTIMER8 44
-#define INT_24XX_GPTIMER9 45
-#define INT_24XX_GPTIMER10 46
-#define INT_24XX_GPTIMER11 47
-#define INT_24XX_GPTIMER12 48
-#define INT_24XX_SHA1MD5 51
-#define INT_24XX_MCBSP4_IRQ_TX 54
-#define INT_24XX_MCBSP4_IRQ_RX 55
-#define INT_24XX_I2C1_IRQ 56
-#define INT_24XX_I2C2_IRQ 57
-#define INT_24XX_HDQ_IRQ 58
-#define INT_24XX_MCBSP1_IRQ_TX 59
-#define INT_24XX_MCBSP1_IRQ_RX 60
-#define INT_24XX_MCBSP2_IRQ_TX 62
-#define INT_24XX_MCBSP2_IRQ_RX 63
-#define INT_24XX_SPI1_IRQ 65
-#define INT_24XX_SPI2_IRQ 66
-#define INT_24XX_UART1_IRQ 72
-#define INT_24XX_UART2_IRQ 73
-#define INT_24XX_UART3_IRQ 74
-#define INT_24XX_USB_IRQ_GEN 75
-#define INT_24XX_USB_IRQ_NISO 76
-#define INT_24XX_USB_IRQ_ISO 77
-#define INT_24XX_USB_IRQ_HGEN 78
-#define INT_24XX_USB_IRQ_HSOF 79
-#define INT_24XX_USB_IRQ_OTG 80
-#define INT_24XX_MCBSP5_IRQ_TX 81
-#define INT_24XX_MCBSP5_IRQ_RX 82
-#define INT_24XX_MMC_IRQ 83
-#define INT_24XX_MMC2_IRQ 86
-#define INT_24XX_MCBSP3_IRQ_TX 89
-#define INT_24XX_MCBSP3_IRQ_RX 90
-#define INT_24XX_SPI3_IRQ 91
-
-#define INT_243X_MCBSP2_IRQ 16
-#define INT_243X_MCBSP3_IRQ 17
-#define INT_243X_MCBSP4_IRQ 18
-#define INT_243X_MCBSP5_IRQ 19
-#define INT_243X_MCBSP1_IRQ 64
-#define INT_243X_HS_USB_MC 92
-#define INT_243X_HS_USB_DMA 93
-#define INT_243X_CARKIT_IRQ 94
-
-#define INT_34XX_BENCH_MPU_EMUL 3
-#define INT_34XX_ST_MCBSP2_IRQ 4
-#define INT_34XX_ST_MCBSP3_IRQ 5
-#define INT_34XX_SSM_ABORT_IRQ 6
-#define INT_34XX_SYS_NIRQ 7
-#define INT_34XX_D2D_FW_IRQ 8
-#define INT_34XX_L3_DBG_IRQ 9
-#define INT_34XX_L3_APP_IRQ 10
-#define INT_34XX_PRCM_MPU_IRQ 11
-#define INT_34XX_MCBSP1_IRQ 16
-#define INT_34XX_MCBSP2_IRQ 17
-#define INT_34XX_GPMC_IRQ 20
-#define INT_34XX_MCBSP3_IRQ 22
-#define INT_34XX_MCBSP4_IRQ 23
-#define INT_34XX_CAM_IRQ 24
-#define INT_34XX_MCBSP5_IRQ 27
-#define INT_34XX_GPIO_BANK1 29
-#define INT_34XX_GPIO_BANK2 30
-#define INT_34XX_GPIO_BANK3 31
-#define INT_34XX_GPIO_BANK4 32
-#define INT_34XX_GPIO_BANK5 33
-#define INT_34XX_GPIO_BANK6 34
-#define INT_34XX_USIM_IRQ 35
-#define INT_34XX_WDT3_IRQ 36
-#define INT_34XX_SPI4_IRQ 48
-#define INT_34XX_SHA1MD52_IRQ 49
-#define INT_34XX_FPKA_READY_IRQ 50
-#define INT_34XX_SHA1MD51_IRQ 51
-#define INT_34XX_RNG_IRQ 52
-#define INT_34XX_I2C3_IRQ 61
-#define INT_34XX_FPKA_ERROR_IRQ 64
-#define INT_34XX_PBIAS_IRQ 75
-#define INT_34XX_OHCI_IRQ 76
-#define INT_34XX_EHCI_IRQ 77
-#define INT_34XX_TLL_IRQ 78
-#define INT_34XX_PARTHASH_IRQ 79
-#define INT_34XX_MMC3_IRQ 94
-#define INT_34XX_GPT12_IRQ 95
-
-#define INT_36XX_UART4_IRQ 80
-
-#define INT_35XX_HECC0_IRQ 24
-#define INT_35XX_HECC1_IRQ 28
-#define INT_35XX_EMAC_C0_RXTHRESH_IRQ 67
-#define INT_35XX_EMAC_C0_RX_PULSE_IRQ 68
-#define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69
-#define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70
-#define INT_35XX_USBOTG_IRQ 71
-#define INT_35XX_UART4_IRQ 84
-#define INT_35XX_CCDC_VD0_IRQ 88
-#define INT_35XX_CCDC_VD1_IRQ 92
-#define INT_35XX_CCDC_VD2_IRQ 93
-
-/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
- * 16 MPUIO lines */
-#define OMAP_MAX_GPIO_LINES 192
-#define IH_GPIO_BASE (128 + IH2_BASE)
-#define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE)
-#define OMAP_IRQ_END (IH_MPUIO_BASE + 16)
-
-/* External FPGA handles interrupts on Innovator boards */
-#define OMAP_FPGA_IRQ_BASE (OMAP_IRQ_END)
-#ifdef CONFIG_MACH_OMAP_INNOVATOR
-#define OMAP_FPGA_NR_IRQS 24
-#else
-#define OMAP_FPGA_NR_IRQS 0
-#endif
-#define OMAP_FPGA_IRQ_END (OMAP_FPGA_IRQ_BASE + OMAP_FPGA_NR_IRQS)
-
-/* External TWL4030 can handle interrupts on 2430 and 34xx boards */
-#define TWL4030_IRQ_BASE (OMAP_FPGA_IRQ_END)
-#ifdef CONFIG_TWL4030_CORE
-#define TWL4030_BASE_NR_IRQS 8
-#define TWL4030_PWR_NR_IRQS 8
-#else
-#define TWL4030_BASE_NR_IRQS 0
-#define TWL4030_PWR_NR_IRQS 0
-#endif
-#define TWL4030_IRQ_END (TWL4030_IRQ_BASE + TWL4030_BASE_NR_IRQS)
-#define TWL4030_PWR_IRQ_BASE TWL4030_IRQ_END
-#define TWL4030_PWR_IRQ_END (TWL4030_PWR_IRQ_BASE + TWL4030_PWR_NR_IRQS)
-
-/* External TWL4030 gpio interrupts are optional */
-#define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END
-#ifdef CONFIG_GPIO_TWL4030
-#define TWL4030_GPIO_NR_IRQS 18
-#else
-#define TWL4030_GPIO_NR_IRQS 0
-#endif
-#define TWL4030_GPIO_IRQ_END (TWL4030_GPIO_IRQ_BASE + TWL4030_GPIO_NR_IRQS)
-
-#define TWL6030_IRQ_BASE (OMAP_FPGA_IRQ_END)
-#ifdef CONFIG_TWL4030_CORE
-#define TWL6030_BASE_NR_IRQS 20
-#else
-#define TWL6030_BASE_NR_IRQS 0
-#endif
-#define TWL6030_IRQ_END (TWL6030_IRQ_BASE + TWL6030_BASE_NR_IRQS)
-
-#define TWL6040_CODEC_IRQ_BASE TWL6030_IRQ_END
-#ifdef CONFIG_TWL6040_CODEC
-#define TWL6040_CODEC_NR_IRQS 6
-#else
-#define TWL6040_CODEC_NR_IRQS 0
-#endif
-#define TWL6040_CODEC_IRQ_END (TWL6040_CODEC_IRQ_BASE + TWL6040_CODEC_NR_IRQS)
-
-/* Total number of interrupts depends on the enabled blocks above */
-#if (TWL4030_GPIO_IRQ_END > TWL6040_CODEC_IRQ_END)
-#define TWL_IRQ_END TWL4030_GPIO_IRQ_END
-#else
-#define TWL_IRQ_END TWL6040_CODEC_IRQ_END
-#endif
-
-/* GPMC related */
-#define OMAP_GPMC_IRQ_BASE (TWL_IRQ_END)
-#define OMAP_GPMC_NR_IRQS 8
-#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
-
-/* PRCM IRQ handler */
-#ifdef CONFIG_ARCH_OMAP2PLUS
-#define OMAP_PRCM_IRQ_BASE (OMAP_GPMC_IRQ_END)
-#define OMAP_PRCM_NR_IRQS 64
-#define OMAP_PRCM_IRQ_END (OMAP_PRCM_IRQ_BASE + OMAP_PRCM_NR_IRQS)
-#else
-#define OMAP_PRCM_IRQ_END OMAP_GPMC_IRQ_END
-#endif
-
-#define NR_IRQS OMAP_PRCM_IRQ_END
-
-#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
-
-#define INTCPS_NR_MIR_REGS 3
-#define INTCPS_NR_IRQS 96
-
-#include <mach/hardware.h>
-
-#ifdef CONFIG_FIQ
-#define FIQ_START 1024
-#endif
-
-#endif
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index eb3e4d555343..8b4e4f2da2f5 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -15,7 +15,6 @@
#include <linux/device.h>
#include <linux/mmc/host.h>
-#include <plat/board.h>
#include <plat/omap_hwmod.h>
#define OMAP15XX_NR_MMC 1
diff --git a/arch/arm/plat-omap/include/plat/nand.h b/arch/arm/plat-omap/include/plat/nand.h
index 67fc5060183e..1a68c1e5fe53 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -24,11 +24,10 @@ struct omap_nand_platform_data {
struct gpmc_timings *gpmc_t;
int nr_parts;
bool dev_ready;
- int gpmc_irq;
enum nand_io xfer_type;
- unsigned long phys_base;
int devsize;
enum omap_ecc ecc_opt;
+ struct gpmc_nand_regs reg;
};
/* minimum size for IO mapping */
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
index 1a52725ffcf2..a531149823bb 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -18,7 +18,7 @@
#define __OMAP_SERIAL_H__
#include <linux/serial_core.h>
-#include <linux/platform_device.h>
+#include <linux/device.h>
#include <linux/pm_qos.h>
#include <plat/mux.h>
@@ -42,10 +42,10 @@
#define OMAP_UART_WER_MOD_WKUP 0X7F
/* Enable XON/XOFF flow control on output */
-#define OMAP_UART_SW_TX 0x04
+#define OMAP_UART_SW_TX 0x8
/* Enable XON/XOFF flow control on input */
-#define OMAP_UART_SW_RX 0x04
+#define OMAP_UART_SW_RX 0x2
#define OMAP_UART_SYSC_RESET 0X07
#define OMAP_UART_TCR_TRIG 0X0F
@@ -69,11 +69,14 @@ struct omap_uart_port_info {
unsigned int dma_rx_timeout;
unsigned int autosuspend_timeout;
unsigned int dma_rx_poll_rate;
+ int DTR_gpio;
+ int DTR_inverted;
+ int DTR_present;
int (*get_context_loss_count)(struct device *);
- void (*set_forceidle)(struct platform_device *);
- void (*set_noidle)(struct platform_device *);
- void (*enable_wakeup)(struct platform_device *, bool);
+ void (*set_forceidle)(struct device *);
+ void (*set_noidle)(struct device *);
+ void (*enable_wakeup)(struct device *, bool);
};
struct uart_omap_dma {
@@ -102,39 +105,4 @@ struct uart_omap_dma {
unsigned int rx_timeout;
};
-struct uart_omap_port {
- struct uart_port port;
- struct uart_omap_dma uart_dma;
- struct platform_device *pdev;
-
- unsigned char ier;
- unsigned char lcr;
- unsigned char mcr;
- unsigned char fcr;
- unsigned char efr;
- unsigned char dll;
- unsigned char dlh;
- unsigned char mdr1;
- unsigned char scr;
-
- int use_dma;
- /*
- * Some bits in registers are cleared on a read, so they must
- * be saved whenever the register is read but the bits will not
- * be immediately processed.
- */
- unsigned int lsr_break_flag;
- unsigned char msr_saved_flags;
- char name[20];
- unsigned long port_activity;
- u32 context_loss_cnt;
- u32 errata;
- u8 wakeups_enabled;
-
- struct pm_qos_request pm_qos_request;
- u32 latency;
- u32 calc_latency;
- struct work_struct qos_work;
-};
-
#endif /* __OMAP_SERIAL_H__ */
diff --git a/arch/arm/plat-omap/include/plat/omap4-keypad.h b/arch/arm/plat-omap/include/plat/omap4-keypad.h
index 8ad0a377a54b..20de0d5a7e77 100644
--- a/arch/arm/plat-omap/include/plat/omap4-keypad.h
+++ b/arch/arm/plat-omap/include/plat/omap4-keypad.h
@@ -1,6 +1,8 @@
#ifndef ARCH_ARM_PLAT_OMAP4_KEYPAD_H
#define ARCH_ARM_PLAT_OMAP4_KEYPAD_H
+struct omap_board_data;
+
extern int omap4_keyboard_init(struct omap4_keypad_platform_data *,
struct omap_board_data *);
#endif
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 6132972aff37..5857b9cd6eb9 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -615,6 +615,7 @@ int omap_hwmod_softreset(struct omap_hwmod *oh);
int omap_hwmod_count_resources(struct omap_hwmod *oh);
int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
+int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res);
int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
const char *name, struct resource *res);
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 548a4c8d63df..bd20588c356b 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -5,7 +5,6 @@
#include <linux/io.h>
#include <linux/usb/musb.h>
-#include <plat/board.h>
#define OMAP3_HS_USB_PORTS 3
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index c490240bb82c..6f5c58096819 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -370,6 +370,14 @@ static int omap_device_build_from_dt(struct platform_device *pdev)
goto odbfd_exit1;
}
+ /* Fix up missing resource names */
+ for (i = 0; i < pdev->num_resources; i++) {
+ struct resource *r = &pdev->resource[i];
+
+ if (r->name == NULL)
+ r->name = dev_name(&pdev->dev);
+ }
+
if (of_get_property(node, "ti,no_idle_on_suspend", NULL))
omap_device_disable_idle_on_suspend(pdev);
@@ -486,6 +494,33 @@ static int omap_device_fill_resources(struct omap_device *od,
}
/**
+ * _od_fill_dma_resources - fill in array of struct resource with dma resources
+ * @od: struct omap_device *
+ * @res: pointer to an array of struct resource to be filled in
+ *
+ * Populate one or more empty struct resource pointed to by @res with
+ * the dma resource data for this omap_device @od. Used by
+ * omap_device_alloc() after calling omap_device_count_resources().
+ *
+ * Ideally this function would not be needed at all. If we have
+ * mechanism to get dma resources from DT.
+ *
+ * Returns 0.
+ */
+static int _od_fill_dma_resources(struct omap_device *od,
+ struct resource *res)
+{
+ int i, r;
+
+ for (i = 0; i < od->hwmods_cnt; i++) {
+ r = omap_hwmod_fill_dma_resources(od->hwmods[i], res);
+ res += r;
+ }
+
+ return 0;
+}
+
+/**
* omap_device_alloc - allocate an omap_device
* @pdev: platform_device that will be included in this omap_device
* @oh: ptr to the single omap_hwmod that backs this omap_device
@@ -524,24 +559,44 @@ struct omap_device *omap_device_alloc(struct platform_device *pdev,
od->hwmods = hwmods;
od->pdev = pdev;
+ res_count = omap_device_count_resources(od);
/*
- * HACK: Ideally the resources from DT should match, and hwmod
- * should just add the missing ones. Since the name is not
- * properly populated by DT, stick to hwmod resources only.
+ * DT Boot:
+ * OF framework will construct the resource structure (currently
+ * does for MEM & IRQ resource) and we should respect/use these
+ * resources, killing hwmod dependency.
+ * If pdev->num_resources > 0, we assume that MEM & IRQ resources
+ * have been allocated by OF layer already (through DTB).
+ *
+ * Non-DT Boot:
+ * Here, pdev->num_resources = 0, and we should get all the
+ * resources from hwmod.
+ *
+ * TODO: Once DMA resource is available from OF layer, we should
+ * kill filling any resources from hwmod.
*/
- if (pdev->num_resources && pdev->resource)
- dev_warn(&pdev->dev, "%s(): resources already allocated %d\n",
- __func__, pdev->num_resources);
-
- res_count = omap_device_count_resources(od);
- if (res_count > 0) {
- dev_dbg(&pdev->dev, "%s(): resources allocated from hwmod %d\n",
- __func__, res_count);
+ if (res_count > pdev->num_resources) {
+ /* Allocate resources memory to account for new resources */
res = kzalloc(sizeof(struct resource) * res_count, GFP_KERNEL);
if (!res)
goto oda_exit3;
- omap_device_fill_resources(od, res);
+ /*
+ * If pdev->num_resources > 0, then assume that,
+ * MEM and IRQ resources will only come from DT and only
+ * fill DMA resource from hwmod layer.
+ */
+ if (pdev->num_resources && pdev->resource) {
+ dev_dbg(&pdev->dev, "%s(): resources already allocated %d\n",
+ __func__, res_count);
+ memcpy(res, pdev->resource,
+ sizeof(struct resource) * pdev->num_resources);
+ _od_fill_dma_resources(od, &res[pdev->num_resources]);
+ } else {
+ dev_dbg(&pdev->dev, "%s(): using resources from hwmod %d\n",
+ __func__, res_count);
+ omap_device_fill_resources(od, res);
+ }
ret = platform_device_add_resources(pdev, res, res_count);
kfree(res);
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 766181cb5c95..d861aa73299d 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -26,7 +26,6 @@
#include <asm/mach/map.h>
#include <plat/sram.h>
-#include <plat/board.h>
#include <plat/cpu.h>
#include "sram.h"