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-rw-r--r--arch/arm/plat-omap/include/plat/omap-serial.h55
1 files changed, 0 insertions, 55 deletions
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
index 1957a8516e93..ff9b0aab5281 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -30,35 +30,6 @@
*/
#define OMAP_SERIAL_NAME "ttyO"
-#define OMAP_MODE13X_SPEED 230400
-
-#define OMAP_UART_SCR_TX_EMPTY 0x08
-
-/* WER = 0x7F
- * Enable module level wakeup in WER reg
- */
-#define OMAP_UART_WER_MOD_WKUP 0X7F
-
-/* Enable XON/XOFF flow control on output */
-#define OMAP_UART_SW_TX 0x04
-
-/* Enable XON/XOFF flow control on input */
-#define OMAP_UART_SW_RX 0x04
-
-#define OMAP_UART_SYSC_RESET 0X07
-#define OMAP_UART_TCR_TRIG 0X0F
-#define OMAP_UART_SW_CLR 0XF0
-#define OMAP_UART_FIFO_CLR 0X06
-
-#define OMAP_UART_DMA_CH_FREE -1
-
-#define OMAP_MAX_HSUART_PORTS 6
-
-#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
-
-#define UART_ERRATA_i202_MDR1_ACCESS BIT(0)
-#define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1)
-
struct omap_uart_port_info {
bool dma_enabled; /* To specify DMA Mode */
unsigned int uartclk; /* UART clock rate */
@@ -77,30 +48,4 @@ struct omap_uart_port_info {
void (*enable_wakeup)(struct device *, bool);
};
-struct uart_omap_dma {
- u8 uart_dma_tx;
- u8 uart_dma_rx;
- int rx_dma_channel;
- int tx_dma_channel;
- dma_addr_t rx_buf_dma_phys;
- dma_addr_t tx_buf_dma_phys;
- unsigned int uart_base;
- /*
- * Buffer for rx dma.It is not required for tx because the buffer
- * comes from port structure.
- */
- unsigned char *rx_buf;
- unsigned int prev_rx_dma_pos;
- int tx_buf_size;
- int tx_dma_used;
- int rx_dma_used;
- spinlock_t tx_lock;
- spinlock_t rx_lock;
- /* timer to poll activity on rx dma */
- struct timer_list rx_timer;
- unsigned int rx_buf_size;
- unsigned int rx_poll_rate;
- unsigned int rx_timeout;
-};
-
#endif /* __OMAP_SERIAL_H__ */