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path: root/drivers/char/rocket_int.h
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Diffstat (limited to 'drivers/char/rocket_int.h')
-rw-r--r--drivers/char/rocket_int.h83
1 files changed, 37 insertions, 46 deletions
diff --git a/drivers/char/rocket_int.h b/drivers/char/rocket_int.h
index f3a75791b811..b01d38125a8f 100644
--- a/drivers/char/rocket_int.h
+++ b/drivers/char/rocket_int.h
@@ -26,7 +26,6 @@ typedef unsigned int ByteIO_t;
typedef unsigned int Word_t;
typedef unsigned int WordIO_t;
-typedef unsigned long DWord_t;
typedef unsigned int DWordIO_t;
/*
@@ -38,7 +37,6 @@ typedef unsigned int DWordIO_t;
* instruction.
*/
-#ifdef ROCKET_DEBUG_IO
static inline void sOutB(unsigned short port, unsigned char value)
{
#ifdef ROCKET_DEBUG_IO
@@ -55,12 +53,13 @@ static inline void sOutW(unsigned short port, unsigned short value)
outw_p(value, port);
}
-static inline void sOutDW(unsigned short port, unsigned long value)
+static inline void out32(unsigned short port, Byte_t *p)
{
+ u32 value = le32_to_cpu(get_unaligned((__le32 *)p));
#ifdef ROCKET_DEBUG_IO
- printk(KERN_DEBUG "sOutDW(%x, %lx)...\n", port, value);
+ printk(KERN_DEBUG "out32(%x, %lx)...\n", port, value);
#endif
- outl_p(cpu_to_le32(value), port);
+ outl_p(value, port);
}
static inline unsigned char sInB(unsigned short port)
@@ -73,14 +72,6 @@ static inline unsigned short sInW(unsigned short port)
return inw_p(port);
}
-#else /* !ROCKET_DEBUG_IO */
-#define sOutB(a, b) outb_p(b, a)
-#define sOutW(a, b) outw_p(b, a)
-#define sOutDW(port, value) outl_p(cpu_to_le32(value), port)
-#define sInB(a) (inb_p(a))
-#define sInW(a) (inw_p(a))
-#endif /* ROCKET_DEBUG_IO */
-
/* This is used to move arrays of bytes so byte swapping isn't appropriate. */
#define sOutStrW(port, addr, count) if (count) outsw(port, addr, count)
#define sInStrW(port, addr, count) if (count) insw(port, addr, count)
@@ -390,7 +381,7 @@ Call: sClrBreak(ChP)
#define sClrBreak(ChP) \
do { \
(ChP)->TxControl[3] &= ~SETBREAK; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -402,7 +393,7 @@ Call: sClrDTR(ChP)
#define sClrDTR(ChP) \
do { \
(ChP)->TxControl[3] &= ~SET_DTR; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -415,7 +406,7 @@ Call: sClrRTS(ChP)
do { \
if ((ChP)->rtsToggle) break; \
(ChP)->TxControl[3] &= ~SET_RTS; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -489,7 +480,7 @@ Call: sDisCTSFlowCtl(ChP)
#define sDisCTSFlowCtl(ChP) \
do { \
(ChP)->TxControl[2] &= ~CTSFC_EN; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -501,7 +492,7 @@ Call: sDisIXANY(ChP)
#define sDisIXANY(ChP) \
do { \
(ChP)->R[0x0e] = 0x86; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x0c]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x0c]); \
} while (0)
/***************************************************************************
@@ -515,7 +506,7 @@ Comments: Function sSetParity() can be used in place of functions sEnParity(),
#define sDisParity(ChP) \
do { \
(ChP)->TxControl[2] &= ~PARITY_EN; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -527,7 +518,7 @@ Call: sDisRTSToggle(ChP)
#define sDisRTSToggle(ChP) \
do { \
(ChP)->TxControl[2] &= ~RTSTOG_EN; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
(ChP)->rtsToggle = 0; \
} while (0)
@@ -540,7 +531,7 @@ Call: sDisRxFIFO(ChP)
#define sDisRxFIFO(ChP) \
do { \
(ChP)->R[0x32] = 0x0a; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x30]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x30]); \
} while (0)
/***************************************************************************
@@ -567,7 +558,7 @@ Call: sDisTransmit(ChP)
#define sDisTransmit(ChP) \
do { \
(ChP)->TxControl[3] &= ~TX_ENABLE; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -579,7 +570,7 @@ Call: sDisTxSoftFlowCtl(ChP)
#define sDisTxSoftFlowCtl(ChP) \
do { \
(ChP)->R[0x06] = 0x8a; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x04]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \
} while (0)
/***************************************************************************
@@ -604,7 +595,7 @@ Call: sEnCTSFlowCtl(ChP)
#define sEnCTSFlowCtl(ChP) \
do { \
(ChP)->TxControl[2] |= CTSFC_EN; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -616,7 +607,7 @@ Call: sEnIXANY(ChP)
#define sEnIXANY(ChP) \
do { \
(ChP)->R[0x0e] = 0x21; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x0c]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x0c]); \
} while (0)
/***************************************************************************
@@ -633,7 +624,7 @@ Warnings: Before enabling parity odd or even parity should be chosen using
#define sEnParity(ChP) \
do { \
(ChP)->TxControl[2] |= PARITY_EN; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -647,10 +638,10 @@ Comments: This function will disable RTS flow control and clear the RTS
#define sEnRTSToggle(ChP) \
do { \
(ChP)->RxControl[2] &= ~RTSFC_EN; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->RxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->RxControl); \
(ChP)->TxControl[2] |= RTSTOG_EN; \
(ChP)->TxControl[3] &= ~SET_RTS; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
(ChP)->rtsToggle = 1; \
} while (0)
@@ -663,7 +654,7 @@ Call: sEnRxFIFO(ChP)
#define sEnRxFIFO(ChP) \
do { \
(ChP)->R[0x32] = 0x08; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x30]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x30]); \
} while (0)
/***************************************************************************
@@ -684,7 +675,7 @@ Warnings: This function must be called after valid microcode has been
#define sEnRxProcessor(ChP) \
do { \
(ChP)->RxControl[2] |= RXPROC_EN; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->RxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->RxControl); \
} while (0)
/***************************************************************************
@@ -708,7 +699,7 @@ Call: sEnTransmit(ChP)
#define sEnTransmit(ChP) \
do { \
(ChP)->TxControl[3] |= TX_ENABLE; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -720,7 +711,7 @@ Call: sEnTxSoftFlowCtl(ChP)
#define sEnTxSoftFlowCtl(ChP) \
do { \
(ChP)->R[0x06] = 0xc5; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x04]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \
} while (0)
/***************************************************************************
@@ -927,7 +918,7 @@ Call: sSendBreak(ChP)
#define sSendBreak(ChP) \
do { \
(ChP)->TxControl[3] |= SETBREAK; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -941,7 +932,7 @@ Call: sSetBaud(ChP,Divisor)
do { \
(ChP)->BaudDiv[2] = (Byte_t)(DIVISOR); \
(ChP)->BaudDiv[3] = (Byte_t)((DIVISOR) >> 8); \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->BaudDiv[0]); \
+ out32((ChP)->IndexAddr,(ChP)->BaudDiv); \
} while (0)
/***************************************************************************
@@ -953,7 +944,7 @@ Call: sSetData7(ChP)
#define sSetData7(ChP) \
do { \
(ChP)->TxControl[2] &= ~DATA8BIT; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -965,7 +956,7 @@ Call: sSetData8(ChP)
#define sSetData8(ChP) \
do { \
(ChP)->TxControl[2] |= DATA8BIT; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -977,7 +968,7 @@ Call: sSetDTR(ChP)
#define sSetDTR(ChP) \
do { \
(ChP)->TxControl[3] |= SET_DTR; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -994,7 +985,7 @@ Warnings: This function has no effect unless parity is enabled with function
#define sSetEvenParity(ChP) \
do { \
(ChP)->TxControl[2] |= EVEN_PAR; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -1011,7 +1002,7 @@ Warnings: This function has no effect unless parity is enabled with function
#define sSetOddParity(ChP) \
do { \
(ChP)->TxControl[2] &= ~EVEN_PAR; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -1024,7 +1015,7 @@ Call: sSetRTS(ChP)
do { \
if ((ChP)->rtsToggle) break; \
(ChP)->TxControl[3] |= SET_RTS; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -1050,7 +1041,7 @@ Comments: An interrupt will be generated when the trigger level is reached
do { \
(ChP)->RxControl[2] &= ~TRIG_MASK; \
(ChP)->RxControl[2] |= LEVEL; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->RxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->RxControl); \
} while (0)
/***************************************************************************
@@ -1062,7 +1053,7 @@ Call: sSetStop1(ChP)
#define sSetStop1(ChP) \
do { \
(ChP)->TxControl[2] &= ~STOP2; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -1074,7 +1065,7 @@ Call: sSetStop2(ChP)
#define sSetStop2(ChP) \
do { \
(ChP)->TxControl[2] |= STOP2; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -1087,7 +1078,7 @@ Call: sSetTxXOFFChar(ChP,Ch)
#define sSetTxXOFFChar(ChP,CH) \
do { \
(ChP)->R[0x07] = (CH); \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x04]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \
} while (0)
/***************************************************************************
@@ -1100,7 +1091,7 @@ Call: sSetTxXONChar(ChP,Ch)
#define sSetTxXONChar(ChP,CH) \
do { \
(ChP)->R[0x0b] = (CH); \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x08]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x08]); \
} while (0)
/***************************************************************************
@@ -1113,7 +1104,7 @@ Comments: This function is used to start a Rx processor after it was
will restart both the Rx processor and software input flow control.
*/
-#define sStartRxProcessor(ChP) sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0])
+#define sStartRxProcessor(ChP) out32((ChP)->IndexAddr,&(ChP)->R[0])
/***************************************************************************
Function: sWriteTxByte
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-26 18:31:46 +0000