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Diffstat (limited to 'sound')
-rw-r--r--sound/arm/pxa2xx-ac97-lib.c68
-rw-r--r--sound/soc/pxa/pxa-ssp.c93
-rw-r--r--sound/soc/s3c24xx/s3c64xx-i2s.c4
3 files changed, 70 insertions, 95 deletions
diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c
index 6fdca97186e7..88eec3847df2 100644
--- a/sound/arm/pxa2xx-ac97-lib.c
+++ b/sound/arm/pxa2xx-ac97-lib.c
@@ -22,7 +22,6 @@
#include <asm/irq.h>
#include <mach/regs-ac97.h>
-#include <mach/pxa2xx-gpio.h>
#include <mach/audio.h>
static DEFINE_MUTEX(car_mutex);
@@ -32,6 +31,8 @@ static struct clk *ac97_clk;
static struct clk *ac97conf_clk;
static int reset_gpio;
+extern void pxa27x_assert_ac97reset(int reset_gpio, int on);
+
/*
* Beware PXA27x bugs:
*
@@ -42,45 +43,6 @@ static int reset_gpio;
* 1 jiffy timeout if interrupt never comes).
*/
-enum {
- RESETGPIO_FORCE_HIGH,
- RESETGPIO_FORCE_LOW,
- RESETGPIO_NORMAL_ALTFUNC
-};
-
-/**
- * set_resetgpio_mode - computes and sets the AC97_RESET gpio mode on PXA
- * @mode: chosen action
- *
- * As the PXA27x CPUs suffer from a AC97 bug, a manual control of the reset line
- * must be done to insure proper work of AC97 reset line. This function
- * computes the correct gpio_mode for further use by reset functions, and
- * applied the change through pxa_gpio_mode.
- */
-static void set_resetgpio_mode(int resetgpio_action)
-{
- int mode = 0;
-
- if (reset_gpio)
- switch (resetgpio_action) {
- case RESETGPIO_NORMAL_ALTFUNC:
- if (reset_gpio == 113)
- mode = 113 | GPIO_ALT_FN_2_OUT;
- if (reset_gpio == 95)
- mode = 95 | GPIO_ALT_FN_1_OUT;
- break;
- case RESETGPIO_FORCE_LOW:
- mode = reset_gpio | GPIO_OUT | GPIO_DFLT_LOW;
- break;
- case RESETGPIO_FORCE_HIGH:
- mode = reset_gpio | GPIO_OUT | GPIO_DFLT_HIGH;
- break;
- };
-
- if (mode)
- pxa_gpio_mode(mode);
-}
-
unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
{
unsigned short val = -1;
@@ -174,12 +136,11 @@ static inline void pxa_ac97_warm_pxa27x(void)
{
gsr_bits = 0;
- /* warm reset broken on Bulverde,
- so manually keep AC97 reset high */
- set_resetgpio_mode(RESETGPIO_FORCE_HIGH);
+ /* warm reset broken on Bulverde, so manually keep AC97 reset high */
+ pxa27x_assert_ac97reset(reset_gpio, 1);
udelay(10);
GCR |= GCR_WARM_RST;
- set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC);
+ pxa27x_assert_ac97reset(reset_gpio, 0);
udelay(500);
}
@@ -345,16 +306,6 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_suspend);
int pxa2xx_ac97_hw_resume(void)
{
- if (cpu_is_pxa25x() || cpu_is_pxa27x()) {
- pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
- pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
- pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
- pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
- }
- if (cpu_is_pxa27x()) {
- /* Use GPIO 113 or 95 as AC97 Reset on Bulverde */
- set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC);
- }
clk_enable(ac97_clk);
return 0;
}
@@ -386,16 +337,9 @@ int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev)
reset_gpio = 113;
}
- if (cpu_is_pxa25x() || cpu_is_pxa27x()) {
- pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
- pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
- pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
- pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
- }
-
if (cpu_is_pxa27x()) {
/* Use GPIO 113 as AC97 Reset on Bulverde */
- set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC);
+ pxa27x_assert_ac97reset(reset_gpio, 0);
ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK");
if (IS_ERR(ac97conf_clk)) {
ret = PTR_ERR(ac97conf_clk);
diff --git a/sound/soc/pxa/pxa-ssp.c b/sound/soc/pxa/pxa-ssp.c
index e69397f40f72..9e95e5117c88 100644
--- a/sound/soc/pxa/pxa-ssp.c
+++ b/sound/soc/pxa/pxa-ssp.c
@@ -42,11 +42,14 @@
* SSP audio private data
*/
struct ssp_priv {
- struct ssp_dev dev;
+ struct ssp_device *ssp;
unsigned int sysclk;
int dai_fmt;
#ifdef CONFIG_PM
- struct ssp_state state;
+ uint32_t cr0;
+ uint32_t cr1;
+ uint32_t to;
+ uint32_t psp;
#endif
};
@@ -61,6 +64,22 @@ static void dump_registers(struct ssp_device *ssp)
ssp_read_reg(ssp, SSACD));
}
+static void ssp_enable(struct ssp_device *ssp)
+{
+ uint32_t sscr0;
+
+ sscr0 = __raw_readl(ssp->mmio_base + SSCR0) | SSCR0_SSE;
+ __raw_writel(sscr0, ssp->mmio_base + SSCR0);
+}
+
+static void ssp_disable(struct ssp_device *ssp)
+{
+ uint32_t sscr0;
+
+ sscr0 = __raw_readl(ssp->mmio_base + SSCR0) & ~SSCR0_SSE;
+ __raw_writel(sscr0, ssp->mmio_base + SSCR0);
+}
+
struct pxa2xx_pcm_dma_data {
struct pxa2xx_pcm_dma_params params;
char name[20];
@@ -94,13 +113,12 @@ static int pxa_ssp_startup(struct snd_pcm_substream *substream,
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
struct ssp_priv *priv = cpu_dai->private_data;
+ struct ssp_device *ssp = priv->ssp;
int ret = 0;
if (!cpu_dai->active) {
- priv->dev.port = cpu_dai->id + 1;
- priv->dev.irq = NO_IRQ;
- clk_enable(priv->dev.ssp->clk);
- ssp_disable(&priv->dev);
+ clk_enable(ssp->clk);
+ ssp_disable(ssp);
}
if (cpu_dai->dma_data) {
@@ -116,10 +134,11 @@ static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
struct ssp_priv *priv = cpu_dai->private_data;
+ struct ssp_device *ssp = priv->ssp;
if (!cpu_dai->active) {
- ssp_disable(&priv->dev);
- clk_disable(priv->dev.ssp->clk);
+ ssp_disable(ssp);
+ clk_disable(ssp->clk);
}
if (cpu_dai->dma_data) {
@@ -133,27 +152,39 @@ static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai)
{
struct ssp_priv *priv = cpu_dai->private_data;
+ struct ssp_device *ssp = priv->ssp;
if (!cpu_dai->active)
- clk_enable(priv->dev.ssp->clk);
+ clk_enable(ssp->clk);
- ssp_save_state(&priv->dev, &priv->state);
- clk_disable(priv->dev.ssp->clk);
+ priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0);
+ priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1);
+ priv->to = __raw_readl(ssp->mmio_base + SSTO);
+ priv->psp = __raw_readl(ssp->mmio_base + SSPSP);
+ ssp_disable(ssp);
+ clk_disable(ssp->clk);
return 0;
}
static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai)
{
struct ssp_priv *priv = cpu_dai->private_data;
+ struct ssp_device *ssp = priv->ssp;
+ uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE;
+
+ clk_enable(ssp->clk);
- clk_enable(priv->dev.ssp->clk);
- ssp_restore_state(&priv->dev, &priv->state);
+ __raw_writel(sssr, ssp->mmio_base + SSSR);
+ __raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0);
+ __raw_writel(priv->cr1, ssp->mmio_base + SSCR1);
+ __raw_writel(priv->to, ssp->mmio_base + SSTO);
+ __raw_writel(priv->psp, ssp->mmio_base + SSPSP);
if (cpu_dai->active)
- ssp_enable(&priv->dev);
+ ssp_enable(ssp);
else
- clk_disable(priv->dev.ssp->clk);
+ clk_disable(ssp->clk);
return 0;
}
@@ -203,7 +234,7 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
int clk_id, unsigned int freq, int dir)
{
struct ssp_priv *priv = cpu_dai->private_data;
- struct ssp_device *ssp = priv->dev.ssp;
+ struct ssp_device *ssp = priv->ssp;
int val;
u32 sscr0 = ssp_read_reg(ssp, SSCR0) &
@@ -244,11 +275,11 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
/* The SSP clock must be disabled when changing SSP clock mode
* on PXA2xx. On PXA3xx it must be enabled when doing so. */
if (!cpu_is_pxa3xx())
- clk_disable(priv->dev.ssp->clk);
+ clk_disable(ssp->clk);
val = ssp_read_reg(ssp, SSCR0) | sscr0;
ssp_write_reg(ssp, SSCR0, val);
if (!cpu_is_pxa3xx())
- clk_enable(priv->dev.ssp->clk);
+ clk_enable(ssp->clk);
return 0;
}
@@ -260,7 +291,7 @@ static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
int div_id, int div)
{
struct ssp_priv *priv = cpu_dai->private_data;
- struct ssp_device *ssp = priv->dev.ssp;
+ struct ssp_device *ssp = priv->ssp;
int val;
switch (div_id) {
@@ -311,7 +342,7 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
int source, unsigned int freq_in, unsigned int freq_out)
{
struct ssp_priv *priv = cpu_dai->private_data;
- struct ssp_device *ssp = priv->dev.ssp;
+ struct ssp_device *ssp = priv->ssp;
u32 ssacd = ssp_read_reg(ssp, SSACD) & ~0x70;
#if defined(CONFIG_PXA3xx)
@@ -380,7 +411,7 @@ static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
{
struct ssp_priv *priv = cpu_dai->private_data;
- struct ssp_device *ssp = priv->dev.ssp;
+ struct ssp_device *ssp = priv->ssp;
u32 sscr0;
sscr0 = ssp_read_reg(ssp, SSCR0);
@@ -415,7 +446,7 @@ static int pxa_ssp_set_dai_tristate(struct snd_soc_dai *cpu_dai,
int tristate)
{
struct ssp_priv *priv = cpu_dai->private_data;
- struct ssp_device *ssp = priv->dev.ssp;
+ struct ssp_device *ssp = priv->ssp;
u32 sscr1;
sscr1 = ssp_read_reg(ssp, SSCR1);
@@ -437,7 +468,7 @@ static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
unsigned int fmt)
{
struct ssp_priv *priv = cpu_dai->private_data;
- struct ssp_device *ssp = priv->dev.ssp;
+ struct ssp_device *ssp = priv->ssp;
u32 sscr0;
u32 sscr1;
u32 sspsp;
@@ -532,7 +563,7 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
struct ssp_priv *priv = cpu_dai->private_data;
- struct ssp_device *ssp = priv->dev.ssp;
+ struct ssp_device *ssp = priv->ssp;
int chn = params_channels(params);
u32 sscr0;
u32 sspsp;
@@ -642,12 +673,12 @@ static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
int ret = 0;
struct ssp_priv *priv = cpu_dai->private_data;
- struct ssp_device *ssp = priv->dev.ssp;
+ struct ssp_device *ssp = priv->ssp;
int val;
switch (cmd) {
case SNDRV_PCM_TRIGGER_RESUME:
- ssp_enable(&priv->dev);
+ ssp_enable(ssp);
break;
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
val = ssp_read_reg(ssp, SSCR1);
@@ -666,7 +697,7 @@ static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
else
val |= SSCR1_RSRE;
ssp_write_reg(ssp, SSCR1, val);
- ssp_enable(&priv->dev);
+ ssp_enable(ssp);
break;
case SNDRV_PCM_TRIGGER_STOP:
val = ssp_read_reg(ssp, SSCR1);
@@ -677,7 +708,7 @@ static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
ssp_write_reg(ssp, SSCR1, val);
break;
case SNDRV_PCM_TRIGGER_SUSPEND:
- ssp_disable(&priv->dev);
+ ssp_disable(ssp);
break;
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
val = ssp_read_reg(ssp, SSCR1);
@@ -707,8 +738,8 @@ static int pxa_ssp_probe(struct platform_device *pdev,
if (!priv)
return -ENOMEM;
- priv->dev.ssp = ssp_request(dai->id + 1, "SoC audio");
- if (priv->dev.ssp == NULL) {
+ priv->ssp = ssp_request(dai->id + 1, "SoC audio");
+ if (priv->ssp == NULL) {
ret = -ENODEV;
goto err_priv;
}
@@ -727,7 +758,7 @@ static void pxa_ssp_remove(struct platform_device *pdev,
struct snd_soc_dai *dai)
{
struct ssp_priv *priv = dai->private_data;
- ssp_free(priv->dev.ssp);
+ ssp_free(priv->ssp);
}
#define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
diff --git a/sound/soc/s3c24xx/s3c64xx-i2s.c b/sound/soc/s3c24xx/s3c64xx-i2s.c
index 93ed3aad1631..a72c251401ac 100644
--- a/sound/soc/s3c24xx/s3c64xx-i2s.c
+++ b/sound/soc/s3c24xx/s3c64xx-i2s.c
@@ -22,8 +22,8 @@
#include <sound/soc.h>
#include <plat/regs-s3c2412-iis.h>
-#include <plat/gpio-bank-d.h>
-#include <plat/gpio-bank-e.h>
+#include <mach/gpio-bank-d.h>
+#include <mach/gpio-bank-e.h>
#include <plat/gpio-cfg.h>
#include <mach/map.h>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-25 14:34:13 +0000