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git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt
From Stephen Warren:
ARM: tegra: device tree changes
This branch adds two main features to Tegra boards, simply by amending
device tree files: regulator support and the ability to turn off system
power when executing "shutdown".
As part of these changes, the board file for Cardhu is split into two
versions, since different revisions have different hardware in some
areas, especially related to regulators.
* tag 'tegra-for-3.7-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: dt: tegra: configure power off for some boards
ARM: dt: tegra: whistler: add regulators
ARM: dt: tegra: paz00: add regulators
ARM: dt: tegra: ventana: add regulators
ARM: dt: tegra: seaboard: add regulators
ARM: tegra: cardhu: add dt entry for fixed regulators
ARM: dt: tegra: cardhu: split dts file for support multiple board versions
ARM: dt: tegra: cardhu: add entry for PMIC TPS65911.
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/dt
From David Brown:
These patches migrate both the 8660 and 8960 targets on msm to be
devicetree only. This also sets most of the frame in place necessary
to build both targets into the same image.
There's a couple of cleanups in here that are kept in this series
because they are intimately tied to the changes necessary to support
the devicetree conversions.
By Stephen Boyd
via David Brown
* tag 'msm-dt-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm:
ARM: msm: Remove non-DT targets from 8960
ARM: msm: Add DT support for 8960
ARM: msm: Move io mapping prototypes to common.h
ARM: msm: Rename board-msm8x60 to signify its DT only status
ARM: msm: Make 8660 a DT only target
ARM: msm: Move 8660 to DT timer
ARM: msm: Add DT support to msm_timer
ARM: msm: Allow timer.c to compile on multiple targets
ARM: msm: Don't touch GIC registers outside of GIC code
ARM: msm: Add msm8660-surf.dts to Makefile.boot
ARM: msm: Add handle_irq handler for 8660 DT machine
Resolved trivial context conflict in arch/arm/mach-msm/io.c and a
remove/change conflict in arch/arm/mach-msm/board-msm8x60.c.
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merging in fixes and cleanup as prereqs to simplify merge conflicts.
* msm/fixes-non-critical:
ARM: msm: Fix early debug uart mapping on some memory configs
ARM: msm: io: Change the default static iomappings to be shared
ARM: msm: io: Remove 7x30 iomap region from 7x00
ARM: msm: Remove call to missing FPGA init on 8660
* msm/cleanup:
ARM: msm: Remove uncompiled board-msm7x27
ARM: msm: Remove unused acpuclock-arm11
ARM: msm: dma: use list_move_tail instead of list_del/list_add_tail
ARM: msm: Fix sparse warnings due to incorrect type
ARM: msm: Remove unused idle.c
ARM: msm: clock-pcom: Mark functions static
ARM: msm: Remove msm_hw_reset_hook
Signed-off-by: Olof Johansson <olof@lixom.net>
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Remove the non-DT targets supported by 8960. This makes 8960 a
device tree only target.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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Add basic support to boot 8960 with device tree. For now just
support a basic machine with a uart device.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[davidb@codeaurora.org: Remove leading zeros]
Signed-off-by: David Brown <davidb@codeaurora.org>
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Consolidate the handful of iomapping functions into common.h so
that board files don't need to include mach/msm_iomap.h if they
don't need static virtual mapping addresses.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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Rename this file to signify that this board is only supported via
devicetree.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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We don't plan to support anything besides devicetree on these
targets so remove all other machine support.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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Add the timer entry and point the machine descriptor to the
device tree based msm timer.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[davidb@codeaurora.org: Remove leading zeros]
Signed-off-by: David Brown <davidb@codeaurora.org>
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Add support to setup the MSM timer via information obtained from
the devicetree.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[davidb@codeaurora.org: Remove leading zeros]
Signed-off-by: David Brown <davidb@codeaurora.org>
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The timer code relies on #defines from mach/iomap.h, cpu_is_*()
checks, and a global irq #define. All this makes this file
impossible to compile in a mult-target build. Therefore, make a
sys_timer struct for each SoC so that machine descriptors can
reference the correct timer. Then go through and replace all the
defines with raw values that are passed to a common
initialization function.
This paves the way to adding DT support to this code as well as
allows us to compile this file on multiple targets at the same
time.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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The MSM code has some antiquated register writes to set up the
PPIs to be edge triggered. Now that we have the percpu irq
interface we don't need this code so let's remove it and update
the percpu irq user (msm_timer) to set the irq type.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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This board file has never been compiled. Let's just remove it
along with the one Kconfig reference to it in io.c.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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This is dead code that isn't initialized or setup (although it is
compiled). Remove it and the data structures it references.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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Using list_move_tail() instead of list_del() + list_add_tail().
spatch with a semantic match is used to found this problem.
(http://coccinelle.lip6.fr/)
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: David Brown <davidb@codeaurora.org>
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arch/arm/mach-msm/timer.c:153:3: warning: incorrect type in initializer (different address spaces)
arch/arm/mach-msm/timer.c:153:3: expected void const [noderef] <asn:3>*__vpp_verify
arch/arm/mach-msm/timer.c:153:3: got struct clock_event_device [noderef] <asn:3>**<noident>
arch/arm/mach-msm/timer.c:153:38: warning: incorrect type in assignment (different address spaces)
arch/arm/mach-msm/timer.c:153:38: expected struct clock_event_device [noderef] <asn:3>*<noident>
arch/arm/mach-msm/timer.c:153:38: got struct clock_event_device *evt
arch/arm/mach-msm/timer.c:191:22: warning: incorrect type in assignment (different address spaces)
arch/arm/mach-msm/timer.c:191:22: expected struct clock_event_device [noderef] <asn:3>**static [toplevel] percpu_evt
arch/arm/mach-msm/timer.c:191:22: got struct clock_event_device *[noderef] <asn:3>*<noident>
arch/arm/mach-msm/timer.c:196:4: warning: incorrect type in initializer (different address spaces)
arch/arm/mach-msm/timer.c:196:4: expected void const [noderef] <asn:3>*__vpp_verify
arch/arm/mach-msm/timer.c:196:4: got struct clock_event_device [noderef] <asn:3>**<noident>
arch/arm/mach-msm/timer.c:196:39: warning: incorrect type in assignment (different address spaces)
arch/arm/mach-msm/timer.c:196:39: expected struct clock_event_device [noderef] <asn:3>*<noident>
arch/arm/mach-msm/timer.c:196:39: got struct clock_event_device *ce
arch/arm/mach-msm/timer.c:198:24: warning: incorrect type in argument 4 (different address spaces)
arch/arm/mach-msm/timer.c:198:24: expected void [noderef] <asn:3>*percpu_dev_id
arch/arm/mach-msm/timer.c:198:24: got struct clock_event_device [noderef] <asn:3>**static [toplevel] percpu_evt
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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Add this entry to the Makefile so that we can build the dtb
automatically with 'make dtbs'.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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Commit 041f777 (ARM: msm: convert SMP platforms to
CONFIG_MULTI_IRQ_HANDLER, 2011-09-06) forgot to add the
.handle_irq for the DT machine record. Add it so we get
interrupts instead of panics on DT enabled bootloaders.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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The uart mapping runs into the space allocated for lowmem on some
8960 boards when we have more than 512Mb of memory. We were
getting lucky before and our mapping wasn't part of DDR. Move the
mapping up into the vmalloc area which will always be outside of
the lowmem mapping regardless of how much lowmem actually exists.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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Forcing arm_pm_idle to be msm_idle() doesn't make sense in
configurations that don't have CONFIG_MSM7X00A_IDLE=y (i.e. any
targets that aren't 7x00a). Furthermore, that config doesn't even
exist, so this entire file is dead code. Just remove it so we can
use the default idle support on MSM.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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These functions are only used within clock-pcom.c, therefore mark
them as static.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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This reset hook is never assigned and is dead code. Remove it so
we have one less header file in the mach directory.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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With 3.4 kernel the static iomappings can be shared with the ioremap
mappings. If ioremap is called with an address for which a static
mapping already exists, then that mapping should be used instead
of creating a new one.
However, the MT_DEVICE_NONSHARED flag prevents this. Hence, get rid
of this flag. Some targets (7X00) that require the static iomappings
to be NONSHARED use the MSM_DEVICE_TYPE and MSM_CHIP_DEVICE_TYPE macros.
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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This is redundant code.
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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A previous patch[1] added code to initialize an FPGA register on the
8660 "SURF" development platform. Since this development platform is
not widely available, and there is now a more available device "the
Dragonboard" based on the same core SOC, this change was dropped.
However, the DT code kept a lingering call to this FPGA init function.
Remove it.
[1] https://lkml.org/lkml/2011/8/12/357
Signed-off-by: David Brown <davidb@codeaurora.org>
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git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
It replaces the clk_register_clkdev in imx6q clock driver with DT
lookup. It depends on Mike's clk-3.7 branch.
* tag 'imx-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx6q: replace clk_register_clkdev with clock DT lookup
Resolved context add/remove conflict in arch/arm/boot/dts/imx6q.dtsi
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into next/dt
- All imx53 board files are removed by the equal device tree support
- The efikamx board files are removed to ease device tree migration
- Remove dummy pinctrl state by setting up pinctrl in device tree
* tag 'imx-dt-3.7' of git://git.linaro.org/people/shawnguo/linux-2.6: (28 commits)
ARM: imx6q-sabrelite: Rename 'pinctrl_gpio_hog'
ARM: imx51: decouple device tree boot from board files
ARM: imx51: build in pinctrl support
ARM: dts: imx51-babbage: add pinctrl settings
ARM: imx53: remove unneeded files and functions
ARM: imx53: support device tree boot only
ARM: imx53: decouple device tree boot from board files
ARM: imx53: build in pinctrl support
ARM: dts: imx53-smd: add pinctrl settings
ARM: dts: imx53-evk: add pinctrl settings
ARM: dts: imx53-ard: add pinctrl settings
ARM: dts: imx53-qsb: add pinctrl settings
ARM: imx6q: remove dummy pinctrl state
ARM: dts: imx6q-sabresd: add pinctrl settings
ARM: dts: imx6q-arm2: add pinctrl for uart and enet
ARM: dts: imx6q-sabrelite: add pinctrl for usdhc and enet
ARM: dts: imx6q: sort iomuxc sub-nodes in name
ARM: dts: imx6q: name iomuxc sub-nodes following pin function
ARM: dts: imx6q: improve indentation for fsl,pins
ARM: efikamx: remove Genesi Efika MX platform files from the tree
...
Resolved trivial context conflict in arch/arm/boot/dts/imx51-babbage.dts
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git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
It replaces clk_register_clkdev in mxs clock driver with DT lookup.
* tag 'mxs-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6:
clk: mxs: replace imx23 clk_register_clkdev with clock DT lookup
clk: mxs: replace imx28 clk_register_clkdev with clock DT lookup
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next/dt
* 'clk-3.7' of git://git.linaro.org/people/mturquette/linux:
clk: add of_clk_src_onecell_get() support
clk: ux500: Define smp_twd clock for u8500
mfd: dbx500: Provide a more accurate smp_twd clock
clk: ux500: Support for prmcu_rate clock
clk: Provide option for clk_get_rate to issue hw for new rate
clock: max77686: Add driver for Maxim 77686 32Khz crystal oscillator.
ARM: ux500: Switch to use common clock framework
clk: ux500: Clock definitions for u8500
clk: ux500: First version of clock definitions for ux500
clk: ux500: Adapt PRCMU and PRCC clocks for common clk
clk: versatile: make config option boolean
clk: add Loongson1B clock support
arm: mmp: make all SOCs use common clock by default
clk: mmp: add clock definition for mmp2
clk: mmp: add clock definition for pxa910
clk: mmp: add clock definition for pxa168
clk: mmp: add mmp specific clocks
clk: convert ARM RealView to common clk
clk: prima2: move from arch/arm/mach to drivers/clk
ARM: PRIMA2: convert to common clk and finish full clk tree
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into next/dt
- Remove all board files and make mach-mxs a DT-only platform
- Some dts file formatting and style fixing
- DTS update for additional boards and devices
* tag 'mxs-dt-3.7' of git://git.linaro.org/people/shawnguo/linux-2.6: (28 commits)
ARM: dts: cfa10049: Add the 74HC595 gpio expanders
ARM: dts: m28evk: Fix MMC WP pin being inverted
ARM: dts: cfa10049: Add SSP3 to the 10049 board
ARM: dts: mxs: Add missing address and size cells in SSP nodes
ARM: mx28evk: Add I2C EEPROM support
ARM: dts: mxs: Enable USB1 Host on the CFA-10049 expansion board
ARM: dts: mxs: Add the second I2C adapter to the CFA10049 expansion board
ARM: dts: mxs: Add I2C1 muxing options for imx28
ARM: mx28evk: Add LRADC support
ARM: mx28evk: Add SPI flash support
ARM: mxs: Update DENX M28 machine and dts file
ARM: mx28: Add USB PHY overcurrent pinmux
ARM: mx28: Add SPI 2 pinmux into imx28.dtsi
ARM: dts: mxs: Add pwm4 muxing options for imx28
ARM: dts: mxs: Add alternative I2C muxing options for imx28
ARM: olinuxino: Add gpio-led support
ARM: mxs: Let mmc0 pin detect be generic
ARM: mxs: Rename 'hog-gpios'
ARM: mxs: remove iomux driver
ARM: mxs: remove platform device codes
...
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For Seaboard, Ventana, and Cardhu, add DT property to tell the regulator
that it should provide the pm_power_off() implementation. This allows
"shutdown" to work.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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It really becomes an maintenance issue that every time a device needs
to look up (clk_get) a clock we have to patch kernel clock file to call
clk_register_clkdev for that clock.
Since clock DT support which is meant to resolve clock lookup in device
tree is in place, the patch moves imx6q client devices' clock lookup
over to device tree, so that any new lookup to be added at later time
can just get done in DT instead of kernel.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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'pinctrl_gpio_hog' is used to setup the pin functions, and it is not
neccesarily used only for GPIO pins, so remove 'gpio' from its name
to describe a more generic term.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Now, imx51 device tree kernel calls pinctrl to set up pins. The
function used to hook up non-DT pin setup is not needed for DT boot
any more. Remove it from DT image.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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With the imx51 DT board having pinctrl setup define in device tree,
it's time to remove dummy pinctrl state and build in the real imx51
pinctrl support.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add pinctrl settings for the exsiting devices in imx51-babbage.dts.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Now imx53 is a device tree only platform, so the files and functions
used only by non-DT kernel can be removed.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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With device tree kernel provides the equal support as those imx53 board
files, it's time to remove the board files and get imx53 support device
tree only.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Now, imx53 device tree kernel calls pinctrl to set up pins. The
functions used to hook up non-DT pin setup is not needed for DT boot
any more. Remove them from DT image.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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As all imx53 boards booting from device tree have pinctrl set up in dts,
it's time to remove the dummy pinctrl state and build in the real imx53
pinctrl support.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add pinctrl settings for the exsiting devices in imx53-smd.dts.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add pinctrl settings for the exsiting devices in imx53-evk.dts.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add pinctrl settings for the exsiting devices in imx53-ard.dts.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add pinctrl settings for existing devices in imx53-qsb.dts.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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As all imx6q boards have pinctrl set up in device tree, it's time to
remove the dummy pinctrl state.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add pinctrl settings for existing devices in imx6q-sabresd.dts.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add missing pinctrl of uart and enet for imx6q-arm2 board.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add missing pinctrl of usdhc and enet for imx6q-sabrelite board.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Sort iomuxc sub-nodes in name so that the node can be located a little
bit easier.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Name iomuxc sub-nodes following pin function and hardware manual.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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