aboutsummaryrefslogtreecommitdiff
path: root/arch/arc/mm/cache.c
AgeCommit message (Expand)Author
2015-08-21ARC: Eliminate some ARCv2 specific code for ARCompact buildVineet Gupta
2015-08-20ARCv2: IOC: Allow boot time disableAlexey Brodkin
2015-08-20ARCv2: SLC: Allow boot time disableVineet Gupta
2015-08-20ARCv2: Support IO Coherency and permutations involving L1 and L2 cachesAlexey Brodkin
2015-07-06ARCv2: guard SLC DMA ops with spinlockAlexey Brodkin
2015-06-25ARCv2: SLC: Handle explcit flush for DMA ops (w/o IO-coherency)Vineet Gupta
2015-06-22ARCv2: MMUv4: support aliasing icache configVineet Gupta
2015-06-22ARCv2: MMUv4: cache programming model changesVineet Gupta
2015-06-19ARC: untangle cache flush loopVineet Gupta
2015-06-19ARC: cacheflush: No need to retain DC_CTRL from __before_dc_op()Vineet Gupta
2015-06-19ARC: cacheflush: move some code around, delete old commentsVineet Gupta
2015-06-19ARC: mm/cache_arc700.c -> mm/cache.cVineet Gupta
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-11 21:38:13 +0000