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2023-07-19arm64: dts: qcom: sdm630: correct camss unit addressKrzysztof Kozlowski
[ Upstream commit c8b7faa7e9913a94444b3f00b6480e53a174fcfd ] Match unit-address to reg entry to fix dtbs W=1 warnings: Warning (simple_bus_reg): /soc/camss@ca00000: simple-bus unit address format error, expected "ca00020" Fixes: f3d5d3cc6971 ("arm64: dts: qcom: sdm630: Configure the camera subsystem") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230419211856.79332-10-krzysztof.kozlowski@linaro.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-12-31arm64: dts: qcom: sdm630: fix UART1 pin biasKrzysztof Kozlowski
[ Upstream commit 780f836fe071a9e8703fe6a05ae00129acf83391 ] There is no "bias-no-pull" property. Assume intentions were disabling bias. Fixes: b190fb010664 ("arm64: dts: qcom: sdm630: Add sdm630 dts file") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221010114417.29859-1-krzysztof.kozlowski@linaro.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-09-05arm64: dts: qcom: fix syscon node namesJohan Hovold
Some recent changes that added new syscon nodes used misspelled node names. Fixes: 86d7c9460e2c arm64: dts: qcom: sm8150: split TCSR halt regs out of mutex Fixes: 0da603387225 arm64: dts: qcom: sdm630: split TCSR halt regs out of mutex Fixes: 8a8531e69b2d arm64: dts: qcom: sdm845: split TCSR halt regs out of mutex Fixes: d9a2214d6ba5 arm64: dts: qcom: sc7280: split TCSR halt regs out of mutex Fixes: ce1ac53c7faa arm64: dts: qcom: sc7180: split TCSR halt regs out of mutex Fixes: fc10cfa38580 arm64: dts: qcom: msm8998: split TCSR halt regs out of mutex Fixes: 100ce2205924 arm64: dts: qcom: msm8996: split TCSR halt regs out of mutex Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220905091602.20364-1-johan+linaro@kernel.org
2022-08-29arm64: dts: qcom: sdm630: switch TCSR mutex to MMIOKrzysztof Kozlowski
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/sdm636-sony-xperia-ganges-mermaid.dtb: hwlock: 'reg' is a required property qcom/sdm636-sony-xperia-ganges-mermaid.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-15-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sdm630: split TCSR halt regs out of mutexKrzysztof Kozlowski
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-14-krzysztof.kozlowski@linaro.org
2022-07-06Revert "arm64: dts: qcom: Fix 'reg-names' for sdhci nodes"Douglas Anderson
This reverts commit afcbe252e9c19161e4d4c95f33faaf592f1de086. The commit in question caused my sc7280-herobrine-herobrine-r1 board not to boot anymore. This shouldn't be too surprising since the driver is relying on the name "cqhci". The issue seems to be that someone decided to change the names of things when the binding moved from .txt to .yaml. We should go back to the names that the bindings have historically specified. For some history, see commit d3392339cae9 ("mmc: cqhci: Update cqhci memory ioresource name") and commit d79100c91ae5 ("dt-bindings: mmc: sdhci-msm: Add CQE reg map"). Fixes: afcbe252e9c1 ("arm64: dts: qcom: Fix 'reg-names' for sdhci nodes") Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220706144706.1.I48f35820bf3670d54940110462555c2d0a6d5eb2@changeid
2022-07-02arm64: dts: qcom: sdm630: add dedicated IMEM and syscon compatiblesKrzysztof Kozlowski
Add proper compatibles to the IMEM device node: 1. syscon to allow accessing memory from other devices, 2. dedicated compatible as required for syscon and simple-mfd nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-12-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: use generic sram as name for imem and ocmem nodesKrzysztof Kozlowski
According to Devicetree specification, the device nodes should be generic, reflecting the function of the device. The typical name for memory regions is "sram". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-8-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: sdm630: remove unneeded address/size cells in glink-edgeKrzysztof Kozlowski
glink-edge node does not have children with unit addresses: sdm630-sony-xperia-ganges-kirin.dtb: glink-edge: '#address-cells', '#size-cells' do not match any of the regexes: 'pinctrl-[0-9] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220517070113.18023-11-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: Fix 'reg-names' for sdhci nodesBhupesh Sharma
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports a number of issues with ordering of 'reg-names' as various possible combinations are possible for different qcom SoC dts files. Fix the same by updating the offending 'dts' files. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-6-bhupesh.sharma@linaro.org
2022-07-02arm64: dts: qcom: Fix ordering of 'clocks' & 'clock-names' for sdhci nodesBhupesh Sharma
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports a number of issues with ordering of 'clocks' & 'clock-names' for sdhci nodes: arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:0: 'iface' was expected arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:1: 'core' was expected arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:2: 'xo' was expected Fix the same by updating the offending 'dts' files. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-5-bhupesh.sharma@linaro.org
2022-07-02arm64: dts: qcom: sdm630: Fix 'interconnect-names' for sdhci nodesBhupesh Sharma
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports issues with inconsistent 'interconnect-names' used for sdhci nodes. Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-3-bhupesh.sharma@linaro.org
2022-07-02arm64: dts: qcom: Fix sdhci node names - use 'mmc@'Bhupesh Sharma
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports issues with inconsistent 'sdhci@' convention used for specifying the sdhci nodes. The generic mmc bindings expect 'mmc@' format instead. Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> [bjorn: Moved non-arm64 changes to separate commit] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-2-bhupesh.sharma@linaro.org
2022-07-02arm64: dts: qcom: adjust whitespace around '='Krzysztof Kozlowski
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220526204248.832139-1-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: sdm630: correct QFPROM byte offsetsKrzysztof Kozlowski
The NVMEM bindings expect that 'bits' property holds offset and size of region within a byte, so it applies a constraint of <0, 7> for the offset. Using 25 as HSTX trim offset is within 4-byte QFPROM word, but outside of the byte: sdm630-sony-xperia-nile-discovery.dtb: qfprom@780000: hstx-trim@240:bits:0:0: 25 is greater than the maximum of 7 sdm630-sony-xperia-nile-discovery.dtb: qfprom@780000: gpu-speed-bin@41a0:bits:0:0: 21 is greater than the maximum of 7 Align the offsets to match the bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505113802.243301-6-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: use dedicated QFPROM compatiblesKrzysztof Kozlowski
Use dedicated compatibles for QFPROM on MSM8916, MSM8996, MSM8998, QCS404 and SDM630 which is expected by the bindings: msm8996-mtp.dtb: qfprom@74000: compatible:0: 'qcom,qfprom' is not one of ['qcom,apq8064-qfprom', ... Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505113802.243301-5-krzysztof.kozlowski@linaro.org
2022-06-28arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board filesDmitry Baryshkov
This results in dts duplication, but per mutual agreement card detect pin configuration belongs to the board files. Move it from the SoC dtsi to the board DT files. Suggested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-10-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm630: fix gpu's interconnect pathDmitry Baryshkov
ICC path for the GPU incorrectly states <&gnoc 1 &bimc 5>, which is a path from SLAVE_GNOC_BIMC to SLAVE_EBI. According to the downstream kernel sources, the GPU uses MASTER_OXILI here, which is equivalent to <&bimc 1 ...>. While we are at it, use defined names instead of the numbers for this interconnect path. Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration") Reported-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-8-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm630: add second (HS) USB host supportDmitry Baryshkov
Add DT entries for the second DWC3 USB host, which is limited to the USB2.0 (HighSpeed), and the corresponding QUSB PHY. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-7-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0Dmitry Baryshkov
In preparation to adding second USB host/PHY pair, change first USB PHY's label to qusb2phy0. Suggested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-6-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm630: fix the qusb2phy ref clockDmitry Baryshkov
According to the downstram DT file, the qusb2phy ref clock should be GCC_RX0_USB2_CLKREF_CLK, not GCC_RX1_USB2_CLKREF_CLK. Fixes: c65a4ed2ea8b ("arm64: dts: qcom: sdm630: Add USB configuration") Cc: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-5-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm630: disable GPU by defaultDmitry Baryshkov
The SoC's device tree file disables gpucc and adreno's SMMU by default. So let's disable the GPU too. Moreover it looks like SMMU might be not usable without additional patches (which means that GPU is unusable too). No board uses GPU at this moment. Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration") Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-4-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by defaultDmitry Baryshkov
Follow the typical practice and keep DSI0/DSI0 PHY disabled by default. They should be enabled in the board DT files. No existing boards use them at this moment. Suggested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-2-dmitry.baryshkov@linaro.org
2022-06-27arm64: dts: qcom: sdm630: order interrupts according to bindingsKrzysztof Kozlowski
The CAMSS DTSI device node, which came after the bindings were merged, got the interrupts ordered differently then specified in the bindings: sdm630-sony-xperia-nile-pioneer.dtb: camss@ca00000: interrupt-names:0: 'csid0' was expected Reordering them to match bindings should not cause ABI issues, because the driver relies on names, not ordering. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220509144714.144154-4-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: sdm630: order regs according to bindingsKrzysztof Kozlowski
The CAMSS DTSI device node, which came after the bindings were merged, got the regs ordered differently then specified in the bindings: sdm636-sony-xperia-ganges-mermaid.dtb: camss@ca00000: reg-names:0: 'csi_clk_mux' was expected Reordering them to match bindings should not cause ABI issues, because the driver relies on names, not ordering. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220509144714.144154-3-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: sdm630: order clocks according to bindingsKrzysztof Kozlowski
The CAMSS DTSI device node, which came after the bindings were merged, got the clocks ordered differently then specified in the bindings: sdm636-sony-xperia-ganges-mermaid.dtb: camss@ca00000: reg-names:4: 'csid3' was expected Reordering them to match bindings should not cause ABI issues, because the driver relies on names, not ordering. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220509144714.144154-2-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: align OPP table names with DT schemaKrzysztof Kozlowski
DT schema expects names of operating points tables to start with "opp-table": ipq6018-cp01-c1.dtb: cpu_opp_table: $nodename:0: 'cpu_opp_table' does not match '^opp-table(-[a-z0-9]+)?$' Use hyphens instead of underscores, fix the names to match DT schema or remove the prefix entirely when it is not needed. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220627093250.84391-1-krzysztof.kozlowski@linaro.org
2022-06-03Merge tag 'usb-5.19-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB / Thunderbolt updates from Greg KH: "Here is the "big" set of USB and Thunderbolt driver changes for 5.18-rc1. For the most part it's been a quiet development cycle for the USB core, but there are the usual "hot spots" of development activity. Included in here are: - Thunderbolt driver updates: - fixes for devices without displayport adapters - lane bonding support and improvements - other minor changes based on device testing - dwc3 gadget driver changes. It seems this driver will never be finished given that the IP core is showing up in zillions of new devices and each implementation decides to do something different with it... - uvc gadget driver updates as more devices start to use and rely on this hardware as well - usb_maxpacket() api changes to remove an unneeded and unused parameter. - usb-serial driver device id updates and small cleanups - typec cleanups and fixes based on device testing - device tree updates for usb properties - lots of other small fixes and driver updates. All of these have been in linux-next for weeks with no reported problems" * tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (154 commits) USB: new quirk for Dell Gen 2 devices usb: dwc3: core: Add error log when core soft reset failed usb: dwc3: gadget: Move null pinter check to proper place usb: hub: Simplify error and success path in port_over_current_notify usb: cdns3: allocate TX FIFO size according to composite EP number usb: dwc3: Fix ep0 handling when getting reset while doing control transfer usb: Probe EHCI, OHCI controllers asynchronously usb: isp1760: Fix out-of-bounds array access xhci: Don't defer primary roothub registration if there is only one roothub USB: serial: option: add Quectel BG95 modem USB: serial: pl2303: fix type detection for odd device xhci: Allow host runtime PM as default for Intel Alder Lake N xHCI xhci: Remove quirk for over 10 year old evaluation hardware xhci: prevent U2 link power state if Intel tier policy prevented U1 xhci: use generic command timer for stop endpoint commands. usb: host: xhci-plat: omit shared hcd if either root hub has no ports usb: host: xhci-plat: prepare operation w/o shared hcd usb: host: xhci-plat: create shared hcd after having added main hcd xhci: prepare for operation w/o shared hcd xhci: factor out parts of xhci_gen_setup() ...
2022-05-05arm64: dts: qcom: align DWC3 USB clocks with DT schemaKrzysztof Kozlowski
Align order of clocks and their names with Qualcomm DWC3 USB DT schema. No functional impact expected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-13-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-04-12arm64: dts: qcom: sdm630: Drop flags for mdss irqsDmitry Baryshkov
The number of interrupt cells for the mdss interrupt controller is 1, meaning there should only be one cell for the interrupt number, not two. Drop the second cell containing (unused) irq flags. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Fixes: b52555d590d1 ("arm64: dts: qcom: sdm630: Add MDSS nodes") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220302225411.2456001-2-dmitry.baryshkov@linaro.org
2022-01-31arm64: dts: qcom: update qcom,domain propertyDavid Heidelberg
Since 'qcom,apr-domain' is deprecated in favor of 'qcom,domain', update accordingly. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211214102451.29084-1-david@ixit.cz
2021-12-15arm64: qcom: dts: drop legacy property #stream-id-cellsDavid Heidelberg
Property #stream-id-cells is legacy leftover and isn't currently documented nor used. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211208184707.100716-1-david@ixit.cz
2021-11-20arm64: dts: qcom: sdm630: Assign numbers to eMMC and SDDang Huynh
This makes eMMC/SD device number consistent. Reviewed-by: Martin Botka <martin.botka@somainline.org> Signed-off-by: Dang Huynh <danct12@riseup.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211120214227.779742-2-danct12@riseup.net
2021-11-03Merge tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM SoC DT updates from Arnd Bergmann: "This is a rather large update for the ARM devicetree files, after a few quieter releases, with 775 total commits and 47 branches pulled into this one. There are 5 new SoC types plus some minor variations, and a total of 60 new machines, so I'm limiting the summary to the main noteworthy items: - Apple M1 gain support for PCI and pinctrl, getting a bit closer to a usable system out of the box. - Qualcomm gains support for Snapdragon 690 (aka SM6350) as well as SM7225, 11 new smartphones, and three additional Chromebooks, and improvements all over the place. - Samsung gains support for ExynosAutov9, an automotive version of their smartphone SoC, but otherwise no major changes. - Microchip adds the SAMA5D29 SoC in the SAMA5 family, and a number of improvements for the recently added SAMA7 family. The LAN966 SoC that was added in the platform code does not have dts files yet. Two board files are added for the older at91sam9g20 SoC - Aspeed supports two additional server boards using their AST2600 as BMC, and improves support for qemu models - Rockchip RK3566/RK3688 gets added, along with six new development boards using RK3328/RK3399/RK3566, and one Chromebook tablet. - Two NAS boxes are added using the ARMv4 based Gemini platform - One new board is added to the Intel Arria SoC FPGA family - Marvell adds one network switch based on Armada 381 and the new MOCHAbin 7040 development board - NXP adds support for the S32G2 automotive SoC, two imx6 based ebook readers, and three additional development boards, which is notably less than their usual additions, but they also gain improvements to their many existing boards - STmicroelectronics adds their stm32mp13 SoC family along with a reference board - Renesas adds new versions of their R-Car Gen3 SoCs and many updates for their older generations - Broadcom adds support for a number of Cisco Meraki wireless controllers, along with two new boards and other updates for BCM53xx/BCM47xx networking SoCs and the Raspberry Pi boards - Mediatek improves support for the MT81xx SoCs used in Chromebooks as well as the MT76xx networking SoCs - NVIDIA adds a number of cleanups and additional support for more hardware on the already supported machines - TI K3 adds support for three new boards along with cleanups - Toshiba adds one board for the Visconti family - Xilinx adds five new ZynqMP based machines - Amlogic support is added for the Radxa Zero and two Jethub home automation controllers, along with changes to other machines - Rob Herring continues his work on fixing dtc warnings all over the tree. - Minor updates for TI OMAP, Mstar, Allwinner/sunxi, Hisilicon, Ux500, Unisoc" * tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (720 commits) arm64: dts: apple: j274: Expose PCI node for the Ethernet MAC address arm64: dts: apple: t8103: Add root port interrupt routing arm64: dts: apple: t8103: Add PCIe DARTs arm64: apple: Add PCIe node arm64: apple: Add pinctrl nodes ARM: dts: arm: Update ICST clock nodes 'reg' and node names ARM: dts: arm: Update register-bit-led nodes 'reg' and node names arm64: dts: exynos: add chipid node for exynosautov9 SoC ARM: dts: qcom: fix typo in IPQ8064 thermal-sensor node Revert "arm64: dts: qcom: msm8916-asus-z00l: Add sensors" arm64: dts: qcom: ipq6018: Remove unused 'iface_clk' property from dma-controller node arm64: dts: qcom: ipq6018: Remove unused 'qcom,config-pipe-trust-reg' property arm64: dts: qcom: sm8350: Add CPU topology and idle-states arm64: dts: qcom: Drop unneeded extra device-specific includes arm64: dts: qcom: msm8916: Drop standalone smem node arm64: dts: qcom: Fix node name of rpm-msg-ram device nodes arm64: dts: qcom: msm8916-asus-z00l: Add sensors arm64: dts: qcom: msm8916-asus-z00l: Add SDCard arm64: dts: qcom: msm8916-asus-z00l: Add touchscreen arm64: dts: qcom: sdm845-oneplus: remove devinfo-size from ramoops node ...
2021-10-24arm64: dts: qcom: Fix node name of rpm-msg-ram device nodesStephan Gerhold
According to the new DT schema for qcom,rpm-msg-ram the node name should be sram@. memory@ is reserved for definition of physical RAM (usable by Linux). This fixes the following dtbs_check error on various device trees: memory@60000: 'device_type' is a required property From schema: dtschema/schemas/memory.yaml Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211018110009.30837-1-stephan@gerhold.net
2021-10-24arm64: dts: qcom: sdm630: Add disabled Venus supportAngeloGioacchino Del Regno
Add support for the Venus video decoder/encoder but leave it disabled by default; it is expected to eventually get enabled in each machine specific DT, where required. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211008102119.268869-3-angelogioacchino.delregno@collabora.com
2021-10-16arm64: dts: qcom: Enable RPM Sleep statsMaulik Shah
Add device node for Sleep stats driver which provides various low power mode stats on msm8996, msm8998, qcs404, sdm630 and sm6125. Cc: devicetree@vger.kernel.org Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1634107104-22197-6-git-send-email-mkshah@codeaurora.org
2021-09-24arm64: dts: qcom: sdm630: Add missing a2noc qos clocksShawn Guo
It adds the missing a2noc clocks required for QoS registers programming per downstream kernel[1]. [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 Fixes: 045547a02252 ("arm64: dts: qcom: sdm630: Add interconnect provider nodes") Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Georgi Djakov <djakov@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210824043435.23190-4-shawn.guo@linaro.org
2021-08-05arm64: dts: qcom: sdm630: don't use underscore in node nameVinod Koul
We have underscore (_) in node name so fix that up as well. Fix this by changing node name to use dash (-) Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-11-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sdm630: don't use empty memory nodeVinod Koul
We expect bootloader to full memory details but passing empty values can give warning, so add a default value Signed-off-by: Vinod Koul <vkoul@kernel.org> Tested-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210308060826.3074234-15-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04arm64: dts: qcom: sdm630: Add DMA to I2C hostsKonrad Dybcio
Add DMA properties to I2C hosts to allow for DMA transfers. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-40-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04arm64: dts: qcom: sdm630: Add I2C functions to I2C pinsKonrad Dybcio
This was overlooked earlier, fix it to ensure the busses can work properly. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-39-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04arm64: dts: qcom: sdm630: Configure the camera subsystemAngeloGioacchino Del Regno
Add nodes for camss, cci and its pinctrl in order to bring up camera functionality. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-28-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04arm64: dts: qcom: sdm630: Add IMEM nodeKonrad Dybcio
Add IMEM node and PIL reloc info as its child. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-27-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04arm64: dts: qcom: sdm630: Add Adreno 508 GPU configurationAngeloGioacchino Del Regno
The SDM630 SoC features an Adreno 508.0 GPU with a minimum frequency of 160MHz and a maximum of (depending on the speed-bin) 775MHz. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-20-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04arm64: dts: qcom: sdm630: Raise tcsr_mutex_regs sizeKonrad Dybcio
Enlarge the size to make sure all relevant registers can be reached. This will be required to support the modem. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-19-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04arm64: dts: qcom: sdm630: Add ADSP remoteproc configurationKonrad Dybcio
Configure the ADSP remote processor and add a simple sound{} node to make way for future development. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-18-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04arm64: dts: qcom: sdm630: Add thermal-zones configurationKonrad Dybcio
Add a basic thermal-zones configuration to make sure the SoC doesn't overheat itself to death. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-17-konrad.dybcio@somainline.org [bjorn: Sorted thermal-zones below "soc"] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04arm64: dts: qcom: sdm630: Add modem/ADSP SMP2P nodesKonrad Dybcio
Add SMP2P nodes that are required for ADSP and modem bringup. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-16-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04arm64: dts: qcom: sdm630: Add TSENS nodeKonrad Dybcio
This will enable temperature reporting for various SoC components. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-15-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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