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2011-03-25m68k: merge m68k and m68knommu arch directoriesGreg Ungerer
There is a lot of common code that could be shared between the m68k and m68knommu arch branches. It makes sense to merge the two branches into a single directory structure so that we can more easily share that common code. This is a brute force merge, based on a script from Stephen King <sfking@fdwdc.com>, which was originally written by Arnd Bergmann <arnd@arndb.de>. > The script was inspired by the script Sam Ravnborg used to merge the > includes from m68knommu. For those files common to both arches but > differing in content, the m68k version of the file is renamed to > <file>_mm.<ext> and the m68knommu version of the file is moved into the > corresponding m68k directory and renamed <file>_no.<ext> and a small > wrapper file <file>.<ext> is used to select between the two version. Files > that are common to both but don't differ are removed from the m68knommu > tree and files and directories that are unique to the m68knommu tree are > moved to the m68k tree. Finally, the arch/m68knommu tree is removed. > > To select between the the versions of the files, the wrapper uses > > #ifdef CONFIG_MMU > #include <file>_mm.<ext> > #else > #include <file>_no.<ext> > #endif On top of this file merge I have done a simplistic merge of m68k and m68knommu Kconfig, which primarily attempts to keep existing options and menus in place. Other than a handful of options being moved it produces identical .config outputs on m68k and m68knommu targets I tested it on. With this in place there is now quite a bit of scope for merge cleanups in future patches. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: external interrupt support to ColdFire intc-simr controllerGreg Ungerer
The EDGE Port module of some ColdFire parts using the intc-simr interrupt controller provides support for 7 external interrupts. These interrupts go off-chip (that is they are not for internal peripherals). They need some special handling and have some extra setup registers. Add code to support them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: external interrupt support to ColdFire intc-2 controllerGreg Ungerer
The EDGE Port module of some ColdFire parts using the intc-2 interrupt controller provides support for 7 external interrupts. These interrupts go off-chip (that is they are not for internal peripherals). They need some special handling and have some extra setup registers. Add code to support them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: fix gpio warnings for ColdFire 5407 targetsGreg Ungerer
Fix these compiler warnings: arch/m68knommu/platform/5407/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5407/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5407/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: fix gpio warnings for ColdFire 532x targetsGreg Ungerer
Fix these compiler warnings: arch/m68knommu/platform/532x/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:51:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:54:3: warning: initialisation makes pointer from integer without a cast ... Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: fix gpio warnings for ColdFire 5307 targetsGreg Ungerer
Fix these compiler warnings: arch/m68knommu/platform/5307/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5307/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5307/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: fix gpio warnings for ColdFire 527x targetsGreg Ungerer
Fix these compiler warnings: arch/m68knommu/platform/527x/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:38:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:39:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:54:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:55:3: warning: initialisation makes pointer from integer without a cast ... Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: fix gpio warnings for ColdFire 5272 targetsGreg Ungerer
Fix these compiler warnings: arch/m68knommu/platform/5272/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:51:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:67:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:68:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:69:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: fix gpio warnings for ColdFire 5249 targetsGreg Ungerer
Fix these compiler warnings: arch/m68knommu/platform/5249/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:51:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: fix gpio warnings for ColdFire 523x targetsGreg Ungerer
Fix these compiler warnings: arch/m68knommu/platform/523x/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/523x/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/523x/gpio.c:38:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/523x/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/523x/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast ... Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: fix gpio warnings for ColdFire 520x targetsGreg Ungerer
Fix these compiler warnings: rch/m68knommu/platform/520x/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/520x/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/520x/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/520x/gpio.c:51:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/520x/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast ... Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: fix gpio warnings for ColdFire 5206e targetsGreg Ungerer
Fix these compiler warnings: arch/m68knommu/platform/5206e/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast CC kernel/panic.o arch/m68knommu/platform/5206e/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5206e/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: fix gpio warnings for ColdFire 5206 targetsGreg Ungerer
Fix these compiler warnings: arch/m68knommu/platform/5206/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5206/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5206/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: fixing compiler warningsAlexander Kurz
Signed-off-by: Alexander Kurz <linux@kbdbabel.org> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: limit interrupts supported by ColdFire intc-simr driverGreg Ungerer
The intc-simr interrupt controller on some ColdFire CPUs has a set range of interrupts its supports (64 through 128 or 192 depending on model). We shouldn't be setting this handler for every possible interrupt from 0 to 255. Set more appropriate limits, and this means we can drop the interrupt number check in the mask and unmask routines. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: move some init code out of unmask routine for ColdFire intc-2Greg Ungerer
Use a proper irq_startup() routine to intialize the interrupt priority and level register in the ColdFire intc-2 controller code. We shouldn't be checking if the priority/level has been set on every unmask operation. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: limit interrupts supported by ColdFire intc-2 driverGreg Ungerer
The intc-2 interrupt controller on some ColdFire CPUs has a set range of interrupts its supports (64 through 128 or 192 depending on model). We shouldn't be setting this handler for every possible interrupt from 0 to 255. Set more appropriate limits, and this means we can drop the interrupt number check in the mask and unmask routines. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: add basic support for the ColdFire based FireBee boardGreg Ungerer
The FireBee is a ColdFire 5475 based board. Add a configuration option to support it, and the basic platform flash layout code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: clean up use of MBAR for DRAM registers on ColdFire startGreg Ungerer
In some of the RAM size autodetection code on ColdFire CPU startup we reference DRAM registers relative to the MBAR register. Not all of the supported ColdFire CPUs have an MBAR, and currently this works because we fake an MBAR address on those registers. In an effort to clean this up, and eventually remove the fake MBAR setting make the DRAM register address definitions actually contain the MBAR (or IPSBAR as appropriate) value as required. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: remove use of MBAR in old-style ColdFire timerGreg Ungerer
Not all ColdFire CPUs that use the old style timer hardware module use an MBAR set peripheral region. Move the TIMER base address defines to the per-CPU header files where we can set it correctly based on how the peripherals are mapped - instead of using a fake MBAR for some platforms. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: move ColdFire DMA register addresses to per-cpu headersGreg Ungerer
The base addresses of the ColdFire DMA unit registers belong with all the other address definitions in the per-cpu headers. The current definitions assume they are relative to an MBAR register. Not all ColdFire CPUs have an MBAR register. A clean address define can only be acheived in the per-cpu headers along with all the other chips peripheral base addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: remove use of MBAR value for ColdFire 528x peripheral addressingGreg Ungerer
The ColdFire 528x family of CPUs does not have an MBAR register, so don't define its peripheral addresses relative to one. Its internal peripherals are relative to the IPSBAR register, so make sure to use that. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: remove use of MBAR value for ColdFire 527x peripheral addressingGreg Ungerer
The ColdFire 527x family of CPUs does not have an MBAR register, so don't define its peripheral addresses relative to one. Its internal peripherals are relative to the IPSBAR register, so make sure to use that. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: remove use of MBAR value for ColdFire 523x peripheral addressingGreg Ungerer
The ColdFire 523x family of CPUs does not have an MBAR register, so don't define its peripheral addresses relative to one. Its internal peripherals are relative to the IPSBAR register, so make sure to use that. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: remove MBAR and IPSBAR hacks for the ColdFire 520x CPUsGreg Ungerer
The ColdFire 5207 and 5208 CPUs have fixed peripheral addresses. They do not use the setable peripheral address registers like the MBAR and IPSBAR used on many other ColdFire parts. Don't use fake values of MBAR and IPSBAR when using peripheral addresses for them, there is no need to. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: move ColdFire PIT timer base addressesGreg Ungerer
The PIT hardware timer module used in some ColdFire CPU's is not always addressed relative to an IPSBAR register. Parts like the ColdFire 5207 and 5208 have fixed peripheral addresses. So lets not define the register addresses of the PIT relative to an IPSBAR definition. Move the base address definitions into the per-part headers. This is a lot more consistent since all the other peripheral base addresses are defined in the per-part header files already. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: remove kludge seting of MCF_IPSBAR for ColdFire 54xxGreg Ungerer
The ColdFire 54xx family shares the same interrupt controller used on the 523x, 527x and 528x ColdFire parts, but it isn't offset relative to the IPSBAR register. The 54xx doesn't have an IPSBAR register. By including the base address of the peripheral registers in the register definitions (MCFICM_INTC0 and MCFICM_INTC1 in this case) we can avoid having to define a fake IPSBAR for the 54xx. And this makes the register address definitions of these more consistent, the majority of the other register address defines include the peripheral base address already. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: Convert 5249 intc irq_chip to new functionsThomas Gleixner
/me idly wonders what sets the handlers for this chip. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: Convert 5272 intc irq_chip to new functionsThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: Convert 68360 ints irq_chip to new functionsThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: Convert 68328 ints irq_chip to new functionsThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: Convert coldfire intc-simr irq_chip to newThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: Convert coldfire intc-2 irq_chip to newThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: Convert coldfire intc irq_chip to newThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15m68knommu: 5772: Replace private irq flow handlerThomas Gleixner
That handler lacks the minimal checks for action being zero etc. Keep the weird flow - ack before handling - intact and call into handle_simple_irq which does the right thing. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Greg Ungerer <gerg@uclinux.org> LKML-Reference: <20110202212552.413849952@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-02-16m68knommu: set flow handler for secondary interrupt controller of 5249Greg Ungerer
The secondary interrupt controller of the ColdFire 5249 code is not setting the edge triggered flow handler. Set it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-02-16m68knommu: remove use of IRQ_FLG_LOCK from 68360 platform supportGreg Ungerer
The m68knommu arch does not define or use IRQ_FLG_LOCK in its irq subsystem. Remove obsolete use of it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-02-16m68knommu: fix mis-named variable int set_irq_chip loopGreg Ungerer
Compiling for 68360 targets gives: CC arch/m68knommu/platform/68360/ints.o arch/m68knommu/platform/68360/ints.c: In function ‘init_IRQ’: arch/m68knommu/platform/68360/ints.c:135:16: error: ‘irq’ undeclared (first use in this function) arch/m68knommu/platform/68360/ints.c:135:16: note: each undeclared identifier is reported only once for each function it appears in Fix variable name used. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-02-08m68knommu: fix use of un-defined _TIF_WORK_MASKGreg Ungerer
The _TIF_WORK_MASK definition was removed in the clean up of MMU and non-MMU arch/m68k/include/asm/thread_info*.h files (this was commit cddafa3500fde4a07e5bf899ec97a04069f8f7ce, "merge MMU and non-MMU thread_info.h"). It didn't get cleaned out of the entry.S code for the 68328 and 68360 based platforms. And it was replaced by a hard coded constant mask for coldfire platforms. There is currently no need to mask any of these bits, so fix all uses (and former uses) to check for any non-zero value. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-18Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (25 commits) m68knommu: fix broken setting of irq_chip and handler m68knommu: switch to using -mcpu= flags for ColdFire targets m68knommu: arch/m68knommu/Kconfig whitespace cleanup m68knommu: create optimal separate instruction and data cache for ColdFire m68knommu: support ColdFire caches that do copyback and write-through m68knommu: support version 2 ColdFire split cache m68knommu: make cache push code ColdFire generic m68knommu: clean up ColdFire cache control code m68knommu: move inclusion of ColdFire v4 cache registers m68knommu: merge bit definitions for version 3 ColdFire cache controller m68knommu: create bit definitions for the version 2 ColdFire cache controller m68knommu: remove empty __iounmap() it is no used m68knommu: remove kernel_map() code, it is not used m68knommu: remove do_page_fault(), it is not used m68knommu: use user stack pointer hardware on some ColdFire cores m68knommu: remove command line printing DEBUG m68knommu: remove fasthandler interrupt code m68knommu: move UART addressing to part specific includes m68knommu: fix clock rate value reported for ColdFire 54xx parts m68knommu: move ColdFire CPU names into their headers ...
2011-01-07m68knommu: Handle multiple pending signalsAl Viro
we shouldn't bugger off to userland when there still are pending signals; among other things it makes e.g. SIGSEGV triggered by failure to build a sigframe to be delivered _now_ and not when we hit the next syscall or interrupt. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Acked-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2011-01-07m68knommu: Switch to saner sigsuspendAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Acked-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2011-01-07m68knommu: fix broken setting of irq_chip and handlerGreg Ungerer
Fix compile error, by using correct loop variable: arch/m68knommu/platform/68328/ints.c: In function ‘init_IRQ’: arch/m68knommu/platform/68328/ints.c:182: error: ‘irq’ undeclared (first use in this function) arch/m68knommu/platform/68328/ints.c:182: error: (Each undeclared identifier is reported only once arch/m68knommu/platform/68328/ints.c:182: error: for each function it appears in.) Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: make cache push code ColdFire genericGreg Ungerer
Currently the code to push cache lines is only available to version 4 cores. Version 3 cores may also need to use this if we support copy- back caches on them. Move this code to make it more generic, and useful for all version ColdFire cores. With this in place we can now have a single cache_flush_all() code path that does all the right things on all version cores. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: clean up ColdFire cache control codeGreg Ungerer
The cache control code for the ColdFire CPU's is a big ugly mess of "#ifdef"ery liberally coated with bit constants. Clean it up. The cache controllers in the various ColdFire parts are actually quite similar. Just differing in some bit flags and options supported. Using the header defines now in place it is pretty easy to factor out the small differences and use common setup and flush/invalidate code. I have preserved the cache setups as they where in the old code (except where obviously wrong - like in the case of the 5249). Following from this it should be easy now to extend the possible setups used on the CACHE controllers that support split cacheing or copy-back or write through options. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: use user stack pointer hardware on some ColdFire coresGreg Ungerer
The more modern ColdFire parts (even if based on older version cores) have separate user and supervisor stack pointers (a7 register). Modify the ColdFire CPU setup and exception code to enable and use this on parts that have it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: remove fasthandler interrupt codeGreg Ungerer
There are no users of the old "fasthandler" interrupt entry code. So remove it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: make Coldfire 548x support more genericGreg Ungerer
The ColdFire 547x family of processors is very similar to the ColdFire 548x series. Almost all of the support for them is the same. Make the code supporting the 548x more gneric, so it will be capable of supporting both families. For the most part this is a renaming excerise to make the support code more obviously apply to both families. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2010-10-25Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (21 commits) m68knommu: convert to using tracehook_report_syscall_* m68knommu: some boards use fixed phy for FEC ethernet m68knommu: support the external GPIO based interrupts of the 5272 m68knommu: mask of vector bits in exception word properly m68knommu: change to new flag variables m68knommu: Fix MCFUART_TXFIFOSIZE for m548x. m68knommu: add basic mmu-less m548x support m68knommu: .gitignore vmlinux.lds m68knommu: stop using __do_IRQ m68knommu: rename PT_OFF_VECTOR to PT_OFF_FORMATVEC. m68knommu: add support for Coldfire 547x/548x interrupt controller m68k{nommu}: Remove unused DEFINE's from asm-offsets.c m68knommu: whitespace cleanup in 68328/entry.S m68knommu: Document supported chips in intc-2.c and intc-simr.c. m68knommu: fix strace support for 68328/68360 m68knommu: fix default starting date arch/m68knommu: Removing dead 68328_SERIAL_UART2 config option arch/m68knommu: Removing dead RAM_{16,32}_MB config option arch/m68knommu: Removing dead M68KFPU_EMU config option arch/m68knommu: Removing dead RELOCATE config option ...
2010-10-22Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k: m68k: Add missing I/O macros {in,out}{w,l}_p() for !CONFIG_ISA m68k: Remove big kernel lock in cache flush code m68k: __pa(): cast arg to long fbdev: atafb - Remove undead ifdef ATAFB_FALCON zorro: Fix device_register() error handling fbdev/m68k: Fix section mismatches in q40fb.c m68k/m68knommu: merge the MMU and non-MMU traps.h m68k/m68knommu: merge MMU and non-MMU thread_info.h m68k/m68knommu: merge MMU and non-MMU atomic.h m68k/m68knommu: clean up page.h m68k/m68knommu: merge machdep.h files into a single file m68k/m68knommu: merge MMU and non-MMU string.h m68k/m68knommu: Remove dead SMP config option m68k: move definition of THREAD_SIZE into thread_info_mm.h m68k: Use asm-generic/ioctls.h (enables termiox) m68k: Remove dead GG2 config option
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