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c-tx39.c
Age
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Author
2016-10-04
MIPS: c-r4k: Split user/kernel flush_icache_range()
James Hogan
2015-06-21
MIPS: tlb-r3k: Move CP0.Wired register initialisation to `tlb_init'
Maciej W. Rozycki
2013-07-14
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
Paul Gortmaker
2013-02-01
MIPS: Whitespace cleanup.
Ralf Baechle
2012-03-28
Disintegrate asm/system.h for MIPS
David Howells
2011-10-20
MIPS: cache: Provide cache flush operations for XFS
Ralf Baechle
2011-04-06
update David Miller's old email address
Justin P. Mattock
2009-06-24
MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.
Ralf Baechle
2008-09-05
[MIPS] TX39xx: Add missing local_flush_icache_range initialization
Atsushi Nemoto
2008-09-05
[MIPS] Fix WARNING: at kernel/smp.c:290
Thomas Bogendoerfer
2008-04-07
[MIPS] Handle aliases in vmalloc correctly.
Ralf Baechle
2008-03-12
[MIPS] Fix loads of section missmatches
Ralf Baechle
2007-10-11
[MIPS] Allow hardwiring of the CPU type to a single type for optimization.
Ralf Baechle
2007-03-07
[MIPS] TX39: Remove redundant tx39_blast_icache() calls
Atsushi Nemoto
2006-10-01
[MIPS] Remove __flush_icache_page
Atsushi Nemoto
2006-09-27
[MIPS] Retire flush_icache_page from mm use.
Ralf Baechle
2006-04-19
[MIPS] Handle IDE PIO cache aliases on SMP.
Ralf Baechle
2006-03-18
[MIPS] local_r4k_flush_cache_page fix
Atsushi Nemoto
2006-02-14
[MIPS] Add protected_blast_icache_range, blast_icache_range, etc.
Atsushi Nemoto
2005-10-29
Cleanup the mess in cpu_cache_init.
Ralf Baechle
2005-10-29
Sync c-tx39.c with c-r4k.c.
Atsushi Nemoto
2005-10-29
Avoid SMP cacheflushes. This is a minor optimization of startup but
Ralf Baechle
2005-10-29
Update MIPS to use the 4-level pagetable code thereby getting rid of
Ralf Baechle
2005-04-16
Linux-2.6.12-rc2
Linus Torvalds