| Age | Commit message (Expand) | Author |
|---|---|---|
| 2022-06-16 | riscv: remove usage of function-pointers from cpufeatures and t-head errata | Heiko Stuebner |
| 2022-05-11 | riscv: add memory-type errata for T-Head | Heiko Stuebner |
| 2022-05-11 | riscv: implement module alternatives | Heiko Stuebner |
| 2022-05-11 | riscv: allow different stages with alternatives | Heiko Stuebner |
| 2022-05-11 | riscv: integrate alternatives better into the main architecture | Heiko Stuebner |
| 2022-01-09 | riscv: errata: alternative: mark vendor_patch_func __initdata | Jisheng Zhang |
| 2021-06-01 | riscv: skip errata_cip_453.o if CONFIG_ERRATA_SIFIVE_CIP_453 is disabled | Vincent |
| 2021-04-26 | riscv: sifive: Apply errata "cip-1200" patch | Vincent Chen |
| 2021-04-26 | riscv: sifive: Apply errata "cip-453" patch | Vincent Chen |
| 2021-04-26 | riscv: sifive: Add SiFive alternative ports | Vincent Chen |
| 2021-04-26 | riscv: Introduce alternative mechanism to apply errata solution | Vincent Chen |
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