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path: root/arch/riscv/include/asm/smp.h
AgeCommit message (Expand)Author
2022-11-29riscv: kexec: Fixup crash_smp_send_stop without multi coresGuo Ren
2022-07-19riscv: smp: Add 64bit hartid support on RV64Sunil V L
2022-01-20RISC-V: Do not use cpumask data structure for hartid bitmapAtish Patra
2022-01-09RISC-V: Use common riscv_cpuid_to_hartid_mask() for both SMP=y and SMP=nSean Christopherson
2022-01-09riscv: remove cpu_stop()Jisheng Zhang
2021-04-26riscv: Constify sbi_ipi_opsJisheng Zhang
2020-08-20RISC-V: Add mechanism to provide custom IPI operationsAnup Patel
2020-08-04RISC-V: Fix build warning for smpboot.cAtish Patra
2020-06-09RISC-V: self-contained IPI handling routineAnup Patel
2020-03-31RISC-V: Support cpu hotplugAtish Patra
2020-03-31RISC-V: Implement new SBI v0.2 extensionsAtish Patra
2019-09-05riscv: cleanup riscv_cpuid_to_hartid_maskChristoph Hellwig
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286Thomas Gleixner
2019-03-04RISC-V: Move cpuid to hartid mapping to SMP.Atish Patra
2018-10-22RISC-V: Show IPI statsAnup Patel
2018-10-22RISC-V: Add logical CPU indexing for RISC-VAtish Patra
2018-10-22RISC-V: Provide a cleaner raw_smp_processor_id()Palmer Dabbelt
2018-08-13clocksource: new RISC-V SBI timer driverPalmer Dabbelt
2018-08-13RISC-V: simplify software interrupt / IPI codeChristoph Hellwig
2017-09-26RISC-V: Init and Halt CodePalmer Dabbelt