index
:
linux.git
iio/light/color-sensors
sunxi/cedar/a33-support
sunxi/cedar/mmio-trace
sunxi/cedrus/jpeg-base
sunxi/cedrus/jpeg-nv16
sunxi/platform/irq-debounce
Linux kernel
git repo user
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
riscv
/
include
Age
Commit message (
Expand
)
Author
2017-12-05
bpf: correct broken uapi for BPF_PROG_TYPE_PERF_EVENT program type
Hendrik Brueckner
2017-12-01
RISC-V: Fixes for clean allmodconfig build
Palmer Dabbelt
2017-12-01
RISC-V: __io_writes should respect the length argument
Palmer Dabbelt
2017-12-01
RISC-V: User-Visible Changes
Palmer Dabbelt
2017-12-01
RISC-V: __io_writes should respect the length argument
Palmer Dabbelt
2017-11-30
RISC-V: Allow userspace to flush the instruction cache
Andrew Waterman
2017-11-30
RISC-V: Flush I$ when making a dirty page executable
Andrew Waterman
2017-11-30
RISC-V: Add missing include
Olof Johansson
2017-11-30
RISC-V: Use define for get_cycles like other architectures
Olof Johansson
2017-11-30
RISC-V: io.h: type fixes for warnings
Olof Johansson
2017-11-30
RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macros
Olof Johansson
2017-11-30
RISC-V: use generic serial.h
Olof Johansson
2017-11-28
RISC-V: remove spin_unlock_wait()
Palmer Dabbelt
2017-11-28
RISC-V: `sfence.vma` orderes the instruction cache
Palmer Dabbelt
2017-11-28
RISC-V: Add READ_ONCE in arch_spin_is_locked()
Palmer Dabbelt
2017-11-28
RISC-V: __test_and_op_bit_ord should be strongly ordered
Palmer Dabbelt
2017-11-28
RISC-V: Remove smb_mb__{before,after}_spinlock()
Palmer Dabbelt
2017-11-28
RISC-V: Remove __smp_bp__{before,after}_atomic
Palmer Dabbelt
2017-11-28
RISC-V: Comment on why {,cmp}xchg is ordered how it is
Palmer Dabbelt
2017-11-28
RISC-V: Remove unused arguments from ATOMIC_OP
Palmer Dabbelt
2017-11-15
Merge tag 'riscv-for-linus-4.15-arch-v9-premerge' of git://git.kernel.org/pub...
Linus Torvalds
2017-09-26
RISC-V: Build Infrastructure
Palmer Dabbelt
2017-09-26
RISC-V: User-facing API
Palmer Dabbelt
2017-09-26
RISC-V: Paging and MMU
Palmer Dabbelt
2017-09-26
RISC-V: Device, timer, IRQs, and the SBI
Palmer Dabbelt
2017-09-26
RISC-V: Task implementation
Palmer Dabbelt
2017-09-26
RISC-V: ELF and module implementation
Palmer Dabbelt
2017-09-26
RISC-V: Generic library routines and assembly
Palmer Dabbelt
2017-09-26
RISC-V: Atomic and Locking Code
Palmer Dabbelt
2017-09-26
RISC-V: Init and Halt Code
Palmer Dabbelt