aboutsummaryrefslogtreecommitdiff
path: root/arch/riscv
AgeCommit message (Expand)Author
2018-01-07riscv: rename SR_* constants to match the specChristoph Hellwig
2018-01-07riscv: remove CONFIG_MMU ifdefsChristoph Hellwig
2018-01-07RISC-V: Make __NR_riscv_flush_icache visible to userspacePalmer Dabbelt
2018-01-07RISC-V: Add a basic defconfigKarsten Merker
2017-12-11RISC-V: Remove unused CONFIG_HVC_RISCV_SBI codePalmer Dabbelt
2017-12-11RISC-V: Resurrect smp_mb__after_spinlock()Palmer Dabbelt
2017-12-11RISC-V: Logical vs Bitwise typoDan Carpenter
2017-12-05bpf: correct broken uapi for BPF_PROG_TYPE_PERF_EVENT program typeHendrik Brueckner
2017-12-01RISC-V: Fixes for clean allmodconfig buildPalmer Dabbelt
2017-12-01RISC-V: __io_writes should respect the length argumentPalmer Dabbelt
2017-12-01RISC-V: User-Visible ChangesPalmer Dabbelt
2017-12-01RISC-V: __io_writes should respect the length argumentPalmer Dabbelt
2017-11-30RISC-V: Clean up an unused includePalmer Dabbelt
2017-11-30RISC-V: Allow userspace to flush the instruction cacheAndrew Waterman
2017-11-30RISC-V: Flush I$ when making a dirty page executableAndrew Waterman
2017-11-30RISC-V: Add missing includeOlof Johansson
2017-11-30RISC-V: Use define for get_cycles like other architecturesOlof Johansson
2017-11-30RISC-V: Provide stub of setup_profiling_timer()Olof Johansson
2017-11-30RISC-V: Export some expected symbols for modulesOlof Johansson
2017-11-30RISC-V: move empty_zero_page definition to C and export itOlof Johansson
2017-11-30RISC-V: io.h: type fixes for warningsOlof Johansson
2017-11-30RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macrosOlof Johansson
2017-11-30RISC-V: use generic serial.hOlof Johansson
2017-11-28RISC-V: remove spin_unlock_wait()Palmer Dabbelt
2017-11-28RISC-V: `sfence.vma` orderes the instruction cachePalmer Dabbelt
2017-11-28RISC-V: Add READ_ONCE in arch_spin_is_locked()Palmer Dabbelt
2017-11-28RISC-V: __test_and_op_bit_ord should be strongly orderedPalmer Dabbelt
2017-11-28RISC-V: Remove smb_mb__{before,after}_spinlock()Palmer Dabbelt
2017-11-28RISC-V: Remove __smp_bp__{before,after}_atomicPalmer Dabbelt
2017-11-28RISC-V: Comment on why {,cmp}xchg is ordered how it isPalmer Dabbelt
2017-11-28RISC-V: Remove unused arguments from ATOMIC_OPPalmer Dabbelt
2017-11-27RISC-V: Add VDSO entries for clock_get/gettimeofday/getcpuAndrew Waterman
2017-11-27RISC-V: Remove __vdso_cmpxchg{32,64} symbol versionsPalmer Dabbelt
2017-11-15Merge tag 'riscv-for-linus-4.15-arch-v9-premerge' of git://git.kernel.org/pub...Linus Torvalds
2017-09-26RISC-V: Build InfrastructurePalmer Dabbelt
2017-09-26RISC-V: User-facing APIPalmer Dabbelt
2017-09-26RISC-V: Paging and MMUPalmer Dabbelt
2017-09-26RISC-V: Device, timer, IRQs, and the SBIPalmer Dabbelt
2017-09-26RISC-V: Task implementationPalmer Dabbelt
2017-09-26RISC-V: ELF and module implementationPalmer Dabbelt
2017-09-26RISC-V: Generic library routines and assemblyPalmer Dabbelt
2017-09-26RISC-V: Atomic and Locking CodePalmer Dabbelt
2017-09-26RISC-V: Init and Halt CodePalmer Dabbelt