| Age | Commit message (Collapse) | Author |
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Use the domain's maximum reservation to limit the amount of extra RAM
for the memory balloon. This reduces the size of the pages tables and
the amount of reserved low memory (which defaults to about 1/32 of the
total RAM).
On a system with 8 GiB of RAM with the domain limited to 1 GiB the
kernel reports:
Before:
Memory: 627792k/4472000k available
After:
Memory: 549740k/11132224k available
A increase of about 76 MiB (~1.5% of the unused 7 GiB). The reserved
low memory is also reduced from 253 MiB to 32 MiB. The total
additional usable RAM is 329 MiB.
For dom0, this requires at patch to Xen ('x86: use 'dom0_mem' to limit
the number of pages for dom0') (c/s 23790)
CC: stable@kernel.org
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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Steven Rostedt says we should use CONFIG_EVENT_TRACING.
Cc:Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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Fix regression for HVM case on older (<4.1.1) hypervisors caused by
commit 99bbb3a84a99cd04ab16b998b20f01a72cfa9f4f
Author: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Date: Thu Dec 2 17:55:10 2010 +0000
xen: PV on HVM: support PV spinlocks and IPIs
This change replaced the SMP operations with event based handlers without
taking into account that this only works when the hypervisor supports
callback vectors. This causes unexplainable hangs early on boot for
HVM guests with more than one CPU.
BugLink: http://bugs.launchpad.net/bugs/791850
CC: stable@kernel.org
Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Tested-and-Reported-by: Stefan Bader <stefan.bader@canonical.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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The order-based approach is not only less efficient (requiring a shift
and a compare, typical generated code looking like this
mov eax, [machine_to_phys_order]
mov ecx, eax
shr ebx, cl
test ebx, ebx
jnz ...
whereas a direct check requires just a compare, like in
cmp ebx, [machine_to_phys_nr]
jae ...
), but also slightly dangerous in the 32-on-64 case - the element
address calculation can wrap if the next power of two boundary is
sufficiently far away from the actual upper limit of the table, and
hence can result in user space addresses being accessed (with it being
unknown what may actually be mapped there).
Additionally, the elimination of the mistaken use of fls() here (should
have been __fls()) fixes a latent issue on x86-64 that would trigger
if the code was run on a system with memory extending beyond the 44-bit
boundary.
CC: stable@kernel.org
Signed-off-by: Jan Beulich <jbeulich@novell.com>
[v1: Based on Jeremy's feedback]
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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with CONFIG_XEN and CONFIG_FTRACE set we get this:
arch/x86/xen/trace.c:22: error: ‘__HYPERVISOR_console_io’ undeclared here (not in a function)
arch/x86/xen/trace.c:22: error: array index in initializer not of integer type
arch/x86/xen/trace.c:22: error: (near initialization for ‘xen_hypercall_names’)
arch/x86/xen/trace.c:23: error: ‘__HYPERVISOR_physdev_op_compat’ undeclared here (not in a function)
Issue was that the definitions of __HYPERVISOR were not pulled
if CONFIG_XEN_PRIVILEGED_GUEST was not set.
Reported-by: Randy Dunlap <rdunlap@xenotime.net>
Acked-by: Randy Dunlap <rdunlap@xenotime.net>
Acked-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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WARN message should not complain
"Failed to release memory %lx-%lx err=%d\n"
^^^^^^^
about range when it fails to release just one page,
instead it should say what pfn is not freed.
In addition line:
printk(KERN_INFO "xen_release_chunk: looking at area pfn %lx-%lx: "
...
printk(KERN_CONT "%lu pages freed\n", len);
will be broken if WARN in between this line is fired. So fix it
by using a single printk for this.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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Use correct format specifier for unsigned long.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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Apparently we wanted CONFIG_FTRACE rather the CONFIG_FUNCTION_TRACER.
Reported-by: Sander Eikelenboom <linux@eikelenboom.it>
Tested-by: Sander Eikelenboom <linux@eikelenboom.it>
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/jeremy/xen
* 'upstream/xen-tracing2' of git://git.kernel.org/pub/scm/linux/kernel/git/jeremy/xen:
xen/tracing: fix compile errors when tracing is disabled.
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'at91/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
at91: add arch specific ioremap support
at91: factorize sram init
at91: move register clocks to soc generic init
at91: move clock subsystem init to soc generic init
at91: use structure to store the current soc
at91: remove AT91_DBGU offset from dbgu register macro
at91: factorize at91 interrupts init to soc
at91: introduce commom AT91_BASE_SYS
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (21 commits)
arm/dt: tegra devicetree support
arm/versatile: Add device tree support
dt/irq: add irq_domain_generate_simple() helper
irq: add irq_domain translation infrastructure
dmaengine: imx-sdma: add device tree probe support
dmaengine: imx-sdma: sdma_get_firmware does not need to copy fw_name
dmaengine: imx-sdma: use platform_device_id to identify sdma version
mmc: sdhci-esdhc-imx: add device tree probe support
mmc: sdhci-pltfm: dt device does not pass parent to sdhci_alloc_host
mmc: sdhci-esdhc-imx: get rid of the uses of cpu_is_mx()
mmc: sdhci-esdhc-imx: do not reference platform data after probe
mmc: sdhci-esdhc-imx: extend card_detect and write_protect support for mx5
net/fec: add device tree probe support
net: ibm_newemac: convert it to use of_get_phy_mode
dt/net: add helper function of_get_phy_mode
net/fec: gasket needs to be enabled for some i.mx
serial/imx: add device tree probe support
serial/imx: get rid of the uses of cpu_is_mx1()
arm/dt: Add dtb make rule
arm/dt: Add skeleton dtsi file
...
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
ARM: zynq: remove incorrectly deleted file
ARM: tegra: only select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
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* git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-watchdog: (25 commits)
watchdog: WatchDog Timer Driver Core - Add minimum and max timeout
watchdog: WatchDog Timer Driver Core - Add ioctl call
watchdog: WatchDog Timer Driver Core - Add nowayout feature
watchdog: WatchDog Timer Driver Core - Add Magic Close feature
watchdog: WatchDog Timer Driver Core - Add WDIOC_SETTIMEOUT and WDIOC_GETTIMEOUT ioctl
watchdog: WatchDog Timer Driver Core - Add WDIOC_SETOPTIONS ioctl
watchdog: WatchDog Timer Driver Core - Add WDIOC_KEEPALIVE ioctl
watchdog: WatchDog Timer Driver Core - Add basic ioctl functionality
watchdog: WatchDog Timer Driver Core - Add basic framework
watchdog: hpwdt: add next gen HP servers
watchdog: it8712f_wdt.c: improve includes
watchdog: at91sam9/wdt: move register header to drivers
watchdog: Add Xilinx watchdog timer driver
watchdog: remove empty pm-functions
watchdog: sp805: Flush posted writes in enable/disable.
watchdog: sp805: Don't write 0 to the load value register.
watchdog: imx2_wdt: add device tree probe support
watchdog: s3c2410: Add support for device tree based probe
watchdog: mpcore_wdt: Add suspend/resume support.
watchdog: mtx1-wdt: use dev_{err,info} instead of printk()
...
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My previous commit left the file empty and present in the
Makefile, which is a bit dirty and caused problems with
'make distclean', as pointed out by David Howells.
This hopefully cleans it up the right way.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: David Howells <dhowells@redhat.com>
Acked-by: John Linn <john.linn@xilinx.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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instead of reading the registers everytime
the current implementation respect the following constrain:
- allow 1 to n soc to be enabled
- allow to have a virtual cpu type and subtype
- always detect the cpu type and subtype and report it
- detect if the soc support is enabled
- prepare for sysfs export support
- drop soc specific code via compiler when the soc not enabled
(via cpu_is_xxx)
Today if we read the exid we will have the same value for 9g35 and 9m11
and we will need to check the cidr too
with the new implementation we just need to check the soc subtype
this will also allow to have specific virtual subtype for rm9200 which the
board will have to specify via at91rm9200_set_type(int) as we have no way to
detect it.
this implementation is inspired by the SH cpu detection support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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to make the soc base specified at runtime instead of compiled time
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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they are the same except the default priority
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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On all at91 except rm9200 and x40 have the System Controller starts
at address 0xffffc000 and has a size of 16KiB.
On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
at 0xfffff000
This patch removes the individual definitions of AT91_BASE_SYS and
replaces them with a common version at base 0xfffffc000 and size 16KiB
and map the same memory space
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Everything required to populate NVIDIA Tegra devices from the device
tree. This patch adds a new DT_MACHINE_DESC() which matches against
a tegra20 device tree. So far it only registers the on-chip devices,
but it will be refined in follow on patches to configure clocks and
pin IO from the device tree also.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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For testing the dt work, define a dt-enabled versatile platform.
This patch adds a new versatile platform for when using the device
tree. Add platform and amba devices are discovered and registered by
parsing the device tree. Clocks and initial io mappings are still
configured statically.
This patch still depends on some static platform_data for a few devices
which is passed via the auxdata structure to of_platform_populate(),
but it is a viable starting point until the drivers can get all
configuration data out of the device tree.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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This patch adds irq_domain infrastructure for translating from
hardware irq numbers to linux irqs. This is particularly important
for architectures adding device tree support because the current
implementation (excluding PowerPC and SPARC) cannot handle
translation for more than a single interrupt controller. irq_domain
supports device tree translation for any number of interrupt
controllers.
This patch converts x86, Microblaze, ARM and MIPS to use irq_domain
for device tree irq translation. x86 is untested beyond compiling it,
irq_domain is enabled for MIPS and Microblaze, but the old behaviour is
preserved until the core code is modified to actually register an
irq_domain yet. On ARM it works and is required for much of the new
ARM device tree board support.
PowerPC has /not/ been converted to use this new infrastructure. It
is still missing some features before it can replace the virq
infrastructure already in powerpc (see documentation on
irq_domain_map/unmap for details). Followup patches will add the
missing pieces and migrate PowerPC to use irq_domain.
SPARC has its own method of managing interrupts from the device tree
and is unaffected by this change.
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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The cpu compatible string we look for is "SPARC-T3".
As far as memset/memcpy optimizations go, we treat this chip the same
as Niagara-T2/T2+. Use cache initializing stores for memset, and use
perfetch, FPU block loads, cache initializing stores, and block stores
for copies.
We use the Niagara-T2 perf support, since T3 is a close relative in
this regard. Later we'll add support for the new events T3 can
report, plus enable T3's new "sample" mode.
For now I haven't added any new ELF hwcap flags. We probably need
to add a couple, for example:
T2 and T3 both support the population count instruction in hardware.
T3 supports VIS3 instructions, including support (finally) for
partitioned shift. One can also now move directly between float
and integer registers.
T3 supports instructions meant to help with Galois Field and other HPC
calculations, such as XOR multiply. Also there are "OP and negate"
instructions, for example "fnmul" which is multiply-and-negate.
T3 recognizes the transactional memory opcodes, however since
transactional memory isn't supported: 1) 'commit' behaves as a NOP and
2) 'chkpt' always branches 3) 'rdcps' returns all zeros and 4) 'wrcps'
behaves as a NOP.
So we'll need about 3 new elf capability flags in the end to represent
all of these things.
Signed-off-by: David S. Miller <davem@davemloft.net>
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The hypervisor call is only necessary if hypervisor events are
being requested.
So if we're not tracking hypervisor events, simply do a direct
register write.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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Otherwise we'll crash in the sparc perf init code.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Should have been done in commit 1af08a1407f4 ("This is in preparation
for more generic atomic").
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Arun Sharma <asharma@fb.com>
Cc: David Miller <davem@davemloft.net>
Cc: "Hans-Christian Egtvedt" <hans-christian.egtvedt@atmel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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* 'next' of git://git.monstr.eu/linux-2.6-microblaze:
microblaze: Do not show error message for 32 interrupt lines
Revert "microblaze: PCI fix typo fault in of_node pointer moving into pci_bus"
microblaze: PCI fix typo fault in of_node pointer moving into pci_bus
microblaze: Add support for early console on mdm
microblaze: Simplify early console binding from DT
microblaze: Get early printk console earlier
microblaze: Standardise cpuinfo output for cache policy
microblaze: Unprivileged stream instruction awareness
microblaze: trivial: Fix typo fault
microblaze: exec: Remove redundant set_fs(USER_DS)
microblaze: Remove duplicated prototype of start_thread()
microblaze: Fix unaligned value saving to the stack for system with MMU
microblaze/irqs: Do not trace arch_local_{*,irq_*} functions
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This fixes:
warning: (MACH_HARMONY && MACH_KAEN && MACH_SEABOARD) selects MACH_HAS_SND_SOC_TEGRA_WM8903 which has unmet direct dependencies (SOUND && !M68K && SND && SND_SOC)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Colin Cross <ccross@android.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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When interrupt controller uses 32 interrupts lines the kernel
show error message about mismatch in kind-of-intr parameter
because it exceeds u32. Recast fixs this issue.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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It might be not good to use software defined version to identify sdma
device type, when hardware does not define such version. Instead,
soc name is stable enough to define the device type.
The patch uses platform_device_id rather than version number passed
by platform data to identify sdma device type/version.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Vinod Koul <vinod.koul@intel.com>
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The patch removes all the uses of cpu_is_mx(). Instead, it utilizes
platform_device_id to distinguish the esdhc differences among SoCs.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Cc: Chris Ball <cjb@laptop.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Chris Ball <cjb@laptop.org>
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The patch extends card_detect and write_protect support to get mx5
family and more scenarios supported. The changes include:
* Turn platform_data from optional to mandatory
* Add cd_types and wp_types into platform_data to cover more use
cases
* Remove the use of flag ESDHC_FLAG_GPIO_FOR_CD
* Adjust some machine codes to adopt the platform_data changes
* Work around the issue that software reset will get card detection
circuit stop working
With this patch, card_detect and write_protect gets supported on
mx5 based platforms.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Chris Ball <cjb@laptop.org>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Tested-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Acked-by: Chris Ball <cjb@laptop.org>
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On the recent i.mx (mx25/50/53), there is a gasket inside fec
controller which needs to be enabled no matter phy works in MII
or RMII mode.
The current code enables the gasket only when phy interface is RMII.
It's broken when the driver works with a MII phy. The patch uses
platform_device_id to distinguish the SoCs that have the gasket and
enables it on these SoCs for both MII and RMII mode.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reported-by: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: David S. Miller <davem@davemloft.net>
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The patch removes all the uses of cpu_is_mx1(). Instead, it uses
the .id_table of platform_driver to distinguish the uart device type,
IMX1_UART and IMX21_UART. The IMX21_UART type runs on all i.mx
except i.mx1.
A couple of !cpu_is_mx1 logic gets turned into is_imx21_uart,
as the codes wrapped there are really IMX21 type uart specific.
It also removes macro MX1_UCR3_REF25 and MX1_UCR3_REF30 which are
not used anywhere.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Alan Cox <alan@linux.intel.com>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/devel2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (47 commits)
OMAP: Add debugfs node to show the summary of all clocks
OMAP2+: hwmod: Follow the recommended PRCM module enable sequence
OMAP2+: clock: allow per-SoC clock init code to prevent clockdomain calls from clock code
OMAP2+: clockdomain: Add per clkdm lock to prevent concurrent state programming
OMAP2+: PM: idle clkdms only if already in idle
OMAP2+: clockdomain: add clkdm_in_hwsup()
OMAP2+: clockdomain: Add 2 APIs to control clockdomain from hwmod framework
OMAP: clockdomain: Remove redundant call to pwrdm_wait_transition()
OMAP4: hwmod: Introduce the module control in hwmod control
OMAP4: cm: Add two new APIs for modulemode control
OMAP4: hwmod data: Add modulemode entry in omap_hwmod structure
OMAP4: hwmod data: Add PRM context register offset
OMAP4: prm: Remove deprecated functions
OMAP4: prm: Replace warm reset API with the offset based version
OMAP4: hwmod: Replace RSTCTRL absolute address with offset macros
OMAP: hwmod: Wait the idle status to be disabled
OMAP4: hwmod: Replace CLKCTRL absolute address with offset macros
OMAP2+: hwmod: Init clkdm field at boot time
OMAP4: hwmod data: Add clock domain attribute
OMAP4: clock data: Add missing divider selection for auxclks
...
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ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (128 commits)
ARM: S5P64X0: External Interrupt Support
ARM: EXYNOS4: Enable MFC on Samsung NURI
ARM: EXYNOS4: Enable MFC on universal_c210
ARM: S5PV210: Enable MFC on Goni
ARM: S5P: Add support for MFC device
ARM: EXYNOS4: Add support FIMD on SMDKC210
ARM: EXYNOS4: Add platform device and helper functions for FIMD
ARM: EXYNOS4: Add resource definition for FIMD
ARM: EXYNOS4: Change devname for FIMD clkdev
ARM: SAMSUNG: Add IRQ_I2S0 definition
ARM: SAMSUNG: Add platform device for idma
ARM: EXYNOS4: Add more registers to be saved and restored for PM
ARM: EXYNOS4: Add more register addresses of CMU
ARM: EXYNOS4: Add platform device for dwmci driver
ARM: EXYNOS4: configure rtc-s3c on NURI
ARM: EXYNOS4: configure MAX8903 secondary charger on NURI
ARM: EXYNOS4: configure ADC on NURI
ARM: EXYNOS4: configure MAX17042 fuel gauge on NURI
ARM: EXYNOS4: configure regulators and PMIC(MAX8997) on NURI
ARM: EXYNOS4: Increase NR_IRQS for devices with more IRQs
...
Fix up tons of silly conflicts:
- arch/arm/mach-davinci/include/mach/psc.h
- arch/arm/mach-exynos4/Kconfig
- arch/arm/mach-exynos4/mach-smdkc210.c
- arch/arm/mach-exynos4/pm.c
- arch/arm/mach-imx/mm-imx1.c
- arch/arm/mach-imx/mm-imx21.c
- arch/arm/mach-imx/mm-imx25.c
- arch/arm/mach-imx/mm-imx27.c
- arch/arm/mach-imx/mm-imx31.c
- arch/arm/mach-imx/mm-imx35.c
- arch/arm/mach-mx5/mm.c
- arch/arm/mach-s5pv210/mach-goni.c
- arch/arm/mm/Kconfig
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/board' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
ARM: S3C64XX: Configure backup battery charger on Cragganmore
ARM: S3C64XX: Fix WM8915 IRQ polarity on Cragganmore
ARM: S3C64XX: Configure supplies for all Cragganmore regulators
ARM: S3C64XX: Refresh Cragganmore support
ARM: S3C64XX: Initial support for Wolfson/Simtec Cragganmore/Banff
OMAP4: Keyboard: Mux changes in the board file
omap: blaze: add mmc5/wl1283 device support
omap: 4430SDP: Register the card detect GPIO properly
arm: omap3: cm-t35: add support for cm-t3730
OMAP3: beagle: add support for beagleboard xM revision C
OMAP3: rx-51: Add full regulator definitions
omap: rx51: Platform support for lp5523 led chip
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/cross-platform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
ARM: Consolidate the clkdev header files
ARM: set vga memory base at run-time
ARM: convert PCI defines to variables
ARM: pci: make pcibios_assign_all_busses use pci_has_flag
ARM: remove unnecessary mach/hardware.h includes
pci: move microblaze and powerpc pci flag functions into asm-generic
powerpc: rename ppc_pci_*_flags to pci_*_flags
Fix up conflicts in arch/microblaze/include/asm/pci-bridge.h
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (24 commits)
ASoC: omap: McBSP: fix build breakage on OMAP1
OMAP: hwmod: fix the i2c-reset timeout during bootup
I2C: OMAP2+: add correct functionality flags to all omap2plus i2c dev_attr
I2C: OMAP2+: Tag all OMAP2+ hwmod defintions with I2C IP revision
I2C: OMAP1/OMAP2+: create omap I2C functionality flags for each cpu_... test
I2C: OMAP2+: Introduce I2C IP versioning constants
I2C: OMAP2+: increase omap_i2c_dev_attr flags from u8 to u32
I2C: OMAP2+: Set hwmod flags to only allow 16-bit accesses to i2c
OMAP4: hwmod data: Change DSS main_clk scheme
OMAP4: powerdomain data: Remove unsupported MPU powerdomain state
OMAP4: clock data: Keep GPMC clocks always enabled and hardware managed
OMAP4: powerdomain data: Fix core mem states and missing cefuse flag
OMAP2+: PM: Initialise sleep_switch to a non-valid value
OMAP4: hwmod data: Modify DSS opt clocks
OMAP4: iommu: fix clock name
omap: iovmm: s/sg_dma_len(sg)/sg->length/
omap: iommu: fix pte programming
arm: omap3: cm-t35: fix slow path warning
arm: omap3: cm-t35: minor comments fixes
omap: ZOOM: QUART: Request reset GPIO
...
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
MAINTAINERS: add maintainer of CSR SiRFprimaII machine
ARM: CSR: initializing L2 cache
ARM: CSR: mapping early DEBUG_LL uart
ARM: CSR: Adding CSR SiRFprimaII board support
OMAP4: clocks: Update the clock tree with 4460 clock nodes
OMAP4: PRCM: OMAP4460 specific PRM and CM register bitshifts
OMAP4: ID: add omap_has_feature for max freq supported
OMAP: ID: introduce chip detection for OMAP4460
ARM: Xilinx: merge board file into main platform code
ARM: Xilinx: Adding Xilinx board support
Fix up conflicts in arch/arm/mach-omap2/cm-regbits-44xx.h
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After changing all consumers of atomics to include <linux/atomic.h>, we
ran into some compile time errors due to this dependency chain:
linux/atomic.h
-> asm/atomic.h
-> asm-generic/atomic-long.h
where atomic-long.h could use funcs defined later in linux/atomic.h
without a prototype. This patches moves the code that includes
asm-generic/atomic*.h to linux/atomic.h.
Archs that need <asm-generic/atomic64.h> need to select
CONFIG_GENERIC_ATOMIC64 from now on (some of them used to include it
unconditionally).
Compile tested on i386 and x86_64 with allnoconfig.
Signed-off-by: Arun Sharma <asharma@fb.com>
Cc: Eric Dumazet <eric.dumazet@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: David Miller <davem@davemloft.net>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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This is in preparation for more generic atomic primitives based on
__atomic_add_unless.
Signed-off-by: Arun Sharma <asharma@fb.com>
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Reviewed-by: Eric Dumazet <eric.dumazet@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: David Miller <davem@davemloft.net>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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This allows us to move duplicated code in <asm/atomic.h>
(atomic_inc_not_zero() for now) to <linux/atomic.h>
Signed-off-by: Arun Sharma <asharma@fb.com>
Reviewed-by: Eric Dumazet <eric.dumazet@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: David Miller <davem@davemloft.net>
Cc: Eric Dumazet <eric.dumazet@gmail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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The majority of architectures implement ext2 atomic bitops as
test_and_{set,clear}_bit() without spinlock.
This adds this type of generic implementation in ext2-atomic-setbit.h and
use it wherever possible.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Suggested-by: Andreas Dilger <adilger@dilger.ca>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Harmonise these return values with other architectures. In some cases
this affects all compilers and in other cases non-gcc compilers only.
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Chris Zankel <chris@zankel.net>
Cc: Ulrich Drepper <drepper@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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