| Age | Commit message (Expand) | Author |
|---|---|---|
| 2013-05-29 | clk: vt8500: Remove unnecessary divisor adjustment in vtwm_dclk_set_rate() | Tony Prisk |
| 2013-05-29 | clk: vt8500: Add support for clocks on the WM8850 SoCs | Tony Prisk |
| 2013-04-29 | Merge tag 'clk-for-linus-3.10' of git://git.linaro.org/people/mturquette/linux | Linus Torvalds |
| 2013-04-14 | clk: vt8500: Missing breaks in vtwm_pll_round_rate/_set_rate. | Tony Prisk |
| 2013-03-14 | clk: vt8500: Fix "fix device clock divisor calculations" | Arnd Bergmann |
| 2013-01-24 | clk: vt8500: Use common of_clk_init() function | Prashant Gaikwad |
| 2013-01-15 | clk: vt8500: Add support for WM8750/WM8850 PLL clocks | Tony Prisk |
| 2013-01-15 | clk: vt8500: Fix division-by-0 when requested rate=0 | Tony Prisk |
| 2013-01-15 | clk: vt8500: Fix device clock divisor calculations | Tony Prisk |
| 2013-01-15 | clk: vt8500: Fix error in PLL calculations on non-exact match. | Tony Prisk |
| 2012-11-09 | CLK: vt8500: Fix SDMMC clk special cases | Tony Prisk |
| 2012-09-21 | arm: vt8500: clk: Add Common Clock Framework support | Tony Prisk |
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