| Age | Commit message (Expand) | Author |
|---|---|---|
| 2016-04-15 | clk: xgene: Remove CLK_IS_ROOT | Stephen Boyd |
| 2016-03-03 | clk: xgene: Add missing parenthesis when clearing divider value | Loc Ho |
| 2016-01-29 | clk: xgene: Remove return from void function | Stephen Boyd |
| 2016-01-29 | clk: xgene: Add SoC and PMD PLL clocks with v2 hardware | Loc Ho |
| 2015-11-20 | clk: xgene: Fix divider with non-zero shift value | Loc Ho |
| 2015-10-16 | clk: xgene: Remove unused setup.h include | Stephen Boyd |
| 2015-08-24 | clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) | Stephen Boyd |
| 2015-07-06 | clk: xgene: Delete duplicated name field | Matthias Brugger |
| 2015-05-14 | clk: xgene: Silence sparse warnings | Stephen Boyd |
| 2013-10-07 | clk: Add APM X-Gene SoC clock driver | Loc Ho |
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