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path:
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drivers
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clk
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mediatek
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clk-mt2701.c
Age
Commit message (
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Author
2023-11-20
clk: mediatek: clk-mt2701: Add check for mtk_alloc_clk_data
Jiasheng Jiang
2023-05-11
clk: mediatek: Consistently use GATE_MTK() macro
AngeloGioacchino Del Regno
2022-06-15
clk: mediatek: reset: Add new register reset function with device
Rex-BC Chen
2022-06-15
clk: mediatek: reset: Support nonsequence base offsets of reset registers
Rex-BC Chen
2022-06-15
clk: mediatek: reset: Revise structure to control reset register
Rex-BC Chen
2022-06-15
clk: mediatek: reset: Merge and revise reset register function
Rex-BC Chen
2022-05-19
clk: mediatek: Replace 'struct clk' with 'struct clk_hw'
Chen-Yu Tsai
2022-05-18
clk: mediatek: use en_mask as a pure div_en_mask
Chun-Jie Chen
2022-02-17
clk: mediatek: pll: Split definitions into separate header file
Chen-Yu Tsai
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
Thomas Gleixner
2019-02-25
clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel
chunhui dai
2018-08-30
clk: mediatek: remove unused array audio_parents
Colin Ian King
2018-05-15
clk: mediatek: correct the clocks for MT2701 HDMI PHY module
Ryder Lee
2018-03-19
clk: mediatek: fix PWM clock source by adding a fixed-factor clock
Sean Wang
2017-11-02
clk: mediatek: mark mtk_infrasys_init_early __init
Arnd Bergmann
2017-06-19
clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCs
Sean Wang
2016-11-08
reset: mediatek: Add MT2701 reset driver
Shunli Wang
2016-11-08
clk: mediatek: Add MT2701 clock support
Shunli Wang