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drivers
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clk
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mediatek
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clk-mtk.h
Age
Commit message (
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Author
2019-09-17
clk: mediatek: Register clock gate with device
Weiyi Lu
2019-08-08
clk: reset: Modify reset-controller driver
yong.liang
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
Thomas Gleixner
2019-04-11
clk: mediatek: Add configurable pcw_chg_reg to mtk_pll_data
Weiyi Lu
2019-04-11
clk: mediatek: Add configurable pcwibits and fmin to mtk_pll_data
Owen Chen
2019-03-08
Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk...
Stephen Boyd
2019-02-26
clk: mediatek: Add flags to mtk_gate
Jasper Mattsson
2019-02-26
clk: mediatek: Add MUX_FLAGS macro
Jasper Mattsson
2019-02-25
clk: mediatek: add MUX_GATE_FLAGS_2
chunhui dai
2018-01-10
clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being built
Sean Wang
2017-12-26
clk: mediatek: Fix all warnings for missing struct clk_onecell_data
Sean Wang
2017-11-02
clk: mediatek: add the option for determining PLL source clock
Chen Zhong
2017-11-02
clk: mediatek: Add MT2712 clock support
weiyi.lu@mediatek.com
2016-11-08
clk: mediatek: Add MT2701 clock support
Shunli Wang
2016-05-06
clk: mediatek: make dpi0_sel propagate rate changes
Philipp Zabel
2015-10-01
clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS
James Liao
2015-10-01
clk: mediatek: Add fixed clocks support for Mediatek SoC.
James Liao
2015-10-01
clk: mediatek: Remove unused code from MT8173.
James Liao
2015-07-28
Merge branch 'cleanup-clk-h-includes' into clk-next
Stephen Boyd
2015-07-28
clk: mediatek: Add MT8173 MMPLL change rate support
James Liao
2015-07-20
clk: mediatek: Properly include clk.h
Stephen Boyd
2015-05-05
clk: mediatek: Add reset controller support
Sascha Hauer
2015-05-05
clk: mediatek: Add initial common clock support for Mediatek SoCs.
James Liao